1 /* 2 * Copyright 2015 Advanced Micro Devices, Inc. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included in 12 * all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 * 22 * Authors: AMD 23 * 24 */ 25 26 #ifndef __DC_HW_SEQUENCER_H__ 27 #define __DC_HW_SEQUENCER_H__ 28 #include "dc_types.h" 29 #include "clock_source.h" 30 #include "inc/hw/timing_generator.h" 31 #include "inc/hw/opp.h" 32 #include "inc/hw/link_encoder.h" 33 #include "core_status.h" 34 35 enum vline_select { 36 VLINE0, 37 VLINE1 38 }; 39 40 struct pipe_ctx; 41 struct dc_state; 42 struct dc_stream_status; 43 struct dc_writeback_info; 44 struct dchub_init_data; 45 struct dc_static_screen_params; 46 struct resource_pool; 47 struct dc_phy_addr_space_config; 48 struct dc_virtual_addr_space_config; 49 struct dpp; 50 struct dce_hwseq; 51 52 struct hw_sequencer_funcs { 53 /* Embedded Display Related */ 54 void (*edp_power_control)(struct dc_link *link, bool enable); 55 void (*edp_wait_for_hpd_ready)(struct dc_link *link, bool power_up); 56 57 /* Pipe Programming Related */ 58 void (*init_hw)(struct dc *dc); 59 void (*enable_accelerated_mode)(struct dc *dc, 60 struct dc_state *context); 61 enum dc_status (*apply_ctx_to_hw)(struct dc *dc, 62 struct dc_state *context); 63 void (*disable_plane)(struct dc *dc, struct pipe_ctx *pipe_ctx); 64 void (*apply_ctx_for_surface)(struct dc *dc, 65 const struct dc_stream_state *stream, 66 int num_planes, struct dc_state *context); 67 void (*program_front_end_for_ctx)(struct dc *dc, 68 struct dc_state *context); 69 void (*update_plane_addr)(const struct dc *dc, 70 struct pipe_ctx *pipe_ctx); 71 void (*update_dchub)(struct dce_hwseq *hws, 72 struct dchub_init_data *dh_data); 73 void (*wait_for_mpcc_disconnect)(struct dc *dc, 74 struct resource_pool *res_pool, 75 struct pipe_ctx *pipe_ctx); 76 void (*program_triplebuffer)(const struct dc *dc, 77 struct pipe_ctx *pipe_ctx, bool enableTripleBuffer); 78 void (*update_pending_status)(struct pipe_ctx *pipe_ctx); 79 80 /* Pipe Lock Related */ 81 void (*pipe_control_lock_global)(struct dc *dc, 82 struct pipe_ctx *pipe, bool lock); 83 void (*pipe_control_lock)(struct dc *dc, 84 struct pipe_ctx *pipe, bool lock); 85 void (*set_flip_control_gsl)(struct pipe_ctx *pipe_ctx, 86 bool flip_immediate); 87 88 /* Timing Related */ 89 void (*get_position)(struct pipe_ctx **pipe_ctx, int num_pipes, 90 struct crtc_position *position); 91 int (*get_vupdate_offset_from_vsync)(struct pipe_ctx *pipe_ctx); 92 void (*enable_per_frame_crtc_position_reset)(struct dc *dc, 93 int group_size, struct pipe_ctx *grouped_pipes[]); 94 void (*enable_timing_synchronization)(struct dc *dc, 95 int group_index, int group_size, 96 struct pipe_ctx *grouped_pipes[]); 97 void (*setup_periodic_interrupt)(struct dc *dc, 98 struct pipe_ctx *pipe_ctx, 99 enum vline_select vline); 100 void (*set_drr)(struct pipe_ctx **pipe_ctx, int num_pipes, 101 unsigned int vmin, unsigned int vmax, 102 unsigned int vmid, unsigned int vmid_frame_number); 103 void (*set_static_screen_control)(struct pipe_ctx **pipe_ctx, 104 int num_pipes, 105 const struct dc_static_screen_params *events); 106 107 /* Stream Related */ 108 void (*enable_stream)(struct pipe_ctx *pipe_ctx); 109 void (*disable_stream)(struct pipe_ctx *pipe_ctx); 110 void (*blank_stream)(struct pipe_ctx *pipe_ctx); 111 void (*unblank_stream)(struct pipe_ctx *pipe_ctx, 112 struct dc_link_settings *link_settings); 113 114 /* Bandwidth Related */ 115 void (*prepare_bandwidth)(struct dc *dc, struct dc_state *context); 116 bool (*update_bandwidth)(struct dc *dc, struct dc_state *context); 117 void (*optimize_bandwidth)(struct dc *dc, struct dc_state *context); 118 119 /* Infopacket Related */ 120 void (*set_avmute)(struct pipe_ctx *pipe_ctx, bool enable); 121 void (*send_immediate_sdp_message)( 122 struct pipe_ctx *pipe_ctx, 123 const uint8_t *custom_sdp_message, 124 unsigned int sdp_message_size); 125 void (*update_info_frame)(struct pipe_ctx *pipe_ctx); 126 void (*set_dmdata_attributes)(struct pipe_ctx *pipe); 127 void (*program_dmdata_engine)(struct pipe_ctx *pipe_ctx); 128 bool (*dmdata_status_done)(struct pipe_ctx *pipe_ctx); 129 130 /* Cursor Related */ 131 void (*set_cursor_position)(struct pipe_ctx *pipe); 132 void (*set_cursor_attribute)(struct pipe_ctx *pipe); 133 void (*set_cursor_sdr_white_level)(struct pipe_ctx *pipe); 134 135 /* Colour Related */ 136 void (*program_gamut_remap)(struct pipe_ctx *pipe_ctx); 137 void (*program_output_csc)(struct dc *dc, struct pipe_ctx *pipe_ctx, 138 enum dc_color_space colorspace, 139 uint16_t *matrix, int opp_id); 140 141 /* VM Related */ 142 int (*init_sys_ctx)(struct dce_hwseq *hws, 143 struct dc *dc, 144 struct dc_phy_addr_space_config *pa_config); 145 void (*init_vm_ctx)(struct dce_hwseq *hws, 146 struct dc *dc, 147 struct dc_virtual_addr_space_config *va_config, 148 int vmid); 149 150 /* Writeback Related */ 151 void (*update_writeback)(struct dc *dc, 152 struct dc_writeback_info *wb_info, 153 struct dc_state *context); 154 void (*enable_writeback)(struct dc *dc, 155 struct dc_writeback_info *wb_info, 156 struct dc_state *context); 157 void (*disable_writeback)(struct dc *dc, 158 unsigned int dwb_pipe_inst); 159 160 bool (*mmhubbub_warmup)(struct dc *dc, 161 unsigned int num_dwb, 162 struct dc_writeback_info *wb_info); 163 164 /* Clock Related */ 165 enum dc_status (*set_clock)(struct dc *dc, 166 enum dc_clock_type clock_type, 167 uint32_t clk_khz, uint32_t stepping); 168 void (*get_clock)(struct dc *dc, enum dc_clock_type clock_type, 169 struct dc_clock_config *clock_cfg); 170 void (*optimize_pwr_state)(const struct dc *dc, 171 struct dc_state *context); 172 void (*exit_optimized_pwr_state)(const struct dc *dc, 173 struct dc_state *context); 174 175 /* Audio Related */ 176 void (*enable_audio_stream)(struct pipe_ctx *pipe_ctx); 177 void (*disable_audio_stream)(struct pipe_ctx *pipe_ctx); 178 179 /* Stereo 3D Related */ 180 void (*setup_stereo)(struct pipe_ctx *pipe_ctx, struct dc *dc); 181 182 /* HW State Logging Related */ 183 void (*log_hw_state)(struct dc *dc, struct dc_log_buffer_ctx *log_ctx); 184 void (*get_hw_state)(struct dc *dc, char *pBuf, 185 unsigned int bufSize, unsigned int mask); 186 void (*clear_status_bits)(struct dc *dc, unsigned int mask); 187 188 189 }; 190 191 void color_space_to_black_color( 192 const struct dc *dc, 193 enum dc_color_space colorspace, 194 struct tg_color *black_color); 195 196 bool hwss_wait_for_blank_complete( 197 struct timing_generator *tg); 198 199 const uint16_t *find_color_matrix( 200 enum dc_color_space color_space, 201 uint32_t *array_size); 202 203 #endif /* __DC_HW_SEQUENCER_H__ */ 204