1 /* 2 * Copyright 2015 Advanced Micro Devices, Inc. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included in 12 * all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 * 22 * Authors: AMD 23 * 24 */ 25 26 #ifndef __DC_HW_SEQUENCER_H__ 27 #define __DC_HW_SEQUENCER_H__ 28 #include "dc_types.h" 29 #include "clock_source.h" 30 #include "inc/hw/timing_generator.h" 31 #include "inc/hw/opp.h" 32 #include "inc/hw/link_encoder.h" 33 #include "core_status.h" 34 35 #define EDP_BACKLIGHT_RAMP_DISABLE_LEVEL 0xFFFFFFFF 36 37 enum pipe_gating_control { 38 PIPE_GATING_CONTROL_DISABLE = 0, 39 PIPE_GATING_CONTROL_ENABLE, 40 PIPE_GATING_CONTROL_INIT 41 }; 42 43 struct dce_hwseq_wa { 44 bool blnd_crtc_trigger; 45 bool DEGVIDCN10_253; 46 bool false_optc_underflow; 47 bool DEGVIDCN10_254; 48 }; 49 50 struct hwseq_wa_state { 51 bool DEGVIDCN10_253_applied; 52 }; 53 54 struct dce_hwseq { 55 struct dc_context *ctx; 56 const struct dce_hwseq_registers *regs; 57 const struct dce_hwseq_shift *shifts; 58 const struct dce_hwseq_mask *masks; 59 struct dce_hwseq_wa wa; 60 struct hwseq_wa_state wa_state; 61 }; 62 63 struct pipe_ctx; 64 struct dc_state; 65 struct dchub_init_data; 66 struct dc_static_screen_events; 67 struct resource_pool; 68 struct resource_context; 69 struct stream_resource; 70 71 struct hw_sequencer_funcs { 72 73 void (*init_hw)(struct dc *dc); 74 75 enum dc_status (*apply_ctx_to_hw)( 76 struct dc *dc, struct dc_state *context); 77 78 void (*reset_hw_ctx_wrap)( 79 struct dc *dc, struct dc_state *context); 80 81 void (*apply_ctx_for_surface)( 82 struct dc *dc, 83 const struct dc_stream_state *stream, 84 int num_planes, 85 struct dc_state *context); 86 87 void (*program_gamut_remap)( 88 struct pipe_ctx *pipe_ctx); 89 90 void (*program_csc_matrix)( 91 struct pipe_ctx *pipe_ctx, 92 enum dc_color_space colorspace, 93 uint16_t *matrix); 94 95 void (*program_output_csc)(struct dc *dc, 96 struct pipe_ctx *pipe_ctx, 97 enum dc_color_space colorspace, 98 uint16_t *matrix, 99 int opp_id); 100 101 void (*update_plane_addr)( 102 const struct dc *dc, 103 struct pipe_ctx *pipe_ctx); 104 105 void (*update_dchub)( 106 struct dce_hwseq *hws, 107 struct dchub_init_data *dh_data); 108 109 void (*update_pending_status)( 110 struct pipe_ctx *pipe_ctx); 111 112 bool (*set_input_transfer_func)( 113 struct pipe_ctx *pipe_ctx, 114 const struct dc_plane_state *plane_state); 115 116 bool (*set_output_transfer_func)( 117 struct pipe_ctx *pipe_ctx, 118 const struct dc_stream_state *stream); 119 120 void (*power_down)(struct dc *dc); 121 122 void (*enable_accelerated_mode)(struct dc *dc, struct dc_state *context); 123 124 void (*enable_timing_synchronization)( 125 struct dc *dc, 126 int group_index, 127 int group_size, 128 struct pipe_ctx *grouped_pipes[]); 129 130 void (*enable_per_frame_crtc_position_reset)( 131 struct dc *dc, 132 int group_size, 133 struct pipe_ctx *grouped_pipes[]); 134 135 void (*enable_display_pipe_clock_gating)( 136 struct dc_context *ctx, 137 bool clock_gating); 138 139 bool (*enable_display_power_gating)( 140 struct dc *dc, 141 uint8_t controller_id, 142 struct dc_bios *dcb, 143 enum pipe_gating_control power_gating); 144 145 void (*disable_plane)(struct dc *dc, struct pipe_ctx *pipe_ctx); 146 147 void (*update_info_frame)(struct pipe_ctx *pipe_ctx); 148 149 void (*enable_stream)(struct pipe_ctx *pipe_ctx); 150 151 void (*disable_stream)(struct pipe_ctx *pipe_ctx, 152 int option); 153 154 void (*unblank_stream)(struct pipe_ctx *pipe_ctx, 155 struct dc_link_settings *link_settings); 156 157 void (*blank_stream)(struct pipe_ctx *pipe_ctx); 158 159 void (*enable_audio_stream)(struct pipe_ctx *pipe_ctx); 160 161 void (*disable_audio_stream)(struct pipe_ctx *pipe_ctx, int option); 162 163 void (*pipe_control_lock)( 164 struct dc *dc, 165 struct pipe_ctx *pipe, 166 bool lock); 167 void (*blank_pixel_data)( 168 struct dc *dc, 169 struct pipe_ctx *pipe_ctx, 170 bool blank); 171 172 void (*set_bandwidth)( 173 struct dc *dc, 174 struct dc_state *context, 175 bool safe_to_lower); 176 177 void (*set_drr)(struct pipe_ctx **pipe_ctx, int num_pipes, 178 int vmin, int vmax); 179 180 void (*get_position)(struct pipe_ctx **pipe_ctx, int num_pipes, 181 struct crtc_position *position); 182 183 void (*set_static_screen_control)(struct pipe_ctx **pipe_ctx, 184 int num_pipes, const struct dc_static_screen_events *events); 185 186 enum dc_status (*enable_stream_timing)( 187 struct pipe_ctx *pipe_ctx, 188 struct dc_state *context, 189 struct dc *dc); 190 191 void (*setup_stereo)( 192 struct pipe_ctx *pipe_ctx, 193 struct dc *dc); 194 195 void (*set_avmute)(struct pipe_ctx *pipe_ctx, bool enable); 196 197 void (*log_hw_state)(struct dc *dc); 198 199 void (*wait_for_mpcc_disconnect)(struct dc *dc, 200 struct resource_pool *res_pool, 201 struct pipe_ctx *pipe_ctx); 202 203 void (*ready_shared_resources)(struct dc *dc, struct dc_state *context); 204 void (*optimize_shared_resources)(struct dc *dc); 205 void (*pplib_apply_display_requirements)( 206 struct dc *dc, 207 struct dc_state *context); 208 void (*edp_power_control)( 209 struct dc_link *link, 210 bool enable); 211 void (*edp_backlight_control)( 212 struct dc_link *link, 213 bool enable); 214 void (*edp_wait_for_hpd_ready)(struct dc_link *link, bool power_up); 215 216 void (*set_cursor_position)(struct pipe_ctx *pipe); 217 void (*set_cursor_attribute)(struct pipe_ctx *pipe); 218 219 }; 220 221 void color_space_to_black_color( 222 const struct dc *dc, 223 enum dc_color_space colorspace, 224 struct tg_color *black_color); 225 226 bool hwss_wait_for_blank_complete( 227 struct timing_generator *tg); 228 229 const uint16_t *find_color_matrix( 230 enum dc_color_space color_space, 231 uint32_t *array_size); 232 233 #endif /* __DC_HW_SEQUENCER_H__ */ 234