1 /* 2 * Copyright 2015 Advanced Micro Devices, Inc. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included in 12 * all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 * 22 * Authors: AMD 23 * 24 */ 25 26 #ifndef __DC_HW_SEQUENCER_H__ 27 #define __DC_HW_SEQUENCER_H__ 28 #include "dc_types.h" 29 #include "clock_source.h" 30 #include "inc/hw/timing_generator.h" 31 #include "inc/hw/opp.h" 32 #include "inc/hw/link_encoder.h" 33 #include "core_status.h" 34 35 enum pipe_gating_control { 36 PIPE_GATING_CONTROL_DISABLE = 0, 37 PIPE_GATING_CONTROL_ENABLE, 38 PIPE_GATING_CONTROL_INIT 39 }; 40 41 struct dce_hwseq_wa { 42 bool blnd_crtc_trigger; 43 bool DEGVIDCN10_253; 44 bool false_optc_underflow; 45 bool DEGVIDCN10_254; 46 }; 47 48 struct hwseq_wa_state { 49 bool DEGVIDCN10_253_applied; 50 }; 51 52 struct dce_hwseq { 53 struct dc_context *ctx; 54 const struct dce_hwseq_registers *regs; 55 const struct dce_hwseq_shift *shifts; 56 const struct dce_hwseq_mask *masks; 57 struct dce_hwseq_wa wa; 58 struct hwseq_wa_state wa_state; 59 }; 60 61 struct pipe_ctx; 62 struct dc_state; 63 struct dchub_init_data; 64 struct dc_static_screen_events; 65 struct resource_pool; 66 struct resource_context; 67 struct stream_resource; 68 69 struct hw_sequencer_funcs { 70 71 void (*init_hw)(struct dc *dc); 72 73 enum dc_status (*apply_ctx_to_hw)( 74 struct dc *dc, struct dc_state *context); 75 76 void (*reset_hw_ctx_wrap)( 77 struct dc *dc, struct dc_state *context); 78 79 void (*apply_ctx_for_surface)( 80 struct dc *dc, 81 const struct dc_stream_state *stream, 82 int num_planes, 83 struct dc_state *context); 84 85 void (*program_gamut_remap)( 86 struct pipe_ctx *pipe_ctx); 87 88 void (*program_output_csc)(struct dc *dc, 89 struct pipe_ctx *pipe_ctx, 90 enum dc_color_space colorspace, 91 uint16_t *matrix, 92 int opp_id); 93 94 void (*update_plane_addr)( 95 const struct dc *dc, 96 struct pipe_ctx *pipe_ctx); 97 98 void (*plane_atomic_disconnect)( 99 struct dc *dc, 100 struct pipe_ctx *pipe_ctx); 101 102 void (*update_dchub)( 103 struct dce_hwseq *hws, 104 struct dchub_init_data *dh_data); 105 106 void (*update_mpcc)( 107 struct dc *dc, 108 struct pipe_ctx *pipe_ctx); 109 110 void (*update_pending_status)( 111 struct pipe_ctx *pipe_ctx); 112 113 bool (*set_input_transfer_func)( 114 struct pipe_ctx *pipe_ctx, 115 const struct dc_plane_state *plane_state); 116 117 bool (*set_output_transfer_func)( 118 struct pipe_ctx *pipe_ctx, 119 const struct dc_stream_state *stream); 120 121 void (*power_down)(struct dc *dc); 122 123 void (*enable_accelerated_mode)(struct dc *dc, struct dc_state *context); 124 125 void (*enable_timing_synchronization)( 126 struct dc *dc, 127 int group_index, 128 int group_size, 129 struct pipe_ctx *grouped_pipes[]); 130 131 void (*enable_per_frame_crtc_position_reset)( 132 struct dc *dc, 133 int group_size, 134 struct pipe_ctx *grouped_pipes[]); 135 136 void (*enable_display_pipe_clock_gating)( 137 struct dc_context *ctx, 138 bool clock_gating); 139 140 bool (*enable_display_power_gating)( 141 struct dc *dc, 142 uint8_t controller_id, 143 struct dc_bios *dcb, 144 enum pipe_gating_control power_gating); 145 146 void (*disable_plane)(struct dc *dc, struct pipe_ctx *pipe_ctx); 147 148 void (*update_info_frame)(struct pipe_ctx *pipe_ctx); 149 150 void (*enable_stream)(struct pipe_ctx *pipe_ctx); 151 152 void (*disable_stream)(struct pipe_ctx *pipe_ctx, 153 int option); 154 155 void (*unblank_stream)(struct pipe_ctx *pipe_ctx, 156 struct dc_link_settings *link_settings); 157 158 void (*blank_stream)(struct pipe_ctx *pipe_ctx); 159 160 void (*enable_audio_stream)(struct pipe_ctx *pipe_ctx); 161 162 void (*disable_audio_stream)(struct pipe_ctx *pipe_ctx, int option); 163 164 void (*pipe_control_lock)( 165 struct dc *dc, 166 struct pipe_ctx *pipe, 167 bool lock); 168 void (*blank_pixel_data)( 169 struct dc *dc, 170 struct pipe_ctx *pipe_ctx, 171 bool blank); 172 173 void (*prepare_bandwidth)( 174 struct dc *dc, 175 struct dc_state *context); 176 void (*optimize_bandwidth)( 177 struct dc *dc, 178 struct dc_state *context); 179 180 void (*set_drr)(struct pipe_ctx **pipe_ctx, int num_pipes, 181 int vmin, int vmax); 182 183 void (*get_position)(struct pipe_ctx **pipe_ctx, int num_pipes, 184 struct crtc_position *position); 185 186 void (*set_static_screen_control)(struct pipe_ctx **pipe_ctx, 187 int num_pipes, const struct dc_static_screen_events *events); 188 189 enum dc_status (*enable_stream_timing)( 190 struct pipe_ctx *pipe_ctx, 191 struct dc_state *context, 192 struct dc *dc); 193 194 void (*setup_stereo)( 195 struct pipe_ctx *pipe_ctx, 196 struct dc *dc); 197 198 void (*set_avmute)(struct pipe_ctx *pipe_ctx, bool enable); 199 200 void (*log_hw_state)(struct dc *dc, 201 struct dc_log_buffer_ctx *log_ctx); 202 void (*get_hw_state)(struct dc *dc, char *pBuf, unsigned int bufSize, unsigned int mask); 203 void (*clear_status_bits)(struct dc *dc, unsigned int mask); 204 205 void (*wait_for_mpcc_disconnect)(struct dc *dc, 206 struct resource_pool *res_pool, 207 struct pipe_ctx *pipe_ctx); 208 209 void (*edp_power_control)( 210 struct dc_link *link, 211 bool enable); 212 void (*edp_backlight_control)( 213 struct dc_link *link, 214 bool enable); 215 void (*edp_wait_for_hpd_ready)(struct dc_link *link, bool power_up); 216 217 void (*set_cursor_position)(struct pipe_ctx *pipe); 218 void (*set_cursor_attribute)(struct pipe_ctx *pipe); 219 void (*set_cursor_sdr_white_level)(struct pipe_ctx *pipe); 220 221 }; 222 223 void color_space_to_black_color( 224 const struct dc *dc, 225 enum dc_color_space colorspace, 226 struct tg_color *black_color); 227 228 bool hwss_wait_for_blank_complete( 229 struct timing_generator *tg); 230 231 const uint16_t *find_color_matrix( 232 enum dc_color_space color_space, 233 uint32_t *array_size); 234 235 #endif /* __DC_HW_SEQUENCER_H__ */ 236