1 /* 2 * Copyright 2015 Advanced Micro Devices, Inc. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included in 12 * all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 * 22 * Authors: AMD 23 * 24 */ 25 26 #ifndef __DC_HW_SEQUENCER_H__ 27 #define __DC_HW_SEQUENCER_H__ 28 #include "dc_types.h" 29 #include "clock_source.h" 30 #include "inc/hw/timing_generator.h" 31 #include "inc/hw/opp.h" 32 #include "inc/hw/link_encoder.h" 33 #include "core_status.h" 34 35 struct pipe_ctx; 36 struct dc_state; 37 struct dc_stream_status; 38 struct dc_writeback_info; 39 struct dchub_init_data; 40 struct dc_static_screen_params; 41 struct resource_pool; 42 struct dc_phy_addr_space_config; 43 struct dc_virtual_addr_space_config; 44 struct dpp; 45 struct dce_hwseq; 46 struct link_resource; 47 struct dc_dmub_cmd; 48 49 struct subvp_pipe_control_lock_fast_params { 50 struct dc *dc; 51 bool lock; 52 struct pipe_ctx *pipe_ctx; 53 }; 54 55 struct pipe_control_lock_params { 56 struct dc *dc; 57 struct pipe_ctx *pipe_ctx; 58 bool lock; 59 }; 60 61 struct set_flip_control_gsl_params { 62 struct pipe_ctx *pipe_ctx; 63 bool flip_immediate; 64 }; 65 66 struct program_triplebuffer_params { 67 const struct dc *dc; 68 struct pipe_ctx *pipe_ctx; 69 bool enableTripleBuffer; 70 }; 71 72 struct update_plane_addr_params { 73 struct dc *dc; 74 struct pipe_ctx *pipe_ctx; 75 }; 76 77 struct set_input_transfer_func_params { 78 struct dc *dc; 79 struct pipe_ctx *pipe_ctx; 80 struct dc_plane_state *plane_state; 81 }; 82 83 struct program_gamut_remap_params { 84 struct pipe_ctx *pipe_ctx; 85 }; 86 87 struct program_manual_trigger_params { 88 struct pipe_ctx *pipe_ctx; 89 }; 90 91 struct send_dmcub_cmd_params { 92 struct dc_context *ctx; 93 union dmub_rb_cmd *cmd; 94 enum dm_dmub_wait_type wait_type; 95 }; 96 97 struct setup_dpp_params { 98 struct pipe_ctx *pipe_ctx; 99 }; 100 101 struct program_bias_and_scale_params { 102 struct pipe_ctx *pipe_ctx; 103 }; 104 105 struct set_output_transfer_func_params { 106 struct dc *dc; 107 struct pipe_ctx *pipe_ctx; 108 const struct dc_stream_state *stream; 109 }; 110 111 struct update_visual_confirm_params { 112 struct dc *dc; 113 struct pipe_ctx *pipe_ctx; 114 int mpcc_id; 115 }; 116 117 union block_sequence_params { 118 struct update_plane_addr_params update_plane_addr_params; 119 struct subvp_pipe_control_lock_fast_params subvp_pipe_control_lock_fast_params; 120 struct pipe_control_lock_params pipe_control_lock_params; 121 struct set_flip_control_gsl_params set_flip_control_gsl_params; 122 struct program_triplebuffer_params program_triplebuffer_params; 123 struct set_input_transfer_func_params set_input_transfer_func_params; 124 struct program_gamut_remap_params program_gamut_remap_params; 125 struct program_manual_trigger_params program_manual_trigger_params; 126 struct send_dmcub_cmd_params send_dmcub_cmd_params; 127 struct setup_dpp_params setup_dpp_params; 128 struct program_bias_and_scale_params program_bias_and_scale_params; 129 struct set_output_transfer_func_params set_output_transfer_func_params; 130 struct update_visual_confirm_params update_visual_confirm_params; 131 }; 132 133 enum block_sequence_func { 134 DMUB_SUBVP_PIPE_CONTROL_LOCK_FAST = 0, 135 OPTC_PIPE_CONTROL_LOCK, 136 HUBP_SET_FLIP_CONTROL_GSL, 137 HUBP_PROGRAM_TRIPLEBUFFER, 138 HUBP_UPDATE_PLANE_ADDR, 139 DPP_SET_INPUT_TRANSFER_FUNC, 140 DPP_PROGRAM_GAMUT_REMAP, 141 OPTC_PROGRAM_MANUAL_TRIGGER, 142 DMUB_SEND_DMCUB_CMD, 143 DPP_SETUP_DPP, 144 DPP_PROGRAM_BIAS_AND_SCALE, 145 DPP_SET_OUTPUT_TRANSFER_FUNC, 146 MPC_UPDATE_VISUAL_CONFIRM, 147 }; 148 149 struct block_sequence { 150 union block_sequence_params params; 151 enum block_sequence_func func; 152 }; 153 154 struct hw_sequencer_funcs { 155 void (*hardware_release)(struct dc *dc); 156 /* Embedded Display Related */ 157 void (*edp_power_control)(struct dc_link *link, bool enable); 158 void (*edp_wait_for_hpd_ready)(struct dc_link *link, bool power_up); 159 void (*edp_wait_for_T12)(struct dc_link *link); 160 161 /* Pipe Programming Related */ 162 void (*init_hw)(struct dc *dc); 163 void (*power_down_on_boot)(struct dc *dc); 164 void (*enable_accelerated_mode)(struct dc *dc, 165 struct dc_state *context); 166 enum dc_status (*apply_ctx_to_hw)(struct dc *dc, 167 struct dc_state *context); 168 void (*disable_plane)(struct dc *dc, struct pipe_ctx *pipe_ctx); 169 void (*disable_pixel_data)(struct dc *dc, struct pipe_ctx *pipe_ctx, bool blank); 170 void (*apply_ctx_for_surface)(struct dc *dc, 171 const struct dc_stream_state *stream, 172 int num_planes, struct dc_state *context); 173 void (*program_front_end_for_ctx)(struct dc *dc, 174 struct dc_state *context); 175 void (*wait_for_pending_cleared)(struct dc *dc, 176 struct dc_state *context); 177 void (*post_unlock_program_front_end)(struct dc *dc, 178 struct dc_state *context); 179 void (*update_plane_addr)(const struct dc *dc, 180 struct pipe_ctx *pipe_ctx); 181 void (*update_dchub)(struct dce_hwseq *hws, 182 struct dchub_init_data *dh_data); 183 void (*wait_for_mpcc_disconnect)(struct dc *dc, 184 struct resource_pool *res_pool, 185 struct pipe_ctx *pipe_ctx); 186 void (*edp_backlight_control)( 187 struct dc_link *link, 188 bool enable); 189 void (*program_triplebuffer)(const struct dc *dc, 190 struct pipe_ctx *pipe_ctx, bool enableTripleBuffer); 191 void (*update_pending_status)(struct pipe_ctx *pipe_ctx); 192 void (*power_down)(struct dc *dc); 193 void (*update_dsc_pg)(struct dc *dc, struct dc_state *context, bool safe_to_disable); 194 195 /* Pipe Lock Related */ 196 void (*pipe_control_lock)(struct dc *dc, 197 struct pipe_ctx *pipe, bool lock); 198 void (*interdependent_update_lock)(struct dc *dc, 199 struct dc_state *context, bool lock); 200 void (*set_flip_control_gsl)(struct pipe_ctx *pipe_ctx, 201 bool flip_immediate); 202 void (*cursor_lock)(struct dc *dc, struct pipe_ctx *pipe, bool lock); 203 204 /* Timing Related */ 205 void (*get_position)(struct pipe_ctx **pipe_ctx, int num_pipes, 206 struct crtc_position *position); 207 int (*get_vupdate_offset_from_vsync)(struct pipe_ctx *pipe_ctx); 208 void (*calc_vupdate_position)( 209 struct dc *dc, 210 struct pipe_ctx *pipe_ctx, 211 uint32_t *start_line, 212 uint32_t *end_line); 213 void (*enable_per_frame_crtc_position_reset)(struct dc *dc, 214 int group_size, struct pipe_ctx *grouped_pipes[]); 215 void (*enable_timing_synchronization)(struct dc *dc, 216 int group_index, int group_size, 217 struct pipe_ctx *grouped_pipes[]); 218 void (*enable_vblanks_synchronization)(struct dc *dc, 219 int group_index, int group_size, 220 struct pipe_ctx *grouped_pipes[]); 221 void (*setup_periodic_interrupt)(struct dc *dc, 222 struct pipe_ctx *pipe_ctx); 223 void (*set_drr)(struct pipe_ctx **pipe_ctx, int num_pipes, 224 struct dc_crtc_timing_adjust adjust); 225 void (*set_static_screen_control)(struct pipe_ctx **pipe_ctx, 226 int num_pipes, 227 const struct dc_static_screen_params *events); 228 #ifndef TRIM_FSFT 229 bool (*optimize_timing_for_fsft)(struct dc *dc, 230 struct dc_crtc_timing *timing, 231 unsigned int max_input_rate_in_khz); 232 #endif 233 234 /* Stream Related */ 235 void (*enable_stream)(struct pipe_ctx *pipe_ctx); 236 void (*disable_stream)(struct pipe_ctx *pipe_ctx); 237 void (*blank_stream)(struct pipe_ctx *pipe_ctx); 238 void (*unblank_stream)(struct pipe_ctx *pipe_ctx, 239 struct dc_link_settings *link_settings); 240 241 /* Bandwidth Related */ 242 void (*prepare_bandwidth)(struct dc *dc, struct dc_state *context); 243 bool (*update_bandwidth)(struct dc *dc, struct dc_state *context); 244 void (*optimize_bandwidth)(struct dc *dc, struct dc_state *context); 245 246 /* Infopacket Related */ 247 void (*set_avmute)(struct pipe_ctx *pipe_ctx, bool enable); 248 void (*send_immediate_sdp_message)( 249 struct pipe_ctx *pipe_ctx, 250 const uint8_t *custom_sdp_message, 251 unsigned int sdp_message_size); 252 void (*update_info_frame)(struct pipe_ctx *pipe_ctx); 253 void (*set_dmdata_attributes)(struct pipe_ctx *pipe); 254 void (*program_dmdata_engine)(struct pipe_ctx *pipe_ctx); 255 bool (*dmdata_status_done)(struct pipe_ctx *pipe_ctx); 256 257 /* Cursor Related */ 258 void (*set_cursor_position)(struct pipe_ctx *pipe); 259 void (*set_cursor_attribute)(struct pipe_ctx *pipe); 260 void (*set_cursor_sdr_white_level)(struct pipe_ctx *pipe); 261 262 /* Colour Related */ 263 void (*program_gamut_remap)(struct pipe_ctx *pipe_ctx); 264 void (*program_output_csc)(struct dc *dc, struct pipe_ctx *pipe_ctx, 265 enum dc_color_space colorspace, 266 uint16_t *matrix, int opp_id); 267 268 /* VM Related */ 269 int (*init_sys_ctx)(struct dce_hwseq *hws, 270 struct dc *dc, 271 struct dc_phy_addr_space_config *pa_config); 272 void (*init_vm_ctx)(struct dce_hwseq *hws, 273 struct dc *dc, 274 struct dc_virtual_addr_space_config *va_config, 275 int vmid); 276 277 /* Writeback Related */ 278 void (*update_writeback)(struct dc *dc, 279 struct dc_writeback_info *wb_info, 280 struct dc_state *context); 281 void (*enable_writeback)(struct dc *dc, 282 struct dc_writeback_info *wb_info, 283 struct dc_state *context); 284 void (*disable_writeback)(struct dc *dc, 285 unsigned int dwb_pipe_inst); 286 287 bool (*mmhubbub_warmup)(struct dc *dc, 288 unsigned int num_dwb, 289 struct dc_writeback_info *wb_info); 290 291 /* Clock Related */ 292 enum dc_status (*set_clock)(struct dc *dc, 293 enum dc_clock_type clock_type, 294 uint32_t clk_khz, uint32_t stepping); 295 void (*get_clock)(struct dc *dc, enum dc_clock_type clock_type, 296 struct dc_clock_config *clock_cfg); 297 void (*optimize_pwr_state)(const struct dc *dc, 298 struct dc_state *context); 299 void (*exit_optimized_pwr_state)(const struct dc *dc, 300 struct dc_state *context); 301 302 /* Audio Related */ 303 void (*enable_audio_stream)(struct pipe_ctx *pipe_ctx); 304 void (*disable_audio_stream)(struct pipe_ctx *pipe_ctx); 305 306 /* Stereo 3D Related */ 307 void (*setup_stereo)(struct pipe_ctx *pipe_ctx, struct dc *dc); 308 309 /* HW State Logging Related */ 310 void (*log_hw_state)(struct dc *dc, struct dc_log_buffer_ctx *log_ctx); 311 void (*get_hw_state)(struct dc *dc, char *pBuf, 312 unsigned int bufSize, unsigned int mask); 313 void (*clear_status_bits)(struct dc *dc, unsigned int mask); 314 315 bool (*set_backlight_level)(struct pipe_ctx *pipe_ctx, 316 uint32_t backlight_pwm_u16_16, 317 uint32_t frame_ramp); 318 319 void (*set_abm_immediate_disable)(struct pipe_ctx *pipe_ctx); 320 321 void (*set_pipe)(struct pipe_ctx *pipe_ctx); 322 323 void (*enable_dp_link_output)(struct dc_link *link, 324 const struct link_resource *link_res, 325 enum signal_type signal, 326 enum clock_source_id clock_source, 327 const struct dc_link_settings *link_settings); 328 void (*enable_tmds_link_output)(struct dc_link *link, 329 const struct link_resource *link_res, 330 enum signal_type signal, 331 enum clock_source_id clock_source, 332 enum dc_color_depth color_depth, 333 uint32_t pixel_clock); 334 void (*enable_lvds_link_output)(struct dc_link *link, 335 const struct link_resource *link_res, 336 enum clock_source_id clock_source, 337 uint32_t pixel_clock); 338 void (*disable_link_output)(struct dc_link *link, 339 const struct link_resource *link_res, 340 enum signal_type signal); 341 342 void (*get_dcc_en_bits)(struct dc *dc, int *dcc_en_bits); 343 344 /* Idle Optimization Related */ 345 bool (*apply_idle_power_optimizations)(struct dc *dc, bool enable); 346 347 bool (*does_plane_fit_in_mall)(struct dc *dc, struct dc_plane_state *plane, 348 struct dc_cursor_attributes *cursor_attr); 349 350 bool (*is_abm_supported)(struct dc *dc, 351 struct dc_state *context, struct dc_stream_state *stream); 352 353 void (*set_disp_pattern_generator)(const struct dc *dc, 354 struct pipe_ctx *pipe_ctx, 355 enum controller_dp_test_pattern test_pattern, 356 enum controller_dp_color_space color_space, 357 enum dc_color_depth color_depth, 358 const struct tg_color *solid_color, 359 int width, int height, int offset); 360 361 void (*subvp_pipe_control_lock_fast)(union block_sequence_params *params); 362 void (*z10_restore)(const struct dc *dc); 363 void (*z10_save_init)(struct dc *dc); 364 365 void (*update_visual_confirm_color)(struct dc *dc, 366 struct pipe_ctx *pipe_ctx, 367 int mpcc_id); 368 369 void (*update_phantom_vp_position)(struct dc *dc, 370 struct dc_state *context, 371 struct pipe_ctx *phantom_pipe); 372 void (*apply_update_flags_for_phantom)(struct pipe_ctx *phantom_pipe); 373 374 void (*commit_subvp_config)(struct dc *dc, struct dc_state *context); 375 void (*enable_phantom_streams)(struct dc *dc, struct dc_state *context); 376 void (*subvp_pipe_control_lock)(struct dc *dc, 377 struct dc_state *context, 378 bool lock, 379 bool should_lock_all_pipes, 380 struct pipe_ctx *top_pipe_to_program, 381 bool subvp_prev_use); 382 383 }; 384 385 void color_space_to_black_color( 386 const struct dc *dc, 387 enum dc_color_space colorspace, 388 struct tg_color *black_color); 389 390 bool hwss_wait_for_blank_complete( 391 struct timing_generator *tg); 392 393 const uint16_t *find_color_matrix( 394 enum dc_color_space color_space, 395 uint32_t *array_size); 396 397 void get_surface_visual_confirm_color( 398 const struct pipe_ctx *pipe_ctx, 399 struct tg_color *color); 400 401 void get_subvp_visual_confirm_color( 402 struct dc *dc, 403 struct dc_state *context, 404 struct pipe_ctx *pipe_ctx, 405 struct tg_color *color); 406 407 void get_hdr_visual_confirm_color( 408 struct pipe_ctx *pipe_ctx, 409 struct tg_color *color); 410 void get_mpctree_visual_confirm_color( 411 struct pipe_ctx *pipe_ctx, 412 struct tg_color *color); 413 void get_surface_tile_visual_confirm_color( 414 struct pipe_ctx *pipe_ctx, 415 struct tg_color *color); 416 417 void get_mclk_switch_visual_confirm_color( 418 struct dc *dc, 419 struct dc_state *context, 420 struct pipe_ctx *pipe_ctx, 421 struct tg_color *color); 422 423 void hwss_execute_sequence(struct dc *dc, 424 struct block_sequence block_sequence[], 425 int num_steps); 426 427 void hwss_build_fast_sequence(struct dc *dc, 428 struct dc_dmub_cmd *dc_dmub_cmd, 429 unsigned int dmub_cmd_count, 430 struct block_sequence block_sequence[], 431 int *num_steps, 432 struct pipe_ctx *pipe_ctx); 433 434 void hwss_send_dmcub_cmd(union block_sequence_params *params); 435 436 void hwss_program_manual_trigger(union block_sequence_params *params); 437 438 void hwss_setup_dpp(union block_sequence_params *params); 439 440 void hwss_program_bias_and_scale(union block_sequence_params *params); 441 442 #endif /* __DC_HW_SEQUENCER_H__ */ 443