1 /*
2  * Copyright 2015 Advanced Micro Devices, Inc.
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a
5  * copy of this software and associated documentation files (the "Software"),
6  * to deal in the Software without restriction, including without limitation
7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8  * and/or sell copies of the Software, and to permit persons to whom the
9  * Software is furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice shall be included in
12  * all copies or substantial portions of the Software.
13  *
14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20  * OTHER DEALINGS IN THE SOFTWARE.
21  *
22  * Authors: AMD
23  *
24  */
25 
26 #ifndef __DC_HW_SEQUENCER_H__
27 #define __DC_HW_SEQUENCER_H__
28 #include "dc_types.h"
29 #include "clock_source.h"
30 #include "inc/hw/timing_generator.h"
31 #include "inc/hw/opp.h"
32 #include "inc/hw/link_encoder.h"
33 #include "core_status.h"
34 
35 enum vline_select {
36 	VLINE0,
37 	VLINE1
38 };
39 
40 struct pipe_ctx;
41 struct dc_state;
42 struct dc_stream_status;
43 struct dc_writeback_info;
44 struct dchub_init_data;
45 struct dc_static_screen_params;
46 struct resource_pool;
47 struct dc_phy_addr_space_config;
48 struct dc_virtual_addr_space_config;
49 struct dpp;
50 struct dce_hwseq;
51 struct link_resource;
52 
53 struct hw_sequencer_funcs {
54 	void (*hardware_release)(struct dc *dc);
55 	/* Embedded Display Related */
56 	void (*edp_power_control)(struct dc_link *link, bool enable);
57 	void (*edp_wait_for_hpd_ready)(struct dc_link *link, bool power_up);
58 	void (*edp_wait_for_T12)(struct dc_link *link);
59 
60 	/* Pipe Programming Related */
61 	void (*init_hw)(struct dc *dc);
62 	void (*power_down_on_boot)(struct dc *dc);
63 	void (*enable_accelerated_mode)(struct dc *dc,
64 			struct dc_state *context);
65 	enum dc_status (*apply_ctx_to_hw)(struct dc *dc,
66 			struct dc_state *context);
67 	void (*disable_plane)(struct dc *dc, struct pipe_ctx *pipe_ctx);
68 	void (*disable_pixel_data)(struct dc *dc, struct pipe_ctx *pipe_ctx, bool blank);
69 	void (*apply_ctx_for_surface)(struct dc *dc,
70 			const struct dc_stream_state *stream,
71 			int num_planes, struct dc_state *context);
72 	void (*program_front_end_for_ctx)(struct dc *dc,
73 			struct dc_state *context);
74 	void (*wait_for_pending_cleared)(struct dc *dc,
75 			struct dc_state *context);
76 	void (*post_unlock_program_front_end)(struct dc *dc,
77 			struct dc_state *context);
78 	void (*update_plane_addr)(const struct dc *dc,
79 			struct pipe_ctx *pipe_ctx);
80 	void (*update_dchub)(struct dce_hwseq *hws,
81 			struct dchub_init_data *dh_data);
82 	void (*wait_for_mpcc_disconnect)(struct dc *dc,
83 			struct resource_pool *res_pool,
84 			struct pipe_ctx *pipe_ctx);
85 	void (*edp_backlight_control)(
86 			struct dc_link *link,
87 			bool enable);
88 	void (*program_triplebuffer)(const struct dc *dc,
89 		struct pipe_ctx *pipe_ctx, bool enableTripleBuffer);
90 	void (*update_pending_status)(struct pipe_ctx *pipe_ctx);
91 	void (*power_down)(struct dc *dc);
92 
93 	/* Pipe Lock Related */
94 	void (*pipe_control_lock)(struct dc *dc,
95 			struct pipe_ctx *pipe, bool lock);
96 	void (*interdependent_update_lock)(struct dc *dc,
97 			struct dc_state *context, bool lock);
98 	void (*set_flip_control_gsl)(struct pipe_ctx *pipe_ctx,
99 			bool flip_immediate);
100 	void (*cursor_lock)(struct dc *dc, struct pipe_ctx *pipe, bool lock);
101 
102 	/* Timing Related */
103 	void (*get_position)(struct pipe_ctx **pipe_ctx, int num_pipes,
104 			struct crtc_position *position);
105 	int (*get_vupdate_offset_from_vsync)(struct pipe_ctx *pipe_ctx);
106 	void (*calc_vupdate_position)(
107 			struct dc *dc,
108 			struct pipe_ctx *pipe_ctx,
109 			uint32_t *start_line,
110 			uint32_t *end_line);
111 	void (*enable_per_frame_crtc_position_reset)(struct dc *dc,
112 			int group_size, struct pipe_ctx *grouped_pipes[]);
113 	void (*enable_timing_synchronization)(struct dc *dc,
114 			int group_index, int group_size,
115 			struct pipe_ctx *grouped_pipes[]);
116 	void (*enable_vblanks_synchronization)(struct dc *dc,
117 			int group_index, int group_size,
118 			struct pipe_ctx *grouped_pipes[]);
119 	void (*setup_periodic_interrupt)(struct dc *dc,
120 			struct pipe_ctx *pipe_ctx,
121 			enum vline_select vline);
122 	void (*set_drr)(struct pipe_ctx **pipe_ctx, int num_pipes,
123 			struct dc_crtc_timing_adjust adjust);
124 	void (*set_static_screen_control)(struct pipe_ctx **pipe_ctx,
125 			int num_pipes,
126 			const struct dc_static_screen_params *events);
127 #ifndef TRIM_FSFT
128 	bool (*optimize_timing_for_fsft)(struct dc *dc,
129 			struct dc_crtc_timing *timing,
130 			unsigned int max_input_rate_in_khz);
131 #endif
132 
133 	/* Stream Related */
134 	void (*enable_stream)(struct pipe_ctx *pipe_ctx);
135 	void (*disable_stream)(struct pipe_ctx *pipe_ctx);
136 	void (*blank_stream)(struct pipe_ctx *pipe_ctx);
137 	void (*unblank_stream)(struct pipe_ctx *pipe_ctx,
138 			struct dc_link_settings *link_settings);
139 
140 	/* Bandwidth Related */
141 	void (*prepare_bandwidth)(struct dc *dc, struct dc_state *context);
142 	bool (*update_bandwidth)(struct dc *dc, struct dc_state *context);
143 	void (*optimize_bandwidth)(struct dc *dc, struct dc_state *context);
144 
145 	/* Infopacket Related */
146 	void (*set_avmute)(struct pipe_ctx *pipe_ctx, bool enable);
147 	void (*send_immediate_sdp_message)(
148 			struct pipe_ctx *pipe_ctx,
149 			const uint8_t *custom_sdp_message,
150 			unsigned int sdp_message_size);
151 	void (*update_info_frame)(struct pipe_ctx *pipe_ctx);
152 	void (*set_dmdata_attributes)(struct pipe_ctx *pipe);
153 	void (*program_dmdata_engine)(struct pipe_ctx *pipe_ctx);
154 	bool (*dmdata_status_done)(struct pipe_ctx *pipe_ctx);
155 
156 	/* Cursor Related */
157 	void (*set_cursor_position)(struct pipe_ctx *pipe);
158 	void (*set_cursor_attribute)(struct pipe_ctx *pipe);
159 	void (*set_cursor_sdr_white_level)(struct pipe_ctx *pipe);
160 
161 	/* Colour Related */
162 	void (*program_gamut_remap)(struct pipe_ctx *pipe_ctx);
163 	void (*program_output_csc)(struct dc *dc, struct pipe_ctx *pipe_ctx,
164 			enum dc_color_space colorspace,
165 			uint16_t *matrix, int opp_id);
166 
167 	/* VM Related */
168 	int (*init_sys_ctx)(struct dce_hwseq *hws,
169 			struct dc *dc,
170 			struct dc_phy_addr_space_config *pa_config);
171 	void (*init_vm_ctx)(struct dce_hwseq *hws,
172 			struct dc *dc,
173 			struct dc_virtual_addr_space_config *va_config,
174 			int vmid);
175 
176 	/* Writeback Related */
177 	void (*update_writeback)(struct dc *dc,
178 			struct dc_writeback_info *wb_info,
179 			struct dc_state *context);
180 	void (*enable_writeback)(struct dc *dc,
181 			struct dc_writeback_info *wb_info,
182 			struct dc_state *context);
183 	void (*disable_writeback)(struct dc *dc,
184 			unsigned int dwb_pipe_inst);
185 
186 	bool (*mmhubbub_warmup)(struct dc *dc,
187 			unsigned int num_dwb,
188 			struct dc_writeback_info *wb_info);
189 
190 	/* Clock Related */
191 	enum dc_status (*set_clock)(struct dc *dc,
192 			enum dc_clock_type clock_type,
193 			uint32_t clk_khz, uint32_t stepping);
194 	void (*get_clock)(struct dc *dc, enum dc_clock_type clock_type,
195 			struct dc_clock_config *clock_cfg);
196 	void (*optimize_pwr_state)(const struct dc *dc,
197 			struct dc_state *context);
198 	void (*exit_optimized_pwr_state)(const struct dc *dc,
199 			struct dc_state *context);
200 
201 	/* Audio Related */
202 	void (*enable_audio_stream)(struct pipe_ctx *pipe_ctx);
203 	void (*disable_audio_stream)(struct pipe_ctx *pipe_ctx);
204 
205 	/* Stereo 3D Related */
206 	void (*setup_stereo)(struct pipe_ctx *pipe_ctx, struct dc *dc);
207 
208 	/* HW State Logging Related */
209 	void (*log_hw_state)(struct dc *dc, struct dc_log_buffer_ctx *log_ctx);
210 	void (*get_hw_state)(struct dc *dc, char *pBuf,
211 			unsigned int bufSize, unsigned int mask);
212 	void (*clear_status_bits)(struct dc *dc, unsigned int mask);
213 
214 	bool (*set_backlight_level)(struct pipe_ctx *pipe_ctx,
215 			uint32_t backlight_pwm_u16_16,
216 			uint32_t frame_ramp);
217 
218 	void (*set_abm_immediate_disable)(struct pipe_ctx *pipe_ctx);
219 
220 	void (*set_pipe)(struct pipe_ctx *pipe_ctx);
221 
222 	void (*enable_dp_link_output)(struct dc_link *link,
223 			const struct link_resource *link_res,
224 			enum signal_type signal,
225 			enum clock_source_id clock_source,
226 			const struct dc_link_settings *link_settings);
227 	void (*enable_tmds_link_output)(struct dc_link *link,
228 			const struct link_resource *link_res,
229 			enum signal_type signal,
230 			enum clock_source_id clock_source,
231 			enum dc_color_depth color_depth,
232 			uint32_t pixel_clock);
233 	void (*enable_lvds_link_output)(struct dc_link *link,
234 			const struct link_resource *link_res,
235 			enum clock_source_id clock_source,
236 			uint32_t pixel_clock);
237 	void (*disable_link_output)(struct dc_link *link,
238 			const struct link_resource *link_res,
239 			enum signal_type signal);
240 
241 	void (*get_dcc_en_bits)(struct dc *dc, int *dcc_en_bits);
242 
243 	/* Idle Optimization Related */
244 	bool (*apply_idle_power_optimizations)(struct dc *dc, bool enable);
245 
246 	bool (*does_plane_fit_in_mall)(struct dc *dc, struct dc_plane_state *plane,
247 			struct dc_cursor_attributes *cursor_attr);
248 
249 	bool (*is_abm_supported)(struct dc *dc,
250 			struct dc_state *context, struct dc_stream_state *stream);
251 
252 	void (*set_disp_pattern_generator)(const struct dc *dc,
253 			struct pipe_ctx *pipe_ctx,
254 			enum controller_dp_test_pattern test_pattern,
255 			enum controller_dp_color_space color_space,
256 			enum dc_color_depth color_depth,
257 			const struct tg_color *solid_color,
258 			int width, int height, int offset);
259 
260 	void (*z10_restore)(const struct dc *dc);
261 	void (*z10_save_init)(struct dc *dc);
262 
263 	void (*update_visual_confirm_color)(struct dc *dc,
264 			struct pipe_ctx *pipe_ctx,
265 			struct tg_color *color,
266 			int mpcc_id);
267 
268 	void (*update_phantom_vp_position)(struct dc *dc,
269 			struct dc_state *context,
270 			struct pipe_ctx *phantom_pipe);
271 
272 	void (*commit_subvp_config)(struct dc *dc, struct dc_state *context);
273 	void (*subvp_pipe_control_lock)(struct dc *dc,
274 			struct dc_state *context,
275 			bool lock,
276 			bool should_lock_all_pipes,
277 			struct pipe_ctx *top_pipe_to_program,
278 			bool subvp_prev_use);
279 
280 };
281 
282 void color_space_to_black_color(
283 	const struct dc *dc,
284 	enum dc_color_space colorspace,
285 	struct tg_color *black_color);
286 
287 bool hwss_wait_for_blank_complete(
288 		struct timing_generator *tg);
289 
290 const uint16_t *find_color_matrix(
291 		enum dc_color_space color_space,
292 		uint32_t *array_size);
293 
294 void get_surface_visual_confirm_color(
295 		const struct pipe_ctx *pipe_ctx,
296 		struct tg_color *color);
297 
298 void get_subvp_visual_confirm_color(
299 	struct dc *dc,
300 	struct pipe_ctx *pipe_ctx,
301 	struct tg_color *color);
302 
303 void get_hdr_visual_confirm_color(
304 		struct pipe_ctx *pipe_ctx,
305 		struct tg_color *color);
306 void get_mpctree_visual_confirm_color(
307 		struct pipe_ctx *pipe_ctx,
308 		struct tg_color *color);
309 void get_surface_tile_visual_confirm_color(
310 		struct pipe_ctx *pipe_ctx,
311 		struct tg_color *color);
312 #endif /* __DC_HW_SEQUENCER_H__ */
313