1 /* 2 * Copyright 2015 Advanced Micro Devices, Inc. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included in 12 * all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 * 22 * Authors: AMD 23 * 24 */ 25 26 #ifndef __DC_HW_SEQUENCER_H__ 27 #define __DC_HW_SEQUENCER_H__ 28 #include "dc_types.h" 29 #include "clock_source.h" 30 #include "inc/hw/timing_generator.h" 31 #include "inc/hw/opp.h" 32 #include "inc/hw/link_encoder.h" 33 #include "core_status.h" 34 35 enum vline_select { 36 VLINE0, 37 VLINE1 38 }; 39 40 struct pipe_ctx; 41 struct dc_state; 42 struct dc_stream_status; 43 struct dc_writeback_info; 44 struct dchub_init_data; 45 struct dc_static_screen_params; 46 struct resource_pool; 47 struct dc_phy_addr_space_config; 48 struct dc_virtual_addr_space_config; 49 struct dpp; 50 struct dce_hwseq; 51 52 struct hw_sequencer_funcs { 53 void (*hardware_release)(struct dc *dc); 54 /* Embedded Display Related */ 55 void (*edp_power_control)(struct dc_link *link, bool enable); 56 void (*edp_wait_for_hpd_ready)(struct dc_link *link, bool power_up); 57 58 /* Pipe Programming Related */ 59 void (*init_hw)(struct dc *dc); 60 void (*power_down_on_boot)(struct dc *dc); 61 void (*enable_accelerated_mode)(struct dc *dc, 62 struct dc_state *context); 63 enum dc_status (*apply_ctx_to_hw)(struct dc *dc, 64 struct dc_state *context); 65 void (*disable_plane)(struct dc *dc, struct pipe_ctx *pipe_ctx); 66 void (*apply_ctx_for_surface)(struct dc *dc, 67 const struct dc_stream_state *stream, 68 int num_planes, struct dc_state *context); 69 void (*program_front_end_for_ctx)(struct dc *dc, 70 struct dc_state *context); 71 void (*wait_for_pending_cleared)(struct dc *dc, 72 struct dc_state *context); 73 void (*post_unlock_program_front_end)(struct dc *dc, 74 struct dc_state *context); 75 void (*update_plane_addr)(const struct dc *dc, 76 struct pipe_ctx *pipe_ctx); 77 void (*update_dchub)(struct dce_hwseq *hws, 78 struct dchub_init_data *dh_data); 79 void (*wait_for_mpcc_disconnect)(struct dc *dc, 80 struct resource_pool *res_pool, 81 struct pipe_ctx *pipe_ctx); 82 void (*edp_backlight_control)( 83 struct dc_link *link, 84 bool enable); 85 void (*program_triplebuffer)(const struct dc *dc, 86 struct pipe_ctx *pipe_ctx, bool enableTripleBuffer); 87 void (*update_pending_status)(struct pipe_ctx *pipe_ctx); 88 void (*power_down)(struct dc *dc); 89 90 /* Pipe Lock Related */ 91 void (*pipe_control_lock)(struct dc *dc, 92 struct pipe_ctx *pipe, bool lock); 93 void (*interdependent_update_lock)(struct dc *dc, 94 struct dc_state *context, bool lock); 95 void (*set_flip_control_gsl)(struct pipe_ctx *pipe_ctx, 96 bool flip_immediate); 97 void (*cursor_lock)(struct dc *dc, struct pipe_ctx *pipe, bool lock); 98 99 /* Timing Related */ 100 void (*get_position)(struct pipe_ctx **pipe_ctx, int num_pipes, 101 struct crtc_position *position); 102 int (*get_vupdate_offset_from_vsync)(struct pipe_ctx *pipe_ctx); 103 void (*calc_vupdate_position)( 104 struct dc *dc, 105 struct pipe_ctx *pipe_ctx, 106 uint32_t *start_line, 107 uint32_t *end_line); 108 void (*enable_per_frame_crtc_position_reset)(struct dc *dc, 109 int group_size, struct pipe_ctx *grouped_pipes[]); 110 void (*enable_timing_synchronization)(struct dc *dc, 111 int group_index, int group_size, 112 struct pipe_ctx *grouped_pipes[]); 113 void (*setup_periodic_interrupt)(struct dc *dc, 114 struct pipe_ctx *pipe_ctx, 115 enum vline_select vline); 116 void (*set_drr)(struct pipe_ctx **pipe_ctx, int num_pipes, 117 unsigned int vmin, unsigned int vmax, 118 unsigned int vmid, unsigned int vmid_frame_number); 119 void (*set_static_screen_control)(struct pipe_ctx **pipe_ctx, 120 int num_pipes, 121 const struct dc_static_screen_params *events); 122 #ifndef TRIM_FSFT 123 bool (*optimize_timing_for_fsft)(struct dc *dc, 124 struct dc_crtc_timing *timing, 125 unsigned int max_input_rate_in_khz); 126 #endif 127 128 /* Stream Related */ 129 void (*enable_stream)(struct pipe_ctx *pipe_ctx); 130 void (*disable_stream)(struct pipe_ctx *pipe_ctx); 131 void (*blank_stream)(struct pipe_ctx *pipe_ctx); 132 void (*unblank_stream)(struct pipe_ctx *pipe_ctx, 133 struct dc_link_settings *link_settings); 134 135 /* Bandwidth Related */ 136 void (*prepare_bandwidth)(struct dc *dc, struct dc_state *context); 137 bool (*update_bandwidth)(struct dc *dc, struct dc_state *context); 138 void (*optimize_bandwidth)(struct dc *dc, struct dc_state *context); 139 140 /* Infopacket Related */ 141 void (*set_avmute)(struct pipe_ctx *pipe_ctx, bool enable); 142 void (*send_immediate_sdp_message)( 143 struct pipe_ctx *pipe_ctx, 144 const uint8_t *custom_sdp_message, 145 unsigned int sdp_message_size); 146 void (*update_info_frame)(struct pipe_ctx *pipe_ctx); 147 void (*set_dmdata_attributes)(struct pipe_ctx *pipe); 148 void (*program_dmdata_engine)(struct pipe_ctx *pipe_ctx); 149 bool (*dmdata_status_done)(struct pipe_ctx *pipe_ctx); 150 151 /* Cursor Related */ 152 void (*set_cursor_position)(struct pipe_ctx *pipe); 153 void (*set_cursor_attribute)(struct pipe_ctx *pipe); 154 void (*set_cursor_sdr_white_level)(struct pipe_ctx *pipe); 155 156 /* Colour Related */ 157 void (*program_gamut_remap)(struct pipe_ctx *pipe_ctx); 158 void (*program_output_csc)(struct dc *dc, struct pipe_ctx *pipe_ctx, 159 enum dc_color_space colorspace, 160 uint16_t *matrix, int opp_id); 161 162 /* VM Related */ 163 int (*init_sys_ctx)(struct dce_hwseq *hws, 164 struct dc *dc, 165 struct dc_phy_addr_space_config *pa_config); 166 void (*init_vm_ctx)(struct dce_hwseq *hws, 167 struct dc *dc, 168 struct dc_virtual_addr_space_config *va_config, 169 int vmid); 170 171 /* Writeback Related */ 172 void (*update_writeback)(struct dc *dc, 173 struct dc_writeback_info *wb_info, 174 struct dc_state *context); 175 void (*enable_writeback)(struct dc *dc, 176 struct dc_writeback_info *wb_info, 177 struct dc_state *context); 178 void (*disable_writeback)(struct dc *dc, 179 unsigned int dwb_pipe_inst); 180 181 bool (*mmhubbub_warmup)(struct dc *dc, 182 unsigned int num_dwb, 183 struct dc_writeback_info *wb_info); 184 185 /* Clock Related */ 186 enum dc_status (*set_clock)(struct dc *dc, 187 enum dc_clock_type clock_type, 188 uint32_t clk_khz, uint32_t stepping); 189 void (*get_clock)(struct dc *dc, enum dc_clock_type clock_type, 190 struct dc_clock_config *clock_cfg); 191 void (*optimize_pwr_state)(const struct dc *dc, 192 struct dc_state *context); 193 void (*exit_optimized_pwr_state)(const struct dc *dc, 194 struct dc_state *context); 195 196 /* Audio Related */ 197 void (*enable_audio_stream)(struct pipe_ctx *pipe_ctx); 198 void (*disable_audio_stream)(struct pipe_ctx *pipe_ctx); 199 200 /* Stereo 3D Related */ 201 void (*setup_stereo)(struct pipe_ctx *pipe_ctx, struct dc *dc); 202 203 /* HW State Logging Related */ 204 void (*log_hw_state)(struct dc *dc, struct dc_log_buffer_ctx *log_ctx); 205 void (*get_hw_state)(struct dc *dc, char *pBuf, 206 unsigned int bufSize, unsigned int mask); 207 void (*clear_status_bits)(struct dc *dc, unsigned int mask); 208 209 bool (*set_backlight_level)(struct pipe_ctx *pipe_ctx, 210 uint32_t backlight_pwm_u16_16, 211 uint32_t frame_ramp); 212 213 void (*set_abm_immediate_disable)(struct pipe_ctx *pipe_ctx); 214 215 void (*set_pipe)(struct pipe_ctx *pipe_ctx); 216 217 /* Idle Optimization Related */ 218 bool (*apply_idle_power_optimizations)(struct dc *dc, bool enable); 219 220 bool (*is_abm_supported)(struct dc *dc, 221 struct dc_state *context, struct dc_stream_state *stream); 222 223 void (*set_disp_pattern_generator)(const struct dc *dc, 224 struct pipe_ctx *pipe_ctx, 225 enum controller_dp_test_pattern test_pattern, 226 enum controller_dp_color_space color_space, 227 enum dc_color_depth color_depth, 228 const struct tg_color *solid_color, 229 int width, int height, int offset); 230 }; 231 232 void color_space_to_black_color( 233 const struct dc *dc, 234 enum dc_color_space colorspace, 235 struct tg_color *black_color); 236 237 bool hwss_wait_for_blank_complete( 238 struct timing_generator *tg); 239 240 const uint16_t *find_color_matrix( 241 enum dc_color_space color_space, 242 uint32_t *array_size); 243 244 #endif /* __DC_HW_SEQUENCER_H__ */ 245