1 /* 2 * Copyright 2012-15 Advanced Micro Devices, Inc. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included in 12 * all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 * 22 * Authors: AMD 23 * 24 */ 25 26 #ifndef __DAL_OPP_H__ 27 #define __DAL_OPP_H__ 28 29 #include "hw_shared.h" 30 #include "dc_hw_types.h" 31 #include "transform.h" 32 33 struct fixed31_32; 34 35 /* TODO: Need cleanup */ 36 enum clamping_range { 37 CLAMPING_FULL_RANGE = 0, /* No Clamping */ 38 CLAMPING_LIMITED_RANGE_8BPC, /* 8 bpc: Clamping 1 to FE */ 39 CLAMPING_LIMITED_RANGE_10BPC, /* 10 bpc: Clamping 4 to 3FB */ 40 CLAMPING_LIMITED_RANGE_12BPC, /* 12 bpc: Clamping 10 to FEF */ 41 /* Use programmable clampping value on FMT_CLAMP_COMPONENT_R/G/B. */ 42 CLAMPING_LIMITED_RANGE_PROGRAMMABLE 43 }; 44 45 struct clamping_and_pixel_encoding_params { 46 enum dc_pixel_encoding pixel_encoding; /* Pixel Encoding */ 47 enum clamping_range clamping_level; /* Clamping identifier */ 48 enum dc_color_depth c_depth; /* Deep color use. */ 49 }; 50 51 struct bit_depth_reduction_params { 52 struct { 53 /* truncate/round */ 54 /* trunc/round enabled*/ 55 uint32_t TRUNCATE_ENABLED:1; 56 /* 2 bits: 0=6 bpc, 1=8 bpc, 2 = 10bpc*/ 57 uint32_t TRUNCATE_DEPTH:2; 58 /* truncate or round*/ 59 uint32_t TRUNCATE_MODE:1; 60 61 /* spatial dither */ 62 /* Spatial Bit Depth Reduction enabled*/ 63 uint32_t SPATIAL_DITHER_ENABLED:1; 64 /* 2 bits: 0=6 bpc, 1 = 8 bpc, 2 = 10bpc*/ 65 uint32_t SPATIAL_DITHER_DEPTH:2; 66 /* 0-3 to select patterns*/ 67 uint32_t SPATIAL_DITHER_MODE:2; 68 /* Enable RGB random dithering*/ 69 uint32_t RGB_RANDOM:1; 70 /* Enable Frame random dithering*/ 71 uint32_t FRAME_RANDOM:1; 72 /* Enable HighPass random dithering*/ 73 uint32_t HIGHPASS_RANDOM:1; 74 75 /* temporal dither*/ 76 /* frame modulation enabled*/ 77 uint32_t FRAME_MODULATION_ENABLED:1; 78 /* same as for trunc/spatial*/ 79 uint32_t FRAME_MODULATION_DEPTH:2; 80 /* 2/4 gray levels*/ 81 uint32_t TEMPORAL_LEVEL:1; 82 uint32_t FRC25:2; 83 uint32_t FRC50:2; 84 uint32_t FRC75:2; 85 } flags; 86 87 uint32_t r_seed_value; 88 uint32_t b_seed_value; 89 uint32_t g_seed_value; 90 enum dc_pixel_encoding pixel_encoding; 91 }; 92 93 enum wide_gamut_regamma_mode { 94 /* 0x0 - BITS2:0 Bypass */ 95 WIDE_GAMUT_REGAMMA_MODE_GRAPHICS_BYPASS, 96 /* 0x1 - Fixed curve sRGB 2.4 */ 97 WIDE_GAMUT_REGAMMA_MODE_GRAPHICS_SRGB24, 98 /* 0x2 - Fixed curve xvYCC 2.22 */ 99 WIDE_GAMUT_REGAMMA_MODE_GRAPHICS_XYYCC22, 100 /* 0x3 - Programmable control A */ 101 WIDE_GAMUT_REGAMMA_MODE_GRAPHICS_MATRIX_A, 102 /* 0x4 - Programmable control B */ 103 WIDE_GAMUT_REGAMMA_MODE_GRAPHICS_MATRIX_B, 104 /* 0x0 - BITS6:4 Bypass */ 105 WIDE_GAMUT_REGAMMA_MODE_OVL_BYPASS, 106 /* 0x1 - Fixed curve sRGB 2.4 */ 107 WIDE_GAMUT_REGAMMA_MODE_OVL_SRGB24, 108 /* 0x2 - Fixed curve xvYCC 2.22 */ 109 WIDE_GAMUT_REGAMMA_MODE_OVL_XYYCC22, 110 /* 0x3 - Programmable control A */ 111 WIDE_GAMUT_REGAMMA_MODE_OVL_MATRIX_A, 112 /* 0x4 - Programmable control B */ 113 WIDE_GAMUT_REGAMMA_MODE_OVL_MATRIX_B 114 }; 115 116 struct gamma_pixel { 117 struct fixed31_32 r; 118 struct fixed31_32 g; 119 struct fixed31_32 b; 120 }; 121 122 enum channel_name { 123 CHANNEL_NAME_RED, 124 CHANNEL_NAME_GREEN, 125 CHANNEL_NAME_BLUE 126 }; 127 128 struct custom_float_format { 129 uint32_t mantissa_bits; 130 uint32_t exponenta_bits; 131 bool sign; 132 }; 133 134 struct custom_float_value { 135 uint32_t mantissa; 136 uint32_t exponenta; 137 uint32_t value; 138 bool negative; 139 }; 140 141 struct hw_x_point { 142 uint32_t custom_float_x; 143 struct fixed31_32 x; 144 struct fixed31_32 regamma_y_red; 145 struct fixed31_32 regamma_y_green; 146 struct fixed31_32 regamma_y_blue; 147 148 }; 149 150 struct pwl_float_data_ex { 151 struct fixed31_32 r; 152 struct fixed31_32 g; 153 struct fixed31_32 b; 154 struct fixed31_32 delta_r; 155 struct fixed31_32 delta_g; 156 struct fixed31_32 delta_b; 157 }; 158 159 enum hw_point_position { 160 /* hw point sits between left and right sw points */ 161 HW_POINT_POSITION_MIDDLE, 162 /* hw point lays left from left (smaller) sw point */ 163 HW_POINT_POSITION_LEFT, 164 /* hw point lays stays from right (bigger) sw point */ 165 HW_POINT_POSITION_RIGHT 166 }; 167 168 struct gamma_point { 169 int32_t left_index; 170 int32_t right_index; 171 enum hw_point_position pos; 172 struct fixed31_32 coeff; 173 }; 174 175 struct pixel_gamma_point { 176 struct gamma_point r; 177 struct gamma_point g; 178 struct gamma_point b; 179 }; 180 181 struct gamma_coefficients { 182 struct fixed31_32 a0[3]; 183 struct fixed31_32 a1[3]; 184 struct fixed31_32 a2[3]; 185 struct fixed31_32 a3[3]; 186 struct fixed31_32 user_gamma[3]; 187 struct fixed31_32 user_contrast; 188 struct fixed31_32 user_brightness; 189 }; 190 191 struct pwl_float_data { 192 struct fixed31_32 r; 193 struct fixed31_32 g; 194 struct fixed31_32 b; 195 }; 196 197 struct mpc_tree_cfg { 198 int num_pipes; 199 int dpp[MAX_PIPES]; 200 int mpcc[MAX_PIPES]; 201 }; 202 203 struct output_pixel_processor { 204 struct dc_context *ctx; 205 uint32_t inst; 206 struct pwl_params regamma_params; 207 struct mpc_tree_cfg mpc_tree; 208 bool mpcc_disconnect_pending[MAX_PIPES]; 209 const struct opp_funcs *funcs; 210 }; 211 212 enum fmt_stereo_action { 213 FMT_STEREO_ACTION_ENABLE = 0, 214 FMT_STEREO_ACTION_DISABLE, 215 FMT_STEREO_ACTION_UPDATE_POLARITY 216 }; 217 218 struct opp_grph_csc_adjustment { 219 //enum grph_color_adjust_option color_adjust_option; 220 enum dc_color_space c_space; 221 enum dc_color_depth color_depth; /* clean up to uint32_t */ 222 enum graphics_csc_adjust_type csc_adjust_type; 223 int32_t adjust_divider; 224 int32_t grph_cont; 225 int32_t grph_sat; 226 int32_t grph_bright; 227 int32_t grph_hue; 228 }; 229 230 /* Underlay related types */ 231 232 struct hw_adjustment_range { 233 int32_t hw_default; 234 int32_t min; 235 int32_t max; 236 int32_t step; 237 uint32_t divider; /* (actually HW range is min/divider; divider !=0) */ 238 }; 239 240 enum ovl_csc_adjust_item { 241 OVERLAY_BRIGHTNESS = 0, 242 OVERLAY_GAMMA, 243 OVERLAY_CONTRAST, 244 OVERLAY_SATURATION, 245 OVERLAY_HUE, 246 OVERLAY_ALPHA, 247 OVERLAY_ALPHA_PER_PIX, 248 OVERLAY_COLOR_TEMPERATURE 249 }; 250 251 struct opp_funcs { 252 253 254 /* FORMATTER RELATED */ 255 256 void (*opp_program_fmt)( 257 struct output_pixel_processor *opp, 258 struct bit_depth_reduction_params *fmt_bit_depth, 259 struct clamping_and_pixel_encoding_params *clamping); 260 261 void (*opp_set_dyn_expansion)( 262 struct output_pixel_processor *opp, 263 enum dc_color_space color_sp, 264 enum dc_color_depth color_dpth, 265 enum signal_type signal); 266 267 void (*opp_program_bit_depth_reduction)( 268 struct output_pixel_processor *opp, 269 const struct bit_depth_reduction_params *params); 270 271 /* underlay related */ 272 void (*opp_get_underlay_adjustment_range)( 273 struct output_pixel_processor *opp, 274 enum ovl_csc_adjust_item overlay_adjust_item, 275 struct hw_adjustment_range *range); 276 277 void (*opp_destroy)(struct output_pixel_processor **opp); 278 279 void (*opp_set_stereo_polarity)( 280 struct output_pixel_processor *opp, 281 bool enable, 282 bool rightEyePolarity); 283 284 void (*opp_set_test_pattern)( 285 struct output_pixel_processor *opp, 286 bool enable); 287 }; 288 289 #endif 290