xref: /openbmc/linux/drivers/gpu/drm/amd/display/dc/inc/hw/opp.h (revision 667e1498)
1 /*
2  * Copyright 2012-15 Advanced Micro Devices, Inc.
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a
5  * copy of this software and associated documentation files (the "Software"),
6  * to deal in the Software without restriction, including without limitation
7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8  * and/or sell copies of the Software, and to permit persons to whom the
9  * Software is furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice shall be included in
12  * all copies or substantial portions of the Software.
13  *
14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20  * OTHER DEALINGS IN THE SOFTWARE.
21  *
22  * Authors: AMD
23  *
24  */
25 
26 #ifndef __DAL_OPP_H__
27 #define __DAL_OPP_H__
28 
29 #include "hw_shared.h"
30 #include "transform.h"
31 
32 struct fixed31_32;
33 
34 /* TODO: Need cleanup */
35 enum clamping_range {
36 	CLAMPING_FULL_RANGE = 0,	   /* No Clamping */
37 	CLAMPING_LIMITED_RANGE_8BPC,   /* 8  bpc: Clamping 1  to FE */
38 	CLAMPING_LIMITED_RANGE_10BPC, /* 10 bpc: Clamping 4  to 3FB */
39 	CLAMPING_LIMITED_RANGE_12BPC, /* 12 bpc: Clamping 10 to FEF */
40 	/* Use programmable clampping value on FMT_CLAMP_COMPONENT_R/G/B. */
41 	CLAMPING_LIMITED_RANGE_PROGRAMMABLE
42 };
43 
44 struct clamping_and_pixel_encoding_params {
45 	enum dc_pixel_encoding pixel_encoding; /* Pixel Encoding */
46 	enum clamping_range clamping_level; /* Clamping identifier */
47 	enum dc_color_depth c_depth; /* Deep color use. */
48 };
49 
50 struct bit_depth_reduction_params {
51 	struct {
52 		/* truncate/round */
53 		/* trunc/round enabled*/
54 		uint32_t TRUNCATE_ENABLED:1;
55 		/* 2 bits: 0=6 bpc, 1=8 bpc, 2 = 10bpc*/
56 		uint32_t TRUNCATE_DEPTH:2;
57 		/* truncate or round*/
58 		uint32_t TRUNCATE_MODE:1;
59 
60 		/* spatial dither */
61 		/* Spatial Bit Depth Reduction enabled*/
62 		uint32_t SPATIAL_DITHER_ENABLED:1;
63 		/* 2 bits: 0=6 bpc, 1 = 8 bpc, 2 = 10bpc*/
64 		uint32_t SPATIAL_DITHER_DEPTH:2;
65 		/* 0-3 to select patterns*/
66 		uint32_t SPATIAL_DITHER_MODE:2;
67 		/* Enable RGB random dithering*/
68 		uint32_t RGB_RANDOM:1;
69 		/* Enable Frame random dithering*/
70 		uint32_t FRAME_RANDOM:1;
71 		/* Enable HighPass random dithering*/
72 		uint32_t HIGHPASS_RANDOM:1;
73 
74 		/* temporal dither*/
75 		 /* frame modulation enabled*/
76 		uint32_t FRAME_MODULATION_ENABLED:1;
77 		/* same as for trunc/spatial*/
78 		uint32_t FRAME_MODULATION_DEPTH:2;
79 		/* 2/4 gray levels*/
80 		uint32_t TEMPORAL_LEVEL:1;
81 		uint32_t FRC25:2;
82 		uint32_t FRC50:2;
83 		uint32_t FRC75:2;
84 	} flags;
85 
86 	uint32_t r_seed_value;
87 	uint32_t b_seed_value;
88 	uint32_t g_seed_value;
89 	enum dc_pixel_encoding pixel_encoding;
90 };
91 
92 enum wide_gamut_regamma_mode {
93 	/*  0x0  - BITS2:0 Bypass */
94 	WIDE_GAMUT_REGAMMA_MODE_GRAPHICS_BYPASS,
95 	/*  0x1  - Fixed curve sRGB 2.4 */
96 	WIDE_GAMUT_REGAMMA_MODE_GRAPHICS_SRGB24,
97 	/*  0x2  - Fixed curve xvYCC 2.22 */
98 	WIDE_GAMUT_REGAMMA_MODE_GRAPHICS_XYYCC22,
99 	/*  0x3  - Programmable control A */
100 	WIDE_GAMUT_REGAMMA_MODE_GRAPHICS_MATRIX_A,
101 	/*  0x4  - Programmable control B */
102 	WIDE_GAMUT_REGAMMA_MODE_GRAPHICS_MATRIX_B,
103 	/*  0x0  - BITS6:4 Bypass */
104 	WIDE_GAMUT_REGAMMA_MODE_OVL_BYPASS,
105 	/*  0x1  - Fixed curve sRGB 2.4 */
106 	WIDE_GAMUT_REGAMMA_MODE_OVL_SRGB24,
107 	/*  0x2  - Fixed curve xvYCC 2.22 */
108 	WIDE_GAMUT_REGAMMA_MODE_OVL_XYYCC22,
109 	/*  0x3  - Programmable control A */
110 	WIDE_GAMUT_REGAMMA_MODE_OVL_MATRIX_A,
111 	/*  0x4  - Programmable control B */
112 	WIDE_GAMUT_REGAMMA_MODE_OVL_MATRIX_B
113 };
114 
115 struct gamma_pixel {
116 	struct fixed31_32 r;
117 	struct fixed31_32 g;
118 	struct fixed31_32 b;
119 };
120 
121 enum channel_name {
122 	CHANNEL_NAME_RED,
123 	CHANNEL_NAME_GREEN,
124 	CHANNEL_NAME_BLUE
125 };
126 
127 struct custom_float_format {
128 	uint32_t mantissa_bits;
129 	uint32_t exponenta_bits;
130 	bool sign;
131 };
132 
133 struct custom_float_value {
134 	uint32_t mantissa;
135 	uint32_t exponenta;
136 	uint32_t value;
137 	bool negative;
138 };
139 
140 struct hw_x_point {
141 	uint32_t custom_float_x;
142 	struct fixed31_32 x;
143 	struct fixed31_32 regamma_y_red;
144 	struct fixed31_32 regamma_y_green;
145 	struct fixed31_32 regamma_y_blue;
146 
147 };
148 
149 struct pwl_float_data_ex {
150 	struct fixed31_32 r;
151 	struct fixed31_32 g;
152 	struct fixed31_32 b;
153 	struct fixed31_32 delta_r;
154 	struct fixed31_32 delta_g;
155 	struct fixed31_32 delta_b;
156 };
157 
158 enum hw_point_position {
159 	/* hw point sits between left and right sw points */
160 	HW_POINT_POSITION_MIDDLE,
161 	/* hw point lays left from left (smaller) sw point */
162 	HW_POINT_POSITION_LEFT,
163 	/* hw point lays stays from right (bigger) sw point */
164 	HW_POINT_POSITION_RIGHT
165 };
166 
167 struct gamma_point {
168 	int32_t left_index;
169 	int32_t right_index;
170 	enum hw_point_position pos;
171 	struct fixed31_32 coeff;
172 };
173 
174 struct pixel_gamma_point {
175 	struct gamma_point r;
176 	struct gamma_point g;
177 	struct gamma_point b;
178 };
179 
180 struct gamma_coefficients {
181 	struct fixed31_32 a0[3];
182 	struct fixed31_32 a1[3];
183 	struct fixed31_32 a2[3];
184 	struct fixed31_32 a3[3];
185 	struct fixed31_32 user_gamma[3];
186 	struct fixed31_32 user_contrast;
187 	struct fixed31_32 user_brightness;
188 };
189 
190 struct pwl_float_data {
191 	struct fixed31_32 r;
192 	struct fixed31_32 g;
193 	struct fixed31_32 b;
194 };
195 
196 enum opp_regamma {
197 	OPP_REGAMMA_BYPASS = 0,
198 	OPP_REGAMMA_SRGB,
199 	OPP_REGAMMA_3_6,
200 	OPP_REGAMMA_USER,
201 };
202 
203 struct output_pixel_processor {
204 	struct dc_context *ctx;
205 	uint32_t inst;
206 	struct pwl_params *regamma_params;
207 	const struct opp_funcs *funcs;
208 };
209 
210 enum fmt_stereo_action {
211 	FMT_STEREO_ACTION_ENABLE = 0,
212 	FMT_STEREO_ACTION_DISABLE,
213 	FMT_STEREO_ACTION_UPDATE_POLARITY
214 };
215 
216 enum graphics_csc_adjust_type {
217 	GRAPHICS_CSC_ADJUST_TYPE_BYPASS = 0,
218 	GRAPHICS_CSC_ADJUST_TYPE_HW, /* without adjustments */
219 	GRAPHICS_CSC_ADJUST_TYPE_SW  /*use adjustments */
220 };
221 
222 struct default_adjustment {
223 	enum lb_pixel_depth lb_color_depth;
224 	enum dc_color_space out_color_space;
225 	enum dc_color_space in_color_space;
226 	enum dc_color_depth color_depth;
227 	enum pixel_format surface_pixel_format;
228 	enum graphics_csc_adjust_type csc_adjust_type;
229 	bool force_hw_default;
230 };
231 
232 enum grph_color_adjust_option {
233 	GRPH_COLOR_MATRIX_HW_DEFAULT = 1,
234 	GRPH_COLOR_MATRIX_SW
235 };
236 
237 struct opp_grph_csc_adjustment {
238 	enum grph_color_adjust_option color_adjust_option;
239 	enum dc_color_space c_space;
240 	enum dc_color_depth color_depth; /* clean up to uint32_t */
241 	enum graphics_csc_adjust_type   csc_adjust_type;
242 	int32_t adjust_divider;
243 	int32_t grph_cont;
244 	int32_t grph_sat;
245 	int32_t grph_bright;
246 	int32_t grph_hue;
247 };
248 
249 struct out_csc_color_matrix {
250 	enum dc_color_space color_space;
251 	uint16_t regval[12];
252 };
253 
254 /* Underlay related types */
255 
256 struct hw_adjustment_range {
257 	int32_t hw_default;
258 	int32_t min;
259 	int32_t max;
260 	int32_t step;
261 	uint32_t divider; /* (actually HW range is min/divider; divider !=0) */
262 };
263 
264 enum ovl_csc_adjust_item {
265 	OVERLAY_BRIGHTNESS = 0,
266 	OVERLAY_GAMMA,
267 	OVERLAY_CONTRAST,
268 	OVERLAY_SATURATION,
269 	OVERLAY_HUE,
270 	OVERLAY_ALPHA,
271 	OVERLAY_ALPHA_PER_PIX,
272 	OVERLAY_COLOR_TEMPERATURE
273 };
274 
275 struct opp_funcs {
276 	void (*opp_power_on_regamma_lut)(
277 		struct output_pixel_processor *opp,
278 		bool power_on);
279 
280 	bool (*opp_program_regamma_pwl)(
281 		struct output_pixel_processor *opp,
282 		const struct pwl_params *params);
283 
284 	void (*opp_set_regamma_mode)(struct output_pixel_processor *opp,
285 			enum opp_regamma mode);
286 
287 	void (*opp_set_csc_adjustment)(
288 		struct output_pixel_processor *opp,
289 		const struct out_csc_color_matrix *tbl_entry);
290 
291 	void (*opp_set_csc_default)(
292 		struct output_pixel_processor *opp,
293 		const struct default_adjustment *default_adjust);
294 
295 	/* FORMATTER RELATED */
296 
297 	void (*opp_program_fmt)(
298 			struct output_pixel_processor *opp,
299 			struct bit_depth_reduction_params *fmt_bit_depth,
300 			struct clamping_and_pixel_encoding_params *clamping);
301 
302 	void (*opp_set_dyn_expansion)(
303 		struct output_pixel_processor *opp,
304 		enum dc_color_space color_sp,
305 		enum dc_color_depth color_dpth,
306 		enum signal_type signal);
307 
308 	void (*opp_program_bit_depth_reduction)(
309 		struct output_pixel_processor *opp,
310 		const struct bit_depth_reduction_params *params);
311 
312 	/* underlay related */
313 	void (*opp_get_underlay_adjustment_range)(
314 			struct output_pixel_processor *opp,
315 			enum ovl_csc_adjust_item overlay_adjust_item,
316 			struct hw_adjustment_range *range);
317 
318 	void (*opp_destroy)(struct output_pixel_processor **opp);
319 };
320 
321 #endif
322