xref: /openbmc/linux/drivers/gpu/drm/amd/display/dc/inc/hw/ipp.h (revision fb3466a4)
1 /*
2  * Copyright 2017 Advanced Micro Devices, Inc.
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a
5  * copy of this software and associated documentation files (the "Software"),
6  * to deal in the Software without restriction, including without limitation
7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8  * and/or sell copies of the Software, and to permit persons to whom the
9  * Software is furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice shall be included in
12  * all copies or substantial portions of the Software.
13  *
14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20  * OTHER DEALINGS IN THE SOFTWARE.
21  *
22  * Authors: AMD
23  *
24  */
25 
26 #ifndef __DAL_IPP_H__
27 #define __DAL_IPP_H__
28 
29 #include "hw_shared.h"
30 #include "dc_hw_types.h"
31 
32 #define MAXTRIX_COEFFICIENTS_NUMBER 12
33 #define MAXTRIX_COEFFICIENTS_WRAP_NUMBER (MAXTRIX_COEFFICIENTS_NUMBER + 4)
34 #define MAX_OVL_MATRIX_COUNT 12
35 
36 /* IPP RELATED */
37 struct input_pixel_processor {
38 	struct  dc_context *ctx;
39 	unsigned int inst;
40 	const struct ipp_funcs *funcs;
41 };
42 
43 enum ipp_prescale_mode {
44 	IPP_PRESCALE_MODE_BYPASS,
45 	IPP_PRESCALE_MODE_FIXED_SIGNED,
46 	IPP_PRESCALE_MODE_FLOAT_SIGNED,
47 	IPP_PRESCALE_MODE_FIXED_UNSIGNED,
48 	IPP_PRESCALE_MODE_FLOAT_UNSIGNED
49 };
50 
51 struct ipp_prescale_params {
52 	enum ipp_prescale_mode mode;
53 	uint16_t bias;
54 	uint16_t scale;
55 };
56 
57 enum ipp_degamma_mode {
58 	IPP_DEGAMMA_MODE_BYPASS,
59 	IPP_DEGAMMA_MODE_HW_sRGB,
60 	IPP_DEGAMMA_MODE_HW_xvYCC,
61 	IPP_DEGAMMA_MODE_USER_PWL
62 };
63 
64 enum ovl_color_space {
65 	OVL_COLOR_SPACE_UNKNOWN = 0,
66 	OVL_COLOR_SPACE_RGB,
67 	OVL_COLOR_SPACE_YUV601,
68 	OVL_COLOR_SPACE_YUV709
69 };
70 
71 enum expansion_mode {
72 	EXPANSION_MODE_DYNAMIC,
73 	EXPANSION_MODE_ZERO
74 };
75 
76 enum ipp_output_format {
77 	IPP_OUTPUT_FORMAT_12_BIT_FIX,
78 	IPP_OUTPUT_FORMAT_16_BIT_BYPASS,
79 	IPP_OUTPUT_FORMAT_FLOAT
80 };
81 
82 struct ipp_funcs {
83 
84 	/*** cursor ***/
85 	void (*ipp_cursor_set_position)(
86 		struct input_pixel_processor *ipp,
87 		const struct dc_cursor_position *position,
88 		const struct dc_cursor_mi_param *param);
89 
90 	void (*ipp_cursor_set_attributes)(
91 		struct input_pixel_processor *ipp,
92 		const struct dc_cursor_attributes *attributes);
93 
94 	/*** setup input pixel processing ***/
95 
96 	/* put the entire pixel processor to bypass */
97 	void (*ipp_full_bypass)(
98 			struct input_pixel_processor *ipp);
99 
100 	/* setup ipp to expand/convert input to pixel processor internal format */
101 	void (*ipp_setup)(
102 		struct input_pixel_processor *ipp,
103 		enum surface_pixel_format input_format,
104 		enum expansion_mode mode,
105 		enum ipp_output_format output_format);
106 
107 	/* DCE function to setup IPP.  TODO: see if we can consolidate to setup */
108 	void (*ipp_program_prescale)(
109 			struct input_pixel_processor *ipp,
110 			struct ipp_prescale_params *params);
111 
112 	void (*ipp_program_input_lut)(
113 			struct input_pixel_processor *ipp,
114 			const struct dc_gamma *gamma);
115 
116 	/*** DEGAMMA RELATED ***/
117 	void (*ipp_set_degamma)(
118 		struct input_pixel_processor *ipp,
119 		enum ipp_degamma_mode mode);
120 
121 	void (*ipp_program_degamma_pwl)(
122 		struct input_pixel_processor *ipp,
123 		const struct pwl_params *params);
124 
125 	void (*ipp_destroy)(struct input_pixel_processor **ipp);
126 };
127 
128 #endif /* __DAL_IPP_H__ */
129