xref: /openbmc/linux/drivers/gpu/drm/amd/display/dc/inc/hw/hubp.h (revision 234de272)
1 /*
2  * Copyright 2012-15 Advanced Micro Devices, Inc.
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a
5  * copy of this software and associated documentation files (the "Software"),
6  * to deal in the Software without restriction, including without limitation
7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8  * and/or sell copies of the Software, and to permit persons to whom the
9  * Software is furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice shall be included in
12  * all copies or substantial portions of the Software.
13  *
14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20  * OTHER DEALINGS IN THE SOFTWARE.
21  *
22  * Authors: AMD
23  *
24  */
25 
26 #ifndef __DAL_HUBP_H__
27 #define __DAL_HUBP_H__
28 
29 #include "mem_input.h"
30 
31 #define OPP_ID_INVALID 0xf
32 
33 
34 enum cursor_pitch {
35 	CURSOR_PITCH_64_PIXELS = 0,
36 	CURSOR_PITCH_128_PIXELS,
37 	CURSOR_PITCH_256_PIXELS
38 };
39 
40 enum cursor_lines_per_chunk {
41 	CURSOR_LINE_PER_CHUNK_1 = 0, /* new for DCN2 */
42 	CURSOR_LINE_PER_CHUNK_2 = 1,
43 	CURSOR_LINE_PER_CHUNK_4,
44 	CURSOR_LINE_PER_CHUNK_8,
45 	CURSOR_LINE_PER_CHUNK_16
46 };
47 
48 enum hubp_ind_block_size {
49 	hubp_ind_block_unconstrained = 0,
50 	hubp_ind_block_64b,
51 #if defined(CONFIG_DRM_AMD_DC_DCN3_0)
52 	hubp_ind_block_128b,
53 	hubp_ind_block_64b_no_128bcl,
54 #endif
55 };
56 
57 struct hubp {
58 	const struct hubp_funcs *funcs;
59 	struct dc_context *ctx;
60 	struct dc_plane_address request_address;
61 	int inst;
62 
63 	/* run time states */
64 	int opp_id;
65 	int mpcc_id;
66 	struct dc_cursor_attributes curs_attr;
67 	bool power_gated;
68 };
69 
70 struct surface_flip_registers {
71 	uint32_t DCSURF_SURFACE_CONTROL;
72 	uint32_t DCSURF_PRIMARY_META_SURFACE_ADDRESS_HIGH;
73 	uint32_t DCSURF_PRIMARY_META_SURFACE_ADDRESS;
74 	uint32_t DCSURF_PRIMARY_SURFACE_ADDRESS_HIGH;
75 	uint32_t DCSURF_PRIMARY_SURFACE_ADDRESS;
76 	uint32_t DCSURF_PRIMARY_META_SURFACE_ADDRESS_HIGH_C;
77 	uint32_t DCSURF_PRIMARY_META_SURFACE_ADDRESS_C;
78 	uint32_t DCSURF_PRIMARY_SURFACE_ADDRESS_HIGH_C;
79 	uint32_t DCSURF_PRIMARY_SURFACE_ADDRESS_C;
80 	uint32_t DCSURF_SECONDARY_META_SURFACE_ADDRESS_HIGH;
81 	uint32_t DCSURF_SECONDARY_META_SURFACE_ADDRESS;
82 	uint32_t DCSURF_SECONDARY_SURFACE_ADDRESS_HIGH;
83 	uint32_t DCSURF_SECONDARY_SURFACE_ADDRESS;
84 	bool tmz_surface;
85 	bool immediate;
86 	uint8_t vmid;
87 	bool grph_stereo;
88 };
89 
90 struct hubp_funcs {
91 	void (*hubp_setup)(
92 			struct hubp *hubp,
93 			struct _vcs_dpi_display_dlg_regs_st *dlg_regs,
94 			struct _vcs_dpi_display_ttu_regs_st *ttu_regs,
95 			struct _vcs_dpi_display_rq_regs_st *rq_regs,
96 			struct _vcs_dpi_display_pipe_dest_params_st *pipe_dest);
97 
98 	void (*hubp_setup_interdependent)(
99 			struct hubp *hubp,
100 			struct _vcs_dpi_display_dlg_regs_st *dlg_regs,
101 			struct _vcs_dpi_display_ttu_regs_st *ttu_regs);
102 
103 	void (*dcc_control)(struct hubp *hubp, bool enable,
104 			enum hubp_ind_block_size blk_size);
105 
106 	void (*mem_program_viewport)(
107 			struct hubp *hubp,
108 			const struct rect *viewport,
109 			const struct rect *viewport_c);
110 
111 	bool (*hubp_program_surface_flip_and_addr)(
112 		struct hubp *hubp,
113 		const struct dc_plane_address *address,
114 		bool flip_immediate);
115 
116 	void (*hubp_program_pte_vm)(
117 		struct hubp *hubp,
118 		enum surface_pixel_format format,
119 		union dc_tiling_info *tiling_info,
120 		enum dc_rotation_angle rotation);
121 
122 	void (*hubp_set_vm_system_aperture_settings)(
123 			struct hubp *hubp,
124 			struct vm_system_aperture_param *apt);
125 
126 	void (*hubp_set_vm_context0_settings)(
127 			struct hubp *hubp,
128 			const struct vm_context0_param *vm0);
129 
130 	void (*hubp_program_surface_config)(
131 		struct hubp *hubp,
132 		enum surface_pixel_format format,
133 		union dc_tiling_info *tiling_info,
134 		struct plane_size *plane_size,
135 		enum dc_rotation_angle rotation,
136 		struct dc_plane_dcc_param *dcc,
137 		bool horizontal_mirror,
138 		unsigned int compa_level);
139 
140 	bool (*hubp_is_flip_pending)(struct hubp *hubp);
141 
142 	void (*set_blank)(struct hubp *hubp, bool blank);
143 	void (*set_hubp_blank_en)(struct hubp *hubp, bool blank);
144 
145 	void (*set_cursor_attributes)(
146 			struct hubp *hubp,
147 			const struct dc_cursor_attributes *attr);
148 
149 	void (*set_cursor_position)(
150 			struct hubp *hubp,
151 			const struct dc_cursor_position *pos,
152 			const struct dc_cursor_mi_param *param);
153 
154 	void (*hubp_disconnect)(struct hubp *hubp);
155 
156 	void (*hubp_clk_cntl)(struct hubp *hubp, bool enable);
157 	void (*hubp_vtg_sel)(struct hubp *hubp, uint32_t otg_inst);
158 	void (*hubp_read_state)(struct hubp *hubp);
159 	void (*hubp_clear_underflow)(struct hubp *hubp);
160 	void (*hubp_disable_control)(struct hubp *hubp, bool disable_hubp);
161 	unsigned int (*hubp_get_underflow_status)(struct hubp *hubp);
162 	void (*hubp_init)(struct hubp *hubp);
163 
164 	void (*dmdata_set_attributes)(
165 			struct hubp *hubp,
166 			const struct dc_dmdata_attributes *attr);
167 
168 	void (*dmdata_load)(
169 			struct hubp *hubp,
170 			uint32_t dmdata_sw_size,
171 			const uint32_t *dmdata_sw_data);
172 	bool (*dmdata_status_done)(struct hubp *hubp);
173 	void (*hubp_enable_tripleBuffer)(
174 		struct hubp *hubp,
175 		bool enable);
176 
177 	bool (*hubp_is_triplebuffer_enabled)(
178 		struct hubp *hubp);
179 
180 	void (*hubp_set_flip_control_surface_gsl)(
181 		struct hubp *hubp,
182 		bool enable);
183 
184 	void (*validate_dml_output)(
185 			struct hubp *hubp,
186 			struct dc_context *ctx,
187 			struct _vcs_dpi_display_rq_regs_st *dml_rq_regs,
188 			struct _vcs_dpi_display_dlg_regs_st *dml_dlg_attr,
189 			struct _vcs_dpi_display_ttu_regs_st *dml_ttu_attr);
190 #if defined(CONFIG_DRM_AMD_DC_DCN3_01)
191 	void (*set_unbounded_requesting)(
192 		struct hubp *hubp,
193 		bool enable);
194 #endif
195 
196 };
197 
198 #endif
199