1 /*
2  * Copyright 2012-15 Advanced Micro Devices, Inc.
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a
5  * copy of this software and associated documentation files (the "Software"),
6  * to deal in the Software without restriction, including without limitation
7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8  * and/or sell copies of the Software, and to permit persons to whom the
9  * Software is furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice shall be included in
12  * all copies or substantial portions of the Software.
13  *
14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20  * OTHER DEALINGS IN THE SOFTWARE.
21  *
22  * Authors: AMD
23  *
24  */
25 
26 #ifndef __DAL_DCHUBBUB_H__
27 #define __DAL_DCHUBBUB_H__
28 
29 
30 enum dcc_control {
31 	dcc_control__256_256_xxx,
32 	dcc_control__128_128_xxx,
33 	dcc_control__256_64_64,
34 };
35 
36 enum segment_order {
37 	segment_order__na,
38 	segment_order__contiguous,
39 	segment_order__non_contiguous,
40 };
41 
42 struct dcn_hubbub_wm_set {
43 	uint32_t wm_set;
44 	uint32_t data_urgent;
45 	uint32_t pte_meta_urgent;
46 	uint32_t sr_enter;
47 	uint32_t sr_exit;
48 	uint32_t dram_clk_chanage;
49 };
50 
51 struct dcn_hubbub_wm {
52 	struct dcn_hubbub_wm_set sets[4];
53 };
54 
55 struct hubbub_funcs {
56 	void (*update_dchub)(
57 			struct hubbub *hubbub,
58 			struct dchub_init_data *dh_data);
59 
60 	bool (*get_dcc_compression_cap)(struct hubbub *hubbub,
61 			const struct dc_dcc_surface_param *input,
62 			struct dc_surface_dcc_cap *output);
63 
64 	bool (*dcc_support_swizzle)(
65 			enum swizzle_mode_values swizzle,
66 			unsigned int bytes_per_element,
67 			enum segment_order *segment_order_horz,
68 			enum segment_order *segment_order_vert);
69 
70 	bool (*dcc_support_pixel_format)(
71 			enum surface_pixel_format format,
72 			unsigned int *bytes_per_element);
73 
74 	void (*wm_read_state)(struct hubbub *hubbub,
75 			struct dcn_hubbub_wm *wm);
76 
77 	void (*get_dchub_ref_freq)(struct hubbub *hubbub,
78 			unsigned int dccg_ref_freq_inKhz,
79 			unsigned int *dchub_ref_freq_inKhz);
80 
81 	void (*program_watermarks)(
82 			struct hubbub *hubbub,
83 			struct dcn_watermark_set *watermarks,
84 			unsigned int refclk_mhz,
85 			bool safe_to_lower);
86 };
87 
88 struct hubbub {
89 	const struct hubbub_funcs *funcs;
90 	struct dc_context *ctx;
91 };
92 
93 #endif
94