14562236bSHarry Wentland /* 24562236bSHarry Wentland * Copyright 2015 Advanced Micro Devices, Inc. 34562236bSHarry Wentland * 44562236bSHarry Wentland * Permission is hereby granted, free of charge, to any person obtaining a 54562236bSHarry Wentland * copy of this software and associated documentation files (the "Software"), 64562236bSHarry Wentland * to deal in the Software without restriction, including without limitation 74562236bSHarry Wentland * the rights to use, copy, modify, merge, publish, distribute, sublicense, 84562236bSHarry Wentland * and/or sell copies of the Software, and to permit persons to whom the 94562236bSHarry Wentland * Software is furnished to do so, subject to the following conditions: 104562236bSHarry Wentland * 114562236bSHarry Wentland * The above copyright notice and this permission notice shall be included in 124562236bSHarry Wentland * all copies or substantial portions of the Software. 134562236bSHarry Wentland * 144562236bSHarry Wentland * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 154562236bSHarry Wentland * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 164562236bSHarry Wentland * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 174562236bSHarry Wentland * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 184562236bSHarry Wentland * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 194562236bSHarry Wentland * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 204562236bSHarry Wentland * OTHER DEALINGS IN THE SOFTWARE. 214562236bSHarry Wentland * 224562236bSHarry Wentland * Authors: AMD 234562236bSHarry Wentland * 244562236bSHarry Wentland */ 254562236bSHarry Wentland 264562236bSHarry Wentland #ifndef _CORE_TYPES_H_ 274562236bSHarry Wentland #define _CORE_TYPES_H_ 284562236bSHarry Wentland 294562236bSHarry Wentland #include "dc.h" 305e141de4SHarry Wentland #include "dce_calcs.h" 31ff5ef992SAlex Deucher #include "dcn_calcs.h" 324562236bSHarry Wentland #include "ddc_service_types.h" 334562236bSHarry Wentland #include "dc_bios_types.h" 34ff5ef992SAlex Deucher #include "mem_input.h" 358feabd03SYue Hin Lau #include "hubp.h" 36ff5ef992SAlex Deucher #include "mpc.h" 37345429a6SHarry Wentland #include "dwb.h" 38345429a6SHarry Wentland #include "mcif_wb.h" 39d4caa72eSAnthony Koo #include "panel_cntl.h" 404562236bSHarry Wentland 414562236bSHarry Wentland #define MAX_CLOCK_SOURCES 7 424562236bSHarry Wentland 433be5262eSHarry Wentland void enable_surface_flip_reporting(struct dc_plane_state *plane_state, 444562236bSHarry Wentland uint32_t controller_id); 454562236bSHarry Wentland 464562236bSHarry Wentland #include "grph_object_id.h" 474562236bSHarry Wentland #include "link_encoder.h" 484562236bSHarry Wentland #include "stream_encoder.h" 494562236bSHarry Wentland #include "clock_source.h" 504562236bSHarry Wentland #include "audio.h" 51a185048cSTony Cheng #include "dm_pp_smu.h" 52d462fcf5SBhawanpreet Lakha #ifdef CONFIG_DRM_AMD_DC_HDCP 53d462fcf5SBhawanpreet Lakha #include "dm_cp_psp.h" 54d462fcf5SBhawanpreet Lakha #endif 55fd249266SWenjing Liu #include "link_hwss.h" 564562236bSHarry Wentland 574562236bSHarry Wentland /************ link *****************/ 584562236bSHarry Wentland struct link_init_data { 59fb3466a4SBhawanpreet Lakha const struct dc *dc; 604562236bSHarry Wentland struct dc_context *ctx; /* TODO: remove 'dal' when DC is complete. */ 614562236bSHarry Wentland uint32_t connector_index; /* this will be mapped to the HPD pins */ 624562236bSHarry Wentland uint32_t link_index; /* this is mapped to DAL display_index 634562236bSHarry Wentland TODO: remove it when DC is complete. */ 649fa0fb77SMeenakshikumar Somasundaram bool is_dpia_link; 654562236bSHarry Wentland }; 664562236bSHarry Wentland 67d0778ebfSHarry Wentland struct dc_link *link_create(const struct link_init_data *init_params); 68d0778ebfSHarry Wentland void link_destroy(struct dc_link **link); 694562236bSHarry Wentland 704562236bSHarry Wentland enum dc_status dc_link_validate_mode_timing( 710971c40eSHarry Wentland const struct dc_stream_state *stream, 72d0778ebfSHarry Wentland struct dc_link *link, 734562236bSHarry Wentland const struct dc_crtc_timing *timing); 744562236bSHarry Wentland 75d0778ebfSHarry Wentland void core_link_resume(struct dc_link *link); 764562236bSHarry Wentland 77ab8db3e1SAndrey Grodzovsky void core_link_enable_stream( 78ab8db3e1SAndrey Grodzovsky struct dc_state *state, 79ab8db3e1SAndrey Grodzovsky struct pipe_ctx *pipe_ctx); 804562236bSHarry Wentland 8157430404SSu Sung Chung void core_link_disable_stream(struct pipe_ctx *pipe_ctx); 824562236bSHarry Wentland 8315e17335SCharlene Liu void core_link_set_avmute(struct pipe_ctx *pipe_ctx, bool enable); 844562236bSHarry Wentland /********** DAL Core*********************/ 854562236bSHarry Wentland #include "transform.h" 86d94585a0SYue Hin Lau #include "dpp.h" 874562236bSHarry Wentland 884562236bSHarry Wentland struct resource_pool; 89608ac7bbSJerry Zuo struct dc_state; 904562236bSHarry Wentland struct resource_context; 91aa919167SBhawanpreet Lakha struct clk_bw_params; 924562236bSHarry Wentland 934562236bSHarry Wentland struct resource_funcs { 944562236bSHarry Wentland void (*destroy)(struct resource_pool **pool); 9566b198ffSDmytro Laktyushkin void (*link_init)(struct dc_link *link); 96d4caa72eSAnthony Koo struct panel_cntl*(*panel_cntl_create)( 97d4caa72eSAnthony Koo const struct panel_cntl_init_data *panel_cntl_init_data); 984562236bSHarry Wentland struct link_encoder *(*link_enc_create)( 994562236bSHarry Wentland const struct encoder_init_data *init); 100e1f4328fSJimmy Kizito /* Create a minimal link encoder object with no dc_link object 101e1f4328fSJimmy Kizito * associated with it. */ 102e1f4328fSJimmy Kizito struct link_encoder *(*link_enc_create_minimal)(struct dc_context *ctx, enum engine_id eng_id); 103e1f4328fSJimmy Kizito 10445209ef7SDmytro Laktyushkin bool (*validate_bandwidth)( 105fb3466a4SBhawanpreet Lakha struct dc *dc, 106afcd526bSJoshua Aberback struct dc_state *context, 107afcd526bSJoshua Aberback bool fast_validate); 1088e02c26aSJoshua Aberback void (*calculate_wm_and_dlg)( 109b3ff538cSDmytro Laktyushkin struct dc *dc, struct dc_state *context, 110b3ff538cSDmytro Laktyushkin display_e2e_pipe_params_st *pipes, 111b3ff538cSDmytro Laktyushkin int pipe_cnt, 112b3ff538cSDmytro Laktyushkin int vlevel); 113443dfba0SDmytro Laktyushkin void (*update_soc_for_wm_a)( 114443dfba0SDmytro Laktyushkin struct dc *dc, struct dc_state *context); 115ed07237cSIlya Bakoulin int (*populate_dml_pipes)( 116ed07237cSIlya Bakoulin struct dc *dc, 1172f488884SAlvin Lee struct dc_state *context, 118fa896813SIsabel Zhang display_e2e_pipe_params_st *pipes, 119fa896813SIsabel Zhang bool fast_validate); 120ed07237cSIlya Bakoulin 121f42ef862SJimmy Kizito /* 122f42ef862SJimmy Kizito * Algorithm for assigning available link encoders to links. 123f42ef862SJimmy Kizito * 124f42ef862SJimmy Kizito * Update link_enc_assignments table and link_enc_avail list accordingly in 125f42ef862SJimmy Kizito * struct resource_context. 126f42ef862SJimmy Kizito */ 127f42ef862SJimmy Kizito void (*link_encs_assign)( 128f42ef862SJimmy Kizito struct dc *dc, 129f42ef862SJimmy Kizito struct dc_state *state, 130f42ef862SJimmy Kizito struct dc_stream_state *streams[], 131f42ef862SJimmy Kizito uint8_t stream_count); 132f42ef862SJimmy Kizito /* 133f42ef862SJimmy Kizito * Unassign a link encoder from a stream. 134f42ef862SJimmy Kizito * 135f42ef862SJimmy Kizito * Update link_enc_assignments table and link_enc_avail list accordingly in 136f42ef862SJimmy Kizito * struct resource_context. 137f42ef862SJimmy Kizito */ 138f42ef862SJimmy Kizito void (*link_enc_unassign)( 139f42ef862SJimmy Kizito struct dc_state *state, 140f42ef862SJimmy Kizito struct dc_stream_state *stream); 141f42ef862SJimmy Kizito 1421dc90497SAndrey Grodzovsky enum dc_status (*validate_global)( 1431dc90497SAndrey Grodzovsky struct dc *dc, 144608ac7bbSJerry Zuo struct dc_state *context); 1451dc90497SAndrey Grodzovsky 1464562236bSHarry Wentland struct pipe_ctx *(*acquire_idle_pipe_for_layer)( 147608ac7bbSJerry Zuo struct dc_state *context, 148a2b8659dSTony Cheng const struct resource_pool *pool, 1490971c40eSHarry Wentland struct dc_stream_state *stream); 1501dc90497SAndrey Grodzovsky 1518e7095b9SDmytro Laktyushkin enum dc_status (*validate_plane)(const struct dc_plane_state *plane_state, struct dc_caps *caps); 1521dc90497SAndrey Grodzovsky 1531dc90497SAndrey Grodzovsky enum dc_status (*add_stream_to_ctx)( 1541dc90497SAndrey Grodzovsky struct dc *dc, 155608ac7bbSJerry Zuo struct dc_state *new_ctx, 1561dc90497SAndrey Grodzovsky struct dc_stream_state *dc_stream); 157e56ae556SNikola Cornij 158e56ae556SNikola Cornij enum dc_status (*remove_stream_from_ctx)( 159e56ae556SNikola Cornij struct dc *dc, 160e56ae556SNikola Cornij struct dc_state *new_ctx, 161e56ae556SNikola Cornij struct dc_stream_state *stream); 1628d8c82b6SJoseph Gravenor enum dc_status (*patch_unknown_plane_state)( 16374eac5f3SSu Sung Chung struct dc_plane_state *plane_state); 16474eac5f3SSu Sung Chung 16578cc70b1SWesley Chalmers struct stream_encoder *(*find_first_free_match_stream_enc_for_link)( 16678cc70b1SWesley Chalmers struct resource_context *res_ctx, 16778cc70b1SWesley Chalmers const struct resource_pool *pool, 16878cc70b1SWesley Chalmers struct dc_stream_state *stream); 169345429a6SHarry Wentland void (*populate_dml_writeback_from_context)( 170345429a6SHarry Wentland struct dc *dc, 171345429a6SHarry Wentland struct resource_context *res_ctx, 172345429a6SHarry Wentland display_e2e_pipe_params_st *pipes); 17378cc70b1SWesley Chalmers 174345429a6SHarry Wentland void (*set_mcif_arb_params)( 175345429a6SHarry Wentland struct dc *dc, 176345429a6SHarry Wentland struct dc_state *context, 177345429a6SHarry Wentland display_e2e_pipe_params_st *pipes, 178345429a6SHarry Wentland int pipe_cnt); 1791b2c7b2cSBhawanpreet Lakha void (*update_bw_bounding_box)( 1801b2c7b2cSBhawanpreet Lakha struct dc *dc, 1811b2c7b2cSBhawanpreet Lakha struct clk_bw_params *bw_params); 1825dba4991SBhawanpreet Lakha bool (*acquire_post_bldn_3dlut)( 1835dba4991SBhawanpreet Lakha struct resource_context *res_ctx, 1845dba4991SBhawanpreet Lakha const struct resource_pool *pool, 1855dba4991SBhawanpreet Lakha int mpcc_id, 1865dba4991SBhawanpreet Lakha struct dc_3dlut **lut, 1875dba4991SBhawanpreet Lakha struct dc_transfer_func **shaper); 1885dba4991SBhawanpreet Lakha 1895dba4991SBhawanpreet Lakha bool (*release_post_bldn_3dlut)( 1905dba4991SBhawanpreet Lakha struct resource_context *res_ctx, 1915dba4991SBhawanpreet Lakha const struct resource_pool *pool, 1925dba4991SBhawanpreet Lakha struct dc_3dlut **lut, 1935dba4991SBhawanpreet Lakha struct dc_transfer_func **shaper); 194*59b8ca24SAlex Hung 195b4f71c8cSAurabindo Pillai enum dc_status (*add_dsc_to_stream_resource)( 196b4f71c8cSAurabindo Pillai struct dc *dc, struct dc_state *state, 197b4f71c8cSAurabindo Pillai struct dc_stream_state *stream); 1984562236bSHarry Wentland }; 1994562236bSHarry Wentland 2004562236bSHarry Wentland struct audio_support{ 2014562236bSHarry Wentland bool dp_audio; 2024562236bSHarry Wentland bool hdmi_audio_on_dongle; 2034562236bSHarry Wentland bool hdmi_audio_native; 2044562236bSHarry Wentland }; 2054562236bSHarry Wentland 206f0e3db90SHarry Wentland #define NO_UNDERLAY_PIPE -1 207f0e3db90SHarry Wentland 2084562236bSHarry Wentland struct resource_pool { 2094562236bSHarry Wentland struct mem_input *mis[MAX_PIPES]; 2108feabd03SYue Hin Lau struct hubp *hubps[MAX_PIPES]; 2114562236bSHarry Wentland struct input_pixel_processor *ipps[MAX_PIPES]; 2124562236bSHarry Wentland struct transform *transforms[MAX_PIPES]; 213d94585a0SYue Hin Lau struct dpp *dpps[MAX_PIPES]; 2144562236bSHarry Wentland struct output_pixel_processor *opps[MAX_PIPES]; 2154562236bSHarry Wentland struct timing_generator *timing_generators[MAX_PIPES]; 2164562236bSHarry Wentland struct stream_encoder *stream_enc[MAX_PIPES * 2]; 217c9ef081dSYue Hin Lau struct hubbub *hubbub; 218cc408d72SDmytro Laktyushkin struct mpc *mpc; 2190f1a6ad7SJun Lei struct pp_smu_funcs *pp_smu; 2201877ccf6SDavid Francis struct dce_aux *engines[MAX_PIPES]; 221c85e6e54SDavid Francis struct dce_i2c_hw *hw_i2cs[MAX_PIPES]; 222c85e6e54SDavid Francis struct dce_i2c_sw *sw_i2cs[MAX_PIPES]; 223c85e6e54SDavid Francis bool i2c_hw_buffer_in_use; 2244562236bSHarry Wentland 225345429a6SHarry Wentland struct dwbc *dwbc[MAX_DWB_PIPES]; 226345429a6SHarry Wentland struct mcif_wb *mcif_wb[MAX_DWB_PIPES]; 227345429a6SHarry Wentland struct { 228345429a6SHarry Wentland unsigned int gsl_0:1; 229345429a6SHarry Wentland unsigned int gsl_1:1; 230345429a6SHarry Wentland unsigned int gsl_2:1; 231345429a6SHarry Wentland } gsl_groups; 232345429a6SHarry Wentland 23397bda032SHarry Wentland struct display_stream_compressor *dscs[MAX_PIPES]; 234345429a6SHarry Wentland 2354562236bSHarry Wentland unsigned int pipe_count; 2364562236bSHarry Wentland unsigned int underlay_pipe_index; 2374562236bSHarry Wentland unsigned int stream_enc_count; 238929c3aaaSEric Bernstein 239e1f4328fSJimmy Kizito /* An array for accessing the link encoder objects that have been created. 240e1f4328fSJimmy Kizito * Index in array corresponds to engine ID - viz. 0: ENGINE_ID_DIGA 241e1f4328fSJimmy Kizito */ 242e1f4328fSJimmy Kizito struct link_encoder *link_encoders[MAX_DIG_LINK_ENCODERS]; 243e1f4328fSJimmy Kizito /* Number of DIG link encoder objects created - i.e. number of valid 244e1f4328fSJimmy Kizito * entries in link_encoders array. 245e1f4328fSJimmy Kizito */ 246e1f4328fSJimmy Kizito unsigned int dig_link_enc_count; 247eabf2019SJimmy Kizito /* Number of USB4 DPIA (DisplayPort Input Adapter) link objects created.*/ 248eabf2019SJimmy Kizito unsigned int usb4_dpia_count; 249e1f4328fSJimmy Kizito 25083228ebbSFangzhi Zuo unsigned int hpo_dp_stream_enc_count; 25183228ebbSFangzhi Zuo struct hpo_dp_stream_encoder *hpo_dp_stream_enc[MAX_HPO_DP2_ENCODERS]; 2523bc8d921SFangzhi Zuo unsigned int hpo_dp_link_enc_count; 2533bc8d921SFangzhi Zuo struct hpo_dp_link_encoder *hpo_dp_link_enc[MAX_HPO_DP2_LINK_ENCODERS]; 2545dba4991SBhawanpreet Lakha struct dc_3dlut *mpc_lut[MAX_PIPES]; 2555dba4991SBhawanpreet Lakha struct dc_transfer_func *mpc_shaper[MAX_PIPES]; 256*59b8ca24SAlex Hung 25733d7598dSJun Lei struct { 25833d7598dSJun Lei unsigned int xtalin_clock_inKhz; 25933d7598dSJun Lei unsigned int dccg_ref_clock_inKhz; 26033d7598dSJun Lei unsigned int dchub_ref_clock_inKhz; 26133d7598dSJun Lei } ref_clocks; 2623be1406aSYongqiang Sun unsigned int timing_generator_count; 263345429a6SHarry Wentland unsigned int mpcc_count; 2644562236bSHarry Wentland 265345429a6SHarry Wentland unsigned int writeback_pipe_count; 2664562236bSHarry Wentland /* 2674562236bSHarry Wentland * reserved clock source for DP 2684562236bSHarry Wentland */ 2694562236bSHarry Wentland struct clock_source *dp_clock_source; 2704562236bSHarry Wentland 2714562236bSHarry Wentland struct clock_source *clock_sources[MAX_CLOCK_SOURCES]; 2724562236bSHarry Wentland unsigned int clk_src_count; 2734562236bSHarry Wentland 2747352193aSTai Man struct audio *audios[MAX_AUDIOS]; 2754562236bSHarry Wentland unsigned int audio_count; 2764562236bSHarry Wentland struct audio_support audio_support; 2774562236bSHarry Wentland 278ea2e8d92SDmytro Laktyushkin struct dccg *dccg; 2794562236bSHarry Wentland struct irq_service *irqs; 2804562236bSHarry Wentland 2815e7773a2SAnthony Koo struct abm *abm; 2825e7773a2SAnthony Koo struct dmcu *dmcu; 2834c1a1335SWyatt Wood struct dmub_psr *psr; 2845e7773a2SAnthony Koo 285d99f1387SBhawanpreet Lakha struct abm *multiple_abms[MAX_PIPES]; 286d99f1387SBhawanpreet Lakha 2874562236bSHarry Wentland const struct resource_funcs *funcs; 2884562236bSHarry Wentland const struct resource_caps *res_cap; 289d9a07577SJun Lei 290d9a07577SJun Lei struct ddc_service *oem_device; 2914562236bSHarry Wentland }; 2924562236bSHarry Wentland 293f553e681SDmytro Laktyushkin struct dcn_fe_bandwidth { 29469338c1fSDmytro Laktyushkin int dppclk_khz; 295799c5b9cSWesley Chalmers 296f553e681SDmytro Laktyushkin }; 297f553e681SDmytro Laktyushkin 29879b06f0cSHarry Wentland struct stream_resource { 299a6a6cb34SHarry Wentland struct output_pixel_processor *opp; 30097bda032SHarry Wentland struct display_stream_compressor *dsc; 3016b670fa9SHarry Wentland struct timing_generator *tg; 3028e9c4c8cSHarry Wentland struct stream_encoder *stream_enc; 30383228ebbSFangzhi Zuo struct hpo_dp_stream_encoder *hpo_dp_stream_enc; 304afaacef4SHarry Wentland struct audio *audio; 30510688217SHarry Wentland 30610688217SHarry Wentland struct pixel_clk_params pix_clk_params; 30796c50c0dSHarry Wentland struct encoder_info_frame encoder_info_frame; 3089aef1a31SSivapiriyanKumarasamy 3099aef1a31SSivapiriyanKumarasamy struct abm *abm; 310345429a6SHarry Wentland /* There are only (num_pipes+1)/2 groups. 0 means unassigned, 311345429a6SHarry Wentland * otherwise it's using group number 'gsl_group-1' 312345429a6SHarry Wentland */ 313345429a6SHarry Wentland uint8_t gsl_group; 31479b06f0cSHarry Wentland }; 31579b06f0cSHarry Wentland 31679b06f0cSHarry Wentland struct plane_resource { 3176702a9acSHarry Wentland struct scaler_data scl_data; 3188feabd03SYue Hin Lau struct hubp *hubp; 31986a66c4eSHarry Wentland struct mem_input *mi; 32086a66c4eSHarry Wentland struct input_pixel_processor *ipp; 32186a66c4eSHarry Wentland struct transform *xfm; 322d94585a0SYue Hin Lau struct dpp *dpp; 323e07f541fSYongqiang Sun uint8_t mpcc_inst; 324f553e681SDmytro Laktyushkin 325f553e681SDmytro Laktyushkin struct dcn_fe_bandwidth bw; 32679b06f0cSHarry Wentland }; 32779b06f0cSHarry Wentland 3284c3adc0bSWenjing Liu #define LINK_RES_HPO_DP_REC_MAP__MASK 0xFFFF 3294c3adc0bSWenjing Liu #define LINK_RES_HPO_DP_REC_MAP__SHIFT 0 3304c3adc0bSWenjing Liu 331ef30f441SWenjing Liu /* all mappable hardware resources used to enable a link */ 332ef30f441SWenjing Liu struct link_resource { 333f3fac948SWenjing Liu struct hpo_dp_link_encoder *hpo_dp_link_enc; 334ef30f441SWenjing Liu }; 335ef30f441SWenjing Liu 33624c18794SDmytro Laktyushkin union pipe_update_flags { 33724c18794SDmytro Laktyushkin struct { 33824c18794SDmytro Laktyushkin uint32_t enable : 1; 33924c18794SDmytro Laktyushkin uint32_t disable : 1; 34024c18794SDmytro Laktyushkin uint32_t odm : 1; 34124c18794SDmytro Laktyushkin uint32_t global_sync : 1; 34224c18794SDmytro Laktyushkin uint32_t opp_changed : 1; 34324c18794SDmytro Laktyushkin uint32_t tg_changed : 1; 34424c18794SDmytro Laktyushkin uint32_t mpcc : 1; 34524c18794SDmytro Laktyushkin uint32_t dppclk : 1; 34624c18794SDmytro Laktyushkin uint32_t hubp_interdependent : 1; 34724c18794SDmytro Laktyushkin uint32_t hubp_rq_dlg_ttu : 1; 34824c18794SDmytro Laktyushkin uint32_t gamut_remap : 1; 34924c18794SDmytro Laktyushkin uint32_t scaler : 1; 35024c18794SDmytro Laktyushkin uint32_t viewport : 1; 351498563cfSJinZe.Xu uint32_t plane_changed : 1; 352ba5a5371SNicholas Kazlauskas uint32_t det_size : 1; 35324c18794SDmytro Laktyushkin } bits; 35424c18794SDmytro Laktyushkin uint32_t raw; 35524c18794SDmytro Laktyushkin }; 35624c18794SDmytro Laktyushkin 3574562236bSHarry Wentland struct pipe_ctx { 3583be5262eSHarry Wentland struct dc_plane_state *plane_state; 3590971c40eSHarry Wentland struct dc_stream_state *stream; 3604562236bSHarry Wentland 36179b06f0cSHarry Wentland struct plane_resource plane_res; 36279b06f0cSHarry Wentland struct stream_resource stream_res; 363ef30f441SWenjing Liu struct link_resource link_res; 36479b06f0cSHarry Wentland 3654562236bSHarry Wentland struct clock_source *clock_source; 3664562236bSHarry Wentland 3674562236bSHarry Wentland struct pll_settings pll_settings; 3684562236bSHarry Wentland 3694562236bSHarry Wentland uint8_t pipe_idx; 370a896f870SMeenakshikumar Somasundaram uint8_t pipe_idx_syncd; 3714562236bSHarry Wentland 3724562236bSHarry Wentland struct pipe_ctx *top_pipe; 3734562236bSHarry Wentland struct pipe_ctx *bottom_pipe; 374b1f6d01cSDmytro Laktyushkin struct pipe_ctx *next_odm_pipe; 375b1f6d01cSDmytro Laktyushkin struct pipe_ctx *prev_odm_pipe; 376f0558542SDmytro Laktyushkin 377ff5ef992SAlex Deucher struct _vcs_dpi_display_dlg_regs_st dlg_regs; 378ff5ef992SAlex Deucher struct _vcs_dpi_display_ttu_regs_st ttu_regs; 379ff5ef992SAlex Deucher struct _vcs_dpi_display_rq_regs_st rq_regs; 380ff5ef992SAlex Deucher struct _vcs_dpi_display_pipe_dest_params_st pipe_dlg_param; 3811f2fcc81SHarry Wentland struct _vcs_dpi_display_rq_params_st dml_rq_param; 3821f2fcc81SHarry Wentland struct _vcs_dpi_display_dlg_sys_params_st dml_dlg_sys_param; 3831f2fcc81SHarry Wentland struct _vcs_dpi_display_e2e_pipe_params_st dml_input; 384ba5a5371SNicholas Kazlauskas int det_buffer_size_kb; 385ba5a5371SNicholas Kazlauskas bool unbounded_req; 386*59b8ca24SAlex Hung 38724c18794SDmytro Laktyushkin union pipe_update_flags update_flags; 388345429a6SHarry Wentland struct dwbc *dwbc; 389345429a6SHarry Wentland struct mcif_wb *mcif_wb; 390d209124dSBhawanpreet Lakha bool vtp_locked; 3914562236bSHarry Wentland }; 3924562236bSHarry Wentland 3930d4b4253SJimmy Kizito /* Data used for dynamic link encoder assignment. 3940d4b4253SJimmy Kizito * Tracks current and future assignments; available link encoders; 3950d4b4253SJimmy Kizito * and mode of operation (whether to use current or future assignments). 3960d4b4253SJimmy Kizito */ 3970d4b4253SJimmy Kizito struct link_enc_cfg_context { 3980d4b4253SJimmy Kizito enum link_enc_cfg_mode mode; 3990d4b4253SJimmy Kizito struct link_enc_assignment link_enc_assignments[MAX_PIPES]; 4000d4b4253SJimmy Kizito enum engine_id link_enc_avail[MAX_DIG_LINK_ENCODERS]; 4010d4b4253SJimmy Kizito struct link_enc_assignment transient_assignments[MAX_PIPES]; 4020d4b4253SJimmy Kizito }; 4030d4b4253SJimmy Kizito 4044562236bSHarry Wentland struct resource_context { 4054562236bSHarry Wentland struct pipe_ctx pipe_ctx[MAX_PIPES]; 4064562236bSHarry Wentland bool is_stream_enc_acquired[MAX_PIPES * 2]; 4074562236bSHarry Wentland bool is_audio_acquired[MAX_PIPES]; 4084562236bSHarry Wentland uint8_t clock_source_ref_count[MAX_CLOCK_SOURCES]; 4094562236bSHarry Wentland uint8_t dp_clock_source_ref_count; 410345429a6SHarry Wentland bool is_dsc_acquired[MAX_PIPES]; 4110d4b4253SJimmy Kizito struct link_enc_cfg_context link_enc_cfg_ctx; 41283228ebbSFangzhi Zuo bool is_hpo_dp_stream_enc_acquired[MAX_HPO_DP2_ENCODERS]; 4136dd8931bSWenjing Liu unsigned int hpo_dp_link_enc_to_link_idx[MAX_HPO_DP2_LINK_ENCODERS]; 4146dd8931bSWenjing Liu int hpo_dp_link_enc_ref_cnts[MAX_HPO_DP2_LINK_ENCODERS]; 4155dba4991SBhawanpreet Lakha bool is_mpc_3dlut_acquired[MAX_PIPES]; 4164562236bSHarry Wentland }; 4174562236bSHarry Wentland 4189037d802SDmytro Laktyushkin struct dce_bw_output { 4199037d802SDmytro Laktyushkin bool cpuc_state_change_enable; 4209037d802SDmytro Laktyushkin bool cpup_state_change_enable; 4219037d802SDmytro Laktyushkin bool stutter_mode_enable; 4229037d802SDmytro Laktyushkin bool nbp_state_change_enable; 4239037d802SDmytro Laktyushkin bool all_displays_in_sync; 4249037d802SDmytro Laktyushkin struct dce_watermarks urgent_wm_ns[MAX_PIPES]; 4259037d802SDmytro Laktyushkin struct dce_watermarks stutter_exit_wm_ns[MAX_PIPES]; 426b361521fSMikita Lipski struct dce_watermarks stutter_entry_wm_ns[MAX_PIPES]; 4279037d802SDmytro Laktyushkin struct dce_watermarks nbp_state_change_wm_ns[MAX_PIPES]; 4289037d802SDmytro Laktyushkin int sclk_khz; 4299037d802SDmytro Laktyushkin int sclk_deep_sleep_khz; 4309037d802SDmytro Laktyushkin int yclk_khz; 4319037d802SDmytro Laktyushkin int dispclk_khz; 4329037d802SDmytro Laktyushkin int blackout_recovery_time_us; 4339037d802SDmytro Laktyushkin }; 4349037d802SDmytro Laktyushkin 435345429a6SHarry Wentland struct dcn_bw_writeback { 436345429a6SHarry Wentland struct mcif_arb_params mcif_wb_arb[MAX_DWB_PIPES]; 437345429a6SHarry Wentland }; 438345429a6SHarry Wentland 4399037d802SDmytro Laktyushkin struct dcn_bw_output { 440d578839cSDmytro Laktyushkin struct dc_clocks clk; 4419037d802SDmytro Laktyushkin struct dcn_watermark_set watermarks; 442345429a6SHarry Wentland struct dcn_bw_writeback bw_writeback; 443ba5a5371SNicholas Kazlauskas int compbuf_size_kb; 4449037d802SDmytro Laktyushkin }; 4459037d802SDmytro Laktyushkin 446813d20dcSAidan Wood union bw_output { 4479037d802SDmytro Laktyushkin struct dcn_bw_output dcn; 4489037d802SDmytro Laktyushkin struct dce_bw_output dce; 4499037d802SDmytro Laktyushkin }; 4509037d802SDmytro Laktyushkin 451813d20dcSAidan Wood struct bw_context { 452813d20dcSAidan Wood union bw_output bw; 453813d20dcSAidan Wood struct display_mode_lib dml; 454813d20dcSAidan Wood }; 4552119aa17SDavid Francis /** 4562119aa17SDavid Francis * struct dc_state - The full description of a state requested by a user 4572119aa17SDavid Francis * 4582119aa17SDavid Francis * @streams: Stream properties 4592119aa17SDavid Francis * @stream_status: The planes on a given stream 4602119aa17SDavid Francis * @res_ctx: Persistent state of resources 461813d20dcSAidan Wood * @bw_ctx: The output from bandwidth and watermark calculations and the DML 4622119aa17SDavid Francis * @pp_display_cfg: PowerPlay clocks and settings 4632119aa17SDavid Francis * @dcn_bw_vars: non-stack memory to support bandwidth calculations 4642119aa17SDavid Francis * 4652119aa17SDavid Francis */ 466608ac7bbSJerry Zuo struct dc_state { 4670971c40eSHarry Wentland struct dc_stream_state *streams[MAX_PIPES]; 468ab2541b6SAric Cyr struct dc_stream_status stream_status[MAX_PIPES]; 469ab2541b6SAric Cyr uint8_t stream_count; 4700825d965SEric Yang uint8_t stream_mask; 4714562236bSHarry Wentland 4724562236bSHarry Wentland struct resource_context res_ctx; 4734562236bSHarry Wentland 474813d20dcSAidan Wood struct bw_context bw_ctx; 4759037d802SDmytro Laktyushkin 4765ea81b91SDmytro Laktyushkin /* Note: these are big structures, do *not* put on stack! */ 4774562236bSHarry Wentland struct dm_pp_display_configuration pp_display_cfg; 478ff5ef992SAlex Deucher struct dcn_bw_internal_vars dcn_bw_vars; 4798a76708eSAndrey Grodzovsky 4800de34efcSDmytro Laktyushkin struct clk_mgr *clk_mgr; 481ab8db3e1SAndrey Grodzovsky 4828ee5702aSDave Airlie struct kref refcount; 4836b85151fSMartin Leung 4846b85151fSMartin Leung struct { 4856b85151fSMartin Leung unsigned int stutter_period_us; 4866b85151fSMartin Leung } perf_params; 4874562236bSHarry Wentland }; 4884562236bSHarry Wentland 4894562236bSHarry Wentland #endif /* _CORE_TYPES_H_ */ 490