14562236bSHarry Wentland /* 24562236bSHarry Wentland * Copyright 2015 Advanced Micro Devices, Inc. 34562236bSHarry Wentland * 44562236bSHarry Wentland * Permission is hereby granted, free of charge, to any person obtaining a 54562236bSHarry Wentland * copy of this software and associated documentation files (the "Software"), 64562236bSHarry Wentland * to deal in the Software without restriction, including without limitation 74562236bSHarry Wentland * the rights to use, copy, modify, merge, publish, distribute, sublicense, 84562236bSHarry Wentland * and/or sell copies of the Software, and to permit persons to whom the 94562236bSHarry Wentland * Software is furnished to do so, subject to the following conditions: 104562236bSHarry Wentland * 114562236bSHarry Wentland * The above copyright notice and this permission notice shall be included in 124562236bSHarry Wentland * all copies or substantial portions of the Software. 134562236bSHarry Wentland * 144562236bSHarry Wentland * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 154562236bSHarry Wentland * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 164562236bSHarry Wentland * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 174562236bSHarry Wentland * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 184562236bSHarry Wentland * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 194562236bSHarry Wentland * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 204562236bSHarry Wentland * OTHER DEALINGS IN THE SOFTWARE. 214562236bSHarry Wentland * 224562236bSHarry Wentland * Authors: AMD 234562236bSHarry Wentland * 244562236bSHarry Wentland */ 254562236bSHarry Wentland 264562236bSHarry Wentland #ifndef _CORE_TYPES_H_ 274562236bSHarry Wentland #define _CORE_TYPES_H_ 284562236bSHarry Wentland 294562236bSHarry Wentland #include "dc.h" 305e141de4SHarry Wentland #include "dce_calcs.h" 31ff5ef992SAlex Deucher #include "dcn_calcs.h" 324562236bSHarry Wentland #include "ddc_service_types.h" 334562236bSHarry Wentland #include "dc_bios_types.h" 34ff5ef992SAlex Deucher #include "mem_input.h" 358feabd03SYue Hin Lau #include "hubp.h" 36ff5ef992SAlex Deucher #include "mpc.h" 37345429a6SHarry Wentland #include "dwb.h" 38345429a6SHarry Wentland #include "mcif_wb.h" 39d4caa72eSAnthony Koo #include "panel_cntl.h" 404562236bSHarry Wentland 414562236bSHarry Wentland #define MAX_CLOCK_SOURCES 7 424562236bSHarry Wentland 433be5262eSHarry Wentland void enable_surface_flip_reporting(struct dc_plane_state *plane_state, 444562236bSHarry Wentland uint32_t controller_id); 454562236bSHarry Wentland 464562236bSHarry Wentland #include "grph_object_id.h" 474562236bSHarry Wentland #include "link_encoder.h" 484562236bSHarry Wentland #include "stream_encoder.h" 494562236bSHarry Wentland #include "clock_source.h" 504562236bSHarry Wentland #include "audio.h" 51a185048cSTony Cheng #include "dm_pp_smu.h" 52d462fcf5SBhawanpreet Lakha #ifdef CONFIG_DRM_AMD_DC_HDCP 53d462fcf5SBhawanpreet Lakha #include "dm_cp_psp.h" 54d462fcf5SBhawanpreet Lakha #endif 55fd249266SWenjing Liu #include "link_hwss.h" 564562236bSHarry Wentland 574562236bSHarry Wentland /************ link *****************/ 584562236bSHarry Wentland struct link_init_data { 59fb3466a4SBhawanpreet Lakha const struct dc *dc; 604562236bSHarry Wentland struct dc_context *ctx; /* TODO: remove 'dal' when DC is complete. */ 614562236bSHarry Wentland uint32_t connector_index; /* this will be mapped to the HPD pins */ 624562236bSHarry Wentland uint32_t link_index; /* this is mapped to DAL display_index 634562236bSHarry Wentland TODO: remove it when DC is complete. */ 649fa0fb77SMeenakshikumar Somasundaram bool is_dpia_link; 654562236bSHarry Wentland }; 664562236bSHarry Wentland 67d0778ebfSHarry Wentland struct dc_link *link_create(const struct link_init_data *init_params); 68d0778ebfSHarry Wentland void link_destroy(struct dc_link **link); 694562236bSHarry Wentland 704562236bSHarry Wentland enum dc_status dc_link_validate_mode_timing( 710971c40eSHarry Wentland const struct dc_stream_state *stream, 72d0778ebfSHarry Wentland struct dc_link *link, 734562236bSHarry Wentland const struct dc_crtc_timing *timing); 744562236bSHarry Wentland 75d0778ebfSHarry Wentland void core_link_resume(struct dc_link *link); 764562236bSHarry Wentland 77ab8db3e1SAndrey Grodzovsky void core_link_enable_stream( 78ab8db3e1SAndrey Grodzovsky struct dc_state *state, 79ab8db3e1SAndrey Grodzovsky struct pipe_ctx *pipe_ctx); 804562236bSHarry Wentland 8157430404SSu Sung Chung void core_link_disable_stream(struct pipe_ctx *pipe_ctx); 824562236bSHarry Wentland 8315e17335SCharlene Liu void core_link_set_avmute(struct pipe_ctx *pipe_ctx, bool enable); 844562236bSHarry Wentland /********** DAL Core*********************/ 854562236bSHarry Wentland #include "transform.h" 86d94585a0SYue Hin Lau #include "dpp.h" 874562236bSHarry Wentland 884562236bSHarry Wentland struct resource_pool; 89608ac7bbSJerry Zuo struct dc_state; 904562236bSHarry Wentland struct resource_context; 91aa919167SBhawanpreet Lakha struct clk_bw_params; 924562236bSHarry Wentland 934562236bSHarry Wentland struct resource_funcs { 944562236bSHarry Wentland void (*destroy)(struct resource_pool **pool); 9566b198ffSDmytro Laktyushkin void (*link_init)(struct dc_link *link); 96d4caa72eSAnthony Koo struct panel_cntl*(*panel_cntl_create)( 97d4caa72eSAnthony Koo const struct panel_cntl_init_data *panel_cntl_init_data); 984562236bSHarry Wentland struct link_encoder *(*link_enc_create)( 99e216431bSAurabindo Pillai struct dc_context *ctx, 1004562236bSHarry Wentland const struct encoder_init_data *init); 101e1f4328fSJimmy Kizito /* Create a minimal link encoder object with no dc_link object 102e1f4328fSJimmy Kizito * associated with it. */ 103e1f4328fSJimmy Kizito struct link_encoder *(*link_enc_create_minimal)(struct dc_context *ctx, enum engine_id eng_id); 104e1f4328fSJimmy Kizito 10545209ef7SDmytro Laktyushkin bool (*validate_bandwidth)( 106fb3466a4SBhawanpreet Lakha struct dc *dc, 107afcd526bSJoshua Aberback struct dc_state *context, 108afcd526bSJoshua Aberback bool fast_validate); 1098e02c26aSJoshua Aberback void (*calculate_wm_and_dlg)( 110b3ff538cSDmytro Laktyushkin struct dc *dc, struct dc_state *context, 111b3ff538cSDmytro Laktyushkin display_e2e_pipe_params_st *pipes, 112b3ff538cSDmytro Laktyushkin int pipe_cnt, 113b3ff538cSDmytro Laktyushkin int vlevel); 114443dfba0SDmytro Laktyushkin void (*update_soc_for_wm_a)( 115443dfba0SDmytro Laktyushkin struct dc *dc, struct dc_state *context); 116ed07237cSIlya Bakoulin int (*populate_dml_pipes)( 117ed07237cSIlya Bakoulin struct dc *dc, 1182f488884SAlvin Lee struct dc_state *context, 119fa896813SIsabel Zhang display_e2e_pipe_params_st *pipes, 120fa896813SIsabel Zhang bool fast_validate); 121ed07237cSIlya Bakoulin 122f42ef862SJimmy Kizito /* 123f42ef862SJimmy Kizito * Algorithm for assigning available link encoders to links. 124f42ef862SJimmy Kizito * 125f42ef862SJimmy Kizito * Update link_enc_assignments table and link_enc_avail list accordingly in 126f42ef862SJimmy Kizito * struct resource_context. 127f42ef862SJimmy Kizito */ 128f42ef862SJimmy Kizito void (*link_encs_assign)( 129f42ef862SJimmy Kizito struct dc *dc, 130f42ef862SJimmy Kizito struct dc_state *state, 131f42ef862SJimmy Kizito struct dc_stream_state *streams[], 132f42ef862SJimmy Kizito uint8_t stream_count); 133f42ef862SJimmy Kizito /* 134f42ef862SJimmy Kizito * Unassign a link encoder from a stream. 135f42ef862SJimmy Kizito * 136f42ef862SJimmy Kizito * Update link_enc_assignments table and link_enc_avail list accordingly in 137f42ef862SJimmy Kizito * struct resource_context. 138f42ef862SJimmy Kizito */ 139f42ef862SJimmy Kizito void (*link_enc_unassign)( 140f42ef862SJimmy Kizito struct dc_state *state, 141f42ef862SJimmy Kizito struct dc_stream_state *stream); 142f42ef862SJimmy Kizito 1431dc90497SAndrey Grodzovsky enum dc_status (*validate_global)( 1441dc90497SAndrey Grodzovsky struct dc *dc, 145608ac7bbSJerry Zuo struct dc_state *context); 1461dc90497SAndrey Grodzovsky 147652284d6SSamson Tam /* 148652284d6SSamson Tam * Acquires a free pipe for the head pipe. 149652284d6SSamson Tam * The head pipe is first pipe in the current context that matches the stream 150652284d6SSamson Tam * and does not have a top pipe or prev_odm_pipe. 151652284d6SSamson Tam */ 1524562236bSHarry Wentland struct pipe_ctx *(*acquire_idle_pipe_for_layer)( 153608ac7bbSJerry Zuo struct dc_state *context, 154a2b8659dSTony Cheng const struct resource_pool *pool, 1550971c40eSHarry Wentland struct dc_stream_state *stream); 1561dc90497SAndrey Grodzovsky 157652284d6SSamson Tam /* 158652284d6SSamson Tam * Acquires a free pipe for the head pipe with some additional checks for odm. 159652284d6SSamson Tam * The head pipe is passed in as an argument unlike acquire_idle_pipe_for_layer 160652284d6SSamson Tam * where it is read from the context. So this allows us look for different 161652284d6SSamson Tam * idle_pipe if the head_pipes are different ( ex. in odm 2:1 when we have 162652284d6SSamson Tam * a left and right pipe ). 163652284d6SSamson Tam * 164652284d6SSamson Tam * It also checks the old context to see if: 165652284d6SSamson Tam * 166652284d6SSamson Tam * 1. a pipe has already been allocated for the head pipe. If so, it will 167652284d6SSamson Tam * try to select that pipe as the idle pipe if it is available in the current 168652284d6SSamson Tam * context. 169652284d6SSamson Tam * 2. if the head_pipe is on the left, it will check if the right pipe has 170652284d6SSamson Tam * a pipe already allocated. If so, it will not use that pipe if it is 171652284d6SSamson Tam * selected as the idle pipe. 172652284d6SSamson Tam */ 173652284d6SSamson Tam struct pipe_ctx *(*acquire_idle_pipe_for_head_pipe_in_layer)( 174652284d6SSamson Tam struct dc_state *context, 175652284d6SSamson Tam const struct resource_pool *pool, 176652284d6SSamson Tam struct dc_stream_state *stream, 177652284d6SSamson Tam struct pipe_ctx *head_pipe); 178652284d6SSamson Tam 1798e7095b9SDmytro Laktyushkin enum dc_status (*validate_plane)(const struct dc_plane_state *plane_state, struct dc_caps *caps); 1801dc90497SAndrey Grodzovsky 1811dc90497SAndrey Grodzovsky enum dc_status (*add_stream_to_ctx)( 1821dc90497SAndrey Grodzovsky struct dc *dc, 183608ac7bbSJerry Zuo struct dc_state *new_ctx, 1841dc90497SAndrey Grodzovsky struct dc_stream_state *dc_stream); 185e56ae556SNikola Cornij 186e56ae556SNikola Cornij enum dc_status (*remove_stream_from_ctx)( 187e56ae556SNikola Cornij struct dc *dc, 188e56ae556SNikola Cornij struct dc_state *new_ctx, 189e56ae556SNikola Cornij struct dc_stream_state *stream); 1908d8c82b6SJoseph Gravenor enum dc_status (*patch_unknown_plane_state)( 19174eac5f3SSu Sung Chung struct dc_plane_state *plane_state); 19274eac5f3SSu Sung Chung 19378cc70b1SWesley Chalmers struct stream_encoder *(*find_first_free_match_stream_enc_for_link)( 19478cc70b1SWesley Chalmers struct resource_context *res_ctx, 19578cc70b1SWesley Chalmers const struct resource_pool *pool, 19678cc70b1SWesley Chalmers struct dc_stream_state *stream); 197345429a6SHarry Wentland void (*populate_dml_writeback_from_context)( 198345429a6SHarry Wentland struct dc *dc, 199345429a6SHarry Wentland struct resource_context *res_ctx, 200345429a6SHarry Wentland display_e2e_pipe_params_st *pipes); 20178cc70b1SWesley Chalmers 202345429a6SHarry Wentland void (*set_mcif_arb_params)( 203345429a6SHarry Wentland struct dc *dc, 204345429a6SHarry Wentland struct dc_state *context, 205345429a6SHarry Wentland display_e2e_pipe_params_st *pipes, 206345429a6SHarry Wentland int pipe_cnt); 2071b2c7b2cSBhawanpreet Lakha void (*update_bw_bounding_box)( 2081b2c7b2cSBhawanpreet Lakha struct dc *dc, 2091b2c7b2cSBhawanpreet Lakha struct clk_bw_params *bw_params); 2105dba4991SBhawanpreet Lakha bool (*acquire_post_bldn_3dlut)( 2115dba4991SBhawanpreet Lakha struct resource_context *res_ctx, 2125dba4991SBhawanpreet Lakha const struct resource_pool *pool, 2135dba4991SBhawanpreet Lakha int mpcc_id, 2145dba4991SBhawanpreet Lakha struct dc_3dlut **lut, 2155dba4991SBhawanpreet Lakha struct dc_transfer_func **shaper); 2165dba4991SBhawanpreet Lakha 2175dba4991SBhawanpreet Lakha bool (*release_post_bldn_3dlut)( 2185dba4991SBhawanpreet Lakha struct resource_context *res_ctx, 2195dba4991SBhawanpreet Lakha const struct resource_pool *pool, 2205dba4991SBhawanpreet Lakha struct dc_3dlut **lut, 2215dba4991SBhawanpreet Lakha struct dc_transfer_func **shaper); 22259b8ca24SAlex Hung 223b4f71c8cSAurabindo Pillai enum dc_status (*add_dsc_to_stream_resource)( 224b4f71c8cSAurabindo Pillai struct dc *dc, struct dc_state *state, 225b4f71c8cSAurabindo Pillai struct dc_stream_state *stream); 226d3dfceb5SAurabindo Pillai 227d3dfceb5SAurabindo Pillai void (*add_phantom_pipes)( 228d3dfceb5SAurabindo Pillai struct dc *dc, 229d3dfceb5SAurabindo Pillai struct dc_state *context, 230d3dfceb5SAurabindo Pillai display_e2e_pipe_params_st *pipes, 231d3dfceb5SAurabindo Pillai unsigned int pipe_cnt, 232d3dfceb5SAurabindo Pillai unsigned int index); 23385f4bc0cSAlvin Lee 23485f4bc0cSAlvin Lee bool (*remove_phantom_pipes)(struct dc *dc, struct dc_state *context); 235*1178ac68SIan Chen void (*get_panel_config_defaults)(struct dc_panel_config *panel_config); 2364562236bSHarry Wentland }; 2374562236bSHarry Wentland 2384562236bSHarry Wentland struct audio_support{ 2394562236bSHarry Wentland bool dp_audio; 2404562236bSHarry Wentland bool hdmi_audio_on_dongle; 2414562236bSHarry Wentland bool hdmi_audio_native; 2424562236bSHarry Wentland }; 2434562236bSHarry Wentland 244f0e3db90SHarry Wentland #define NO_UNDERLAY_PIPE -1 245f0e3db90SHarry Wentland 2464562236bSHarry Wentland struct resource_pool { 2474562236bSHarry Wentland struct mem_input *mis[MAX_PIPES]; 2488feabd03SYue Hin Lau struct hubp *hubps[MAX_PIPES]; 2494562236bSHarry Wentland struct input_pixel_processor *ipps[MAX_PIPES]; 2504562236bSHarry Wentland struct transform *transforms[MAX_PIPES]; 251d94585a0SYue Hin Lau struct dpp *dpps[MAX_PIPES]; 2524562236bSHarry Wentland struct output_pixel_processor *opps[MAX_PIPES]; 2534562236bSHarry Wentland struct timing_generator *timing_generators[MAX_PIPES]; 2544562236bSHarry Wentland struct stream_encoder *stream_enc[MAX_PIPES * 2]; 255c9ef081dSYue Hin Lau struct hubbub *hubbub; 256cc408d72SDmytro Laktyushkin struct mpc *mpc; 2570f1a6ad7SJun Lei struct pp_smu_funcs *pp_smu; 2581877ccf6SDavid Francis struct dce_aux *engines[MAX_PIPES]; 259c85e6e54SDavid Francis struct dce_i2c_hw *hw_i2cs[MAX_PIPES]; 260c85e6e54SDavid Francis struct dce_i2c_sw *sw_i2cs[MAX_PIPES]; 261c85e6e54SDavid Francis bool i2c_hw_buffer_in_use; 2624562236bSHarry Wentland 263345429a6SHarry Wentland struct dwbc *dwbc[MAX_DWB_PIPES]; 264345429a6SHarry Wentland struct mcif_wb *mcif_wb[MAX_DWB_PIPES]; 265345429a6SHarry Wentland struct { 266345429a6SHarry Wentland unsigned int gsl_0:1; 267345429a6SHarry Wentland unsigned int gsl_1:1; 268345429a6SHarry Wentland unsigned int gsl_2:1; 269345429a6SHarry Wentland } gsl_groups; 270345429a6SHarry Wentland 27197bda032SHarry Wentland struct display_stream_compressor *dscs[MAX_PIPES]; 272345429a6SHarry Wentland 2734562236bSHarry Wentland unsigned int pipe_count; 2744562236bSHarry Wentland unsigned int underlay_pipe_index; 2754562236bSHarry Wentland unsigned int stream_enc_count; 276929c3aaaSEric Bernstein 277e1f4328fSJimmy Kizito /* An array for accessing the link encoder objects that have been created. 278e1f4328fSJimmy Kizito * Index in array corresponds to engine ID - viz. 0: ENGINE_ID_DIGA 279e1f4328fSJimmy Kizito */ 280e1f4328fSJimmy Kizito struct link_encoder *link_encoders[MAX_DIG_LINK_ENCODERS]; 281e1f4328fSJimmy Kizito /* Number of DIG link encoder objects created - i.e. number of valid 282e1f4328fSJimmy Kizito * entries in link_encoders array. 283e1f4328fSJimmy Kizito */ 284e1f4328fSJimmy Kizito unsigned int dig_link_enc_count; 285eabf2019SJimmy Kizito /* Number of USB4 DPIA (DisplayPort Input Adapter) link objects created.*/ 286eabf2019SJimmy Kizito unsigned int usb4_dpia_count; 287e1f4328fSJimmy Kizito 28883228ebbSFangzhi Zuo unsigned int hpo_dp_stream_enc_count; 28983228ebbSFangzhi Zuo struct hpo_dp_stream_encoder *hpo_dp_stream_enc[MAX_HPO_DP2_ENCODERS]; 2903bc8d921SFangzhi Zuo unsigned int hpo_dp_link_enc_count; 2913bc8d921SFangzhi Zuo struct hpo_dp_link_encoder *hpo_dp_link_enc[MAX_HPO_DP2_LINK_ENCODERS]; 2925dba4991SBhawanpreet Lakha struct dc_3dlut *mpc_lut[MAX_PIPES]; 2935dba4991SBhawanpreet Lakha struct dc_transfer_func *mpc_shaper[MAX_PIPES]; 29459b8ca24SAlex Hung 29533d7598dSJun Lei struct { 29633d7598dSJun Lei unsigned int xtalin_clock_inKhz; 29733d7598dSJun Lei unsigned int dccg_ref_clock_inKhz; 29833d7598dSJun Lei unsigned int dchub_ref_clock_inKhz; 29933d7598dSJun Lei } ref_clocks; 3003be1406aSYongqiang Sun unsigned int timing_generator_count; 301345429a6SHarry Wentland unsigned int mpcc_count; 3024562236bSHarry Wentland 303345429a6SHarry Wentland unsigned int writeback_pipe_count; 3044562236bSHarry Wentland /* 3054562236bSHarry Wentland * reserved clock source for DP 3064562236bSHarry Wentland */ 3074562236bSHarry Wentland struct clock_source *dp_clock_source; 3084562236bSHarry Wentland 3094562236bSHarry Wentland struct clock_source *clock_sources[MAX_CLOCK_SOURCES]; 3104562236bSHarry Wentland unsigned int clk_src_count; 3114562236bSHarry Wentland 3127352193aSTai Man struct audio *audios[MAX_AUDIOS]; 3134562236bSHarry Wentland unsigned int audio_count; 3144562236bSHarry Wentland struct audio_support audio_support; 3154562236bSHarry Wentland 316ea2e8d92SDmytro Laktyushkin struct dccg *dccg; 3174562236bSHarry Wentland struct irq_service *irqs; 3184562236bSHarry Wentland 3195e7773a2SAnthony Koo struct abm *abm; 3205e7773a2SAnthony Koo struct dmcu *dmcu; 3214c1a1335SWyatt Wood struct dmub_psr *psr; 3225e7773a2SAnthony Koo 323d99f1387SBhawanpreet Lakha struct abm *multiple_abms[MAX_PIPES]; 324d99f1387SBhawanpreet Lakha 3254562236bSHarry Wentland const struct resource_funcs *funcs; 3264562236bSHarry Wentland const struct resource_caps *res_cap; 327d9a07577SJun Lei 328d9a07577SJun Lei struct ddc_service *oem_device; 3294562236bSHarry Wentland }; 3304562236bSHarry Wentland 331f553e681SDmytro Laktyushkin struct dcn_fe_bandwidth { 33269338c1fSDmytro Laktyushkin int dppclk_khz; 333799c5b9cSWesley Chalmers 334f553e681SDmytro Laktyushkin }; 335f553e681SDmytro Laktyushkin 33679b06f0cSHarry Wentland struct stream_resource { 337a6a6cb34SHarry Wentland struct output_pixel_processor *opp; 33897bda032SHarry Wentland struct display_stream_compressor *dsc; 3396b670fa9SHarry Wentland struct timing_generator *tg; 3408e9c4c8cSHarry Wentland struct stream_encoder *stream_enc; 34183228ebbSFangzhi Zuo struct hpo_dp_stream_encoder *hpo_dp_stream_enc; 342afaacef4SHarry Wentland struct audio *audio; 34310688217SHarry Wentland 34410688217SHarry Wentland struct pixel_clk_params pix_clk_params; 34596c50c0dSHarry Wentland struct encoder_info_frame encoder_info_frame; 3469aef1a31SSivapiriyanKumarasamy 3479aef1a31SSivapiriyanKumarasamy struct abm *abm; 348345429a6SHarry Wentland /* There are only (num_pipes+1)/2 groups. 0 means unassigned, 349345429a6SHarry Wentland * otherwise it's using group number 'gsl_group-1' 350345429a6SHarry Wentland */ 351345429a6SHarry Wentland uint8_t gsl_group; 35279b06f0cSHarry Wentland }; 35379b06f0cSHarry Wentland 35479b06f0cSHarry Wentland struct plane_resource { 3556702a9acSHarry Wentland struct scaler_data scl_data; 3568feabd03SYue Hin Lau struct hubp *hubp; 35786a66c4eSHarry Wentland struct mem_input *mi; 35886a66c4eSHarry Wentland struct input_pixel_processor *ipp; 35986a66c4eSHarry Wentland struct transform *xfm; 360d94585a0SYue Hin Lau struct dpp *dpp; 361e07f541fSYongqiang Sun uint8_t mpcc_inst; 362f553e681SDmytro Laktyushkin 363f553e681SDmytro Laktyushkin struct dcn_fe_bandwidth bw; 36479b06f0cSHarry Wentland }; 36579b06f0cSHarry Wentland 3664c3adc0bSWenjing Liu #define LINK_RES_HPO_DP_REC_MAP__MASK 0xFFFF 3674c3adc0bSWenjing Liu #define LINK_RES_HPO_DP_REC_MAP__SHIFT 0 3684c3adc0bSWenjing Liu 369ef30f441SWenjing Liu /* all mappable hardware resources used to enable a link */ 370ef30f441SWenjing Liu struct link_resource { 371f3fac948SWenjing Liu struct hpo_dp_link_encoder *hpo_dp_link_enc; 372ef30f441SWenjing Liu }; 373ef30f441SWenjing Liu 374017860c9SWenjing Liu struct link_config { 375017860c9SWenjing Liu struct dc_link_settings dp_link_settings; 376017860c9SWenjing Liu }; 37724c18794SDmytro Laktyushkin union pipe_update_flags { 37824c18794SDmytro Laktyushkin struct { 37924c18794SDmytro Laktyushkin uint32_t enable : 1; 38024c18794SDmytro Laktyushkin uint32_t disable : 1; 38124c18794SDmytro Laktyushkin uint32_t odm : 1; 38224c18794SDmytro Laktyushkin uint32_t global_sync : 1; 38324c18794SDmytro Laktyushkin uint32_t opp_changed : 1; 38424c18794SDmytro Laktyushkin uint32_t tg_changed : 1; 38524c18794SDmytro Laktyushkin uint32_t mpcc : 1; 38624c18794SDmytro Laktyushkin uint32_t dppclk : 1; 38724c18794SDmytro Laktyushkin uint32_t hubp_interdependent : 1; 38824c18794SDmytro Laktyushkin uint32_t hubp_rq_dlg_ttu : 1; 38924c18794SDmytro Laktyushkin uint32_t gamut_remap : 1; 39024c18794SDmytro Laktyushkin uint32_t scaler : 1; 39124c18794SDmytro Laktyushkin uint32_t viewport : 1; 392498563cfSJinZe.Xu uint32_t plane_changed : 1; 393ba5a5371SNicholas Kazlauskas uint32_t det_size : 1; 39424c18794SDmytro Laktyushkin } bits; 39524c18794SDmytro Laktyushkin uint32_t raw; 39624c18794SDmytro Laktyushkin }; 39724c18794SDmytro Laktyushkin 3984562236bSHarry Wentland struct pipe_ctx { 3993be5262eSHarry Wentland struct dc_plane_state *plane_state; 4000971c40eSHarry Wentland struct dc_stream_state *stream; 4014562236bSHarry Wentland 40279b06f0cSHarry Wentland struct plane_resource plane_res; 403fdf17f10SRodrigo Siqueira 404fdf17f10SRodrigo Siqueira /** 405fdf17f10SRodrigo Siqueira * @stream_res: Reference to DCN resource components such OPP and DSC. 406fdf17f10SRodrigo Siqueira */ 40779b06f0cSHarry Wentland struct stream_resource stream_res; 408ef30f441SWenjing Liu struct link_resource link_res; 40979b06f0cSHarry Wentland 4104562236bSHarry Wentland struct clock_source *clock_source; 4114562236bSHarry Wentland 4124562236bSHarry Wentland struct pll_settings pll_settings; 4134562236bSHarry Wentland 414017860c9SWenjing Liu /* link config records software decision for what link config should be 415017860c9SWenjing Liu * enabled given current link capability and stream during hw resource 416017860c9SWenjing Liu * mapping. This is to decouple the dependency on link capability during 417017860c9SWenjing Liu * dc commit or update. 418017860c9SWenjing Liu */ 419017860c9SWenjing Liu struct link_config link_config; 420017860c9SWenjing Liu 4214562236bSHarry Wentland uint8_t pipe_idx; 422a896f870SMeenakshikumar Somasundaram uint8_t pipe_idx_syncd; 4234562236bSHarry Wentland 4244562236bSHarry Wentland struct pipe_ctx *top_pipe; 4254562236bSHarry Wentland struct pipe_ctx *bottom_pipe; 426b1f6d01cSDmytro Laktyushkin struct pipe_ctx *next_odm_pipe; 427b1f6d01cSDmytro Laktyushkin struct pipe_ctx *prev_odm_pipe; 428f0558542SDmytro Laktyushkin 429ff5ef992SAlex Deucher struct _vcs_dpi_display_dlg_regs_st dlg_regs; 430ff5ef992SAlex Deucher struct _vcs_dpi_display_ttu_regs_st ttu_regs; 431ff5ef992SAlex Deucher struct _vcs_dpi_display_rq_regs_st rq_regs; 432ff5ef992SAlex Deucher struct _vcs_dpi_display_pipe_dest_params_st pipe_dlg_param; 4331f2fcc81SHarry Wentland struct _vcs_dpi_display_rq_params_st dml_rq_param; 4341f2fcc81SHarry Wentland struct _vcs_dpi_display_dlg_sys_params_st dml_dlg_sys_param; 4351f2fcc81SHarry Wentland struct _vcs_dpi_display_e2e_pipe_params_st dml_input; 436ba5a5371SNicholas Kazlauskas int det_buffer_size_kb; 437ba5a5371SNicholas Kazlauskas bool unbounded_req; 43859b8ca24SAlex Hung 43924c18794SDmytro Laktyushkin union pipe_update_flags update_flags; 440345429a6SHarry Wentland struct dwbc *dwbc; 441345429a6SHarry Wentland struct mcif_wb *mcif_wb; 442d209124dSBhawanpreet Lakha bool vtp_locked; 4434562236bSHarry Wentland }; 4444562236bSHarry Wentland 4450d4b4253SJimmy Kizito /* Data used for dynamic link encoder assignment. 4460d4b4253SJimmy Kizito * Tracks current and future assignments; available link encoders; 4470d4b4253SJimmy Kizito * and mode of operation (whether to use current or future assignments). 4480d4b4253SJimmy Kizito */ 4490d4b4253SJimmy Kizito struct link_enc_cfg_context { 4500d4b4253SJimmy Kizito enum link_enc_cfg_mode mode; 4510d4b4253SJimmy Kizito struct link_enc_assignment link_enc_assignments[MAX_PIPES]; 4520d4b4253SJimmy Kizito enum engine_id link_enc_avail[MAX_DIG_LINK_ENCODERS]; 4530d4b4253SJimmy Kizito struct link_enc_assignment transient_assignments[MAX_PIPES]; 4540d4b4253SJimmy Kizito }; 4550d4b4253SJimmy Kizito 4564562236bSHarry Wentland struct resource_context { 4574562236bSHarry Wentland struct pipe_ctx pipe_ctx[MAX_PIPES]; 4584562236bSHarry Wentland bool is_stream_enc_acquired[MAX_PIPES * 2]; 4594562236bSHarry Wentland bool is_audio_acquired[MAX_PIPES]; 4604562236bSHarry Wentland uint8_t clock_source_ref_count[MAX_CLOCK_SOURCES]; 4614562236bSHarry Wentland uint8_t dp_clock_source_ref_count; 462345429a6SHarry Wentland bool is_dsc_acquired[MAX_PIPES]; 4630d4b4253SJimmy Kizito struct link_enc_cfg_context link_enc_cfg_ctx; 46483228ebbSFangzhi Zuo bool is_hpo_dp_stream_enc_acquired[MAX_HPO_DP2_ENCODERS]; 4656dd8931bSWenjing Liu unsigned int hpo_dp_link_enc_to_link_idx[MAX_HPO_DP2_LINK_ENCODERS]; 4666dd8931bSWenjing Liu int hpo_dp_link_enc_ref_cnts[MAX_HPO_DP2_LINK_ENCODERS]; 4675dba4991SBhawanpreet Lakha bool is_mpc_3dlut_acquired[MAX_PIPES]; 4684562236bSHarry Wentland }; 4694562236bSHarry Wentland 4709037d802SDmytro Laktyushkin struct dce_bw_output { 4719037d802SDmytro Laktyushkin bool cpuc_state_change_enable; 4729037d802SDmytro Laktyushkin bool cpup_state_change_enable; 4739037d802SDmytro Laktyushkin bool stutter_mode_enable; 4749037d802SDmytro Laktyushkin bool nbp_state_change_enable; 4759037d802SDmytro Laktyushkin bool all_displays_in_sync; 4769037d802SDmytro Laktyushkin struct dce_watermarks urgent_wm_ns[MAX_PIPES]; 4779037d802SDmytro Laktyushkin struct dce_watermarks stutter_exit_wm_ns[MAX_PIPES]; 478b361521fSMikita Lipski struct dce_watermarks stutter_entry_wm_ns[MAX_PIPES]; 4799037d802SDmytro Laktyushkin struct dce_watermarks nbp_state_change_wm_ns[MAX_PIPES]; 4809037d802SDmytro Laktyushkin int sclk_khz; 4819037d802SDmytro Laktyushkin int sclk_deep_sleep_khz; 4829037d802SDmytro Laktyushkin int yclk_khz; 4839037d802SDmytro Laktyushkin int dispclk_khz; 4849037d802SDmytro Laktyushkin int blackout_recovery_time_us; 4859037d802SDmytro Laktyushkin }; 4869037d802SDmytro Laktyushkin 487345429a6SHarry Wentland struct dcn_bw_writeback { 488345429a6SHarry Wentland struct mcif_arb_params mcif_wb_arb[MAX_DWB_PIPES]; 489345429a6SHarry Wentland }; 490345429a6SHarry Wentland 4919037d802SDmytro Laktyushkin struct dcn_bw_output { 492d578839cSDmytro Laktyushkin struct dc_clocks clk; 4939037d802SDmytro Laktyushkin struct dcn_watermark_set watermarks; 494345429a6SHarry Wentland struct dcn_bw_writeback bw_writeback; 495ba5a5371SNicholas Kazlauskas int compbuf_size_kb; 4969037d802SDmytro Laktyushkin }; 4979037d802SDmytro Laktyushkin 498813d20dcSAidan Wood union bw_output { 4999037d802SDmytro Laktyushkin struct dcn_bw_output dcn; 5009037d802SDmytro Laktyushkin struct dce_bw_output dce; 5019037d802SDmytro Laktyushkin }; 5029037d802SDmytro Laktyushkin 503813d20dcSAidan Wood struct bw_context { 504813d20dcSAidan Wood union bw_output bw; 505813d20dcSAidan Wood struct display_mode_lib dml; 506813d20dcSAidan Wood }; 5072119aa17SDavid Francis /** 5082119aa17SDavid Francis * struct dc_state - The full description of a state requested by a user 5092119aa17SDavid Francis * 5102119aa17SDavid Francis * @streams: Stream properties 5112119aa17SDavid Francis * @stream_status: The planes on a given stream 5122119aa17SDavid Francis * @res_ctx: Persistent state of resources 513813d20dcSAidan Wood * @bw_ctx: The output from bandwidth and watermark calculations and the DML 5142119aa17SDavid Francis * @pp_display_cfg: PowerPlay clocks and settings 5152119aa17SDavid Francis * @dcn_bw_vars: non-stack memory to support bandwidth calculations 5162119aa17SDavid Francis * 5172119aa17SDavid Francis */ 518608ac7bbSJerry Zuo struct dc_state { 5190971c40eSHarry Wentland struct dc_stream_state *streams[MAX_PIPES]; 520ab2541b6SAric Cyr struct dc_stream_status stream_status[MAX_PIPES]; 521ab2541b6SAric Cyr uint8_t stream_count; 5220825d965SEric Yang uint8_t stream_mask; 5234562236bSHarry Wentland 5244562236bSHarry Wentland struct resource_context res_ctx; 5254562236bSHarry Wentland 526813d20dcSAidan Wood struct bw_context bw_ctx; 5279037d802SDmytro Laktyushkin 5285ea81b91SDmytro Laktyushkin /* Note: these are big structures, do *not* put on stack! */ 5294562236bSHarry Wentland struct dm_pp_display_configuration pp_display_cfg; 530ff5ef992SAlex Deucher struct dcn_bw_internal_vars dcn_bw_vars; 5318a76708eSAndrey Grodzovsky 5320de34efcSDmytro Laktyushkin struct clk_mgr *clk_mgr; 533ab8db3e1SAndrey Grodzovsky 5348ee5702aSDave Airlie struct kref refcount; 5356b85151fSMartin Leung 5366b85151fSMartin Leung struct { 5376b85151fSMartin Leung unsigned int stutter_period_us; 5386b85151fSMartin Leung } perf_params; 5394562236bSHarry Wentland }; 5404562236bSHarry Wentland 541e4b0eac3SJasdeep Dhillon struct dc_bounding_box_max_clk { 542e4b0eac3SJasdeep Dhillon int max_dcfclk_mhz; 543e4b0eac3SJasdeep Dhillon int max_dispclk_mhz; 544e4b0eac3SJasdeep Dhillon int max_dppclk_mhz; 545e4b0eac3SJasdeep Dhillon int max_phyclk_mhz; 546e4b0eac3SJasdeep Dhillon }; 547e4b0eac3SJasdeep Dhillon 5484562236bSHarry Wentland #endif /* _CORE_TYPES_H_ */ 549