1 /*
2  * Copyright 2012-15 Advanced Micro Devices, Inc.
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a
5  * copy of this software and associated documentation files (the "Software"),
6  * to deal in the Software without restriction, including without limitation
7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8  * and/or sell copies of the Software, and to permit persons to whom the
9  * Software is furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice shall be included in
12  * all copies or substantial portions of the Software.
13  *
14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20  * OTHER DEALINGS IN THE SOFTWARE.
21  *
22  * Authors: AMD
23  *
24  */
25 
26 #include "dm_services.h"
27 
28 /*
29  * Pre-requisites: headers required by header of this unit
30  */
31 #include "include/gpio_types.h"
32 
33 /*
34  * Header of this unit
35  */
36 
37 #include "hw_translate.h"
38 
39 /*
40  * Post-requisites: headers required by this unit
41  */
42 
43 #if defined(CONFIG_DRM_AMD_DC_SI)
44 #include "dce60/hw_translate_dce60.h"
45 #endif
46 #include "dce80/hw_translate_dce80.h"
47 #include "dce110/hw_translate_dce110.h"
48 #include "dce120/hw_translate_dce120.h"
49 #if defined(CONFIG_DRM_AMD_DC_DCN)
50 #include "dcn10/hw_translate_dcn10.h"
51 #include "dcn20/hw_translate_dcn20.h"
52 #include "dcn21/hw_translate_dcn21.h"
53 #endif
54 #if defined(CONFIG_DRM_AMD_DC_DCN3_0)
55 #include "dcn30/hw_translate_dcn30.h"
56 #endif
57 
58 #include "diagnostics/hw_translate_diag.h"
59 
60 /*
61  * This unit
62  */
63 
64 bool dal_hw_translate_init(
65 	struct hw_translate *translate,
66 	enum dce_version dce_version,
67 	enum dce_environment dce_environment)
68 {
69 	if (IS_FPGA_MAXIMUS_DC(dce_environment)) {
70 		dal_hw_translate_diag_fpga_init(translate);
71 		return true;
72 	}
73 
74 	switch (dce_version) {
75 #if defined(CONFIG_DRM_AMD_DC_SI)
76 	case DCE_VERSION_6_0:
77 	case DCE_VERSION_6_1:
78 	case DCE_VERSION_6_4:
79 		dal_hw_translate_dce60_init(translate);
80 		return true;
81 #endif
82 	case DCE_VERSION_8_0:
83 	case DCE_VERSION_8_1:
84 	case DCE_VERSION_8_3:
85 		dal_hw_translate_dce80_init(translate);
86 		return true;
87 	case DCE_VERSION_10_0:
88 	case DCE_VERSION_11_0:
89 	case DCE_VERSION_11_2:
90 	case DCE_VERSION_11_22:
91 		dal_hw_translate_dce110_init(translate);
92 		return true;
93 	case DCE_VERSION_12_0:
94 	case DCE_VERSION_12_1:
95 		dal_hw_translate_dce120_init(translate);
96 		return true;
97 #if defined(CONFIG_DRM_AMD_DC_DCN)
98 	case DCN_VERSION_1_0:
99 	case DCN_VERSION_1_01:
100 		dal_hw_translate_dcn10_init(translate);
101 		return true;
102 
103 	case DCN_VERSION_2_0:
104 		dal_hw_translate_dcn20_init(translate);
105 		return true;
106 	case DCN_VERSION_2_1:
107 		dal_hw_translate_dcn21_init(translate);
108 		return true;
109 #endif
110 #if defined(CONFIG_DRM_AMD_DC_DCN3_0)
111 	case DCN_VERSION_3_0:
112 		dal_hw_translate_dcn30_init(translate);
113 		return true;
114 #endif
115 
116 	default:
117 		BREAK_TO_DEBUGGER();
118 		return false;
119 	}
120 }
121