1 /* 2 * Copyright 2012-15 Advanced Micro Devices, Inc. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included in 12 * all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 * 22 * Authors: AMD 23 * 24 */ 25 26 #include <linux/slab.h> 27 28 #include "dm_services.h" 29 30 /* 31 * Pre-requisites: headers required by header of this unit 32 */ 33 #include "include/gpio_types.h" 34 35 /* 36 * Header of this unit 37 */ 38 39 #include "hw_factory.h" 40 41 /* 42 * Post-requisites: headers required by this unit 43 */ 44 45 #if defined(CONFIG_DRM_AMD_DC_SI) 46 #include "dce60/hw_factory_dce60.h" 47 #endif 48 #include "dce80/hw_factory_dce80.h" 49 #include "dce110/hw_factory_dce110.h" 50 #include "dce120/hw_factory_dce120.h" 51 #if defined(CONFIG_DRM_AMD_DC_DCN) 52 #include "dcn10/hw_factory_dcn10.h" 53 #include "dcn20/hw_factory_dcn20.h" 54 #include "dcn21/hw_factory_dcn21.h" 55 #include "dcn30/hw_factory_dcn30.h" 56 #include "dcn315/hw_factory_dcn315.h" 57 #endif 58 59 #include "diagnostics/hw_factory_diag.h" 60 61 /* 62 * This unit 63 */ 64 65 bool dal_hw_factory_init( 66 struct hw_factory *factory, 67 enum dce_version dce_version, 68 enum dce_environment dce_environment) 69 { 70 if (IS_FPGA_MAXIMUS_DC(dce_environment)) { 71 dal_hw_factory_diag_fpga_init(factory); 72 return true; 73 } 74 75 switch (dce_version) { 76 #if defined(CONFIG_DRM_AMD_DC_SI) 77 case DCE_VERSION_6_0: 78 case DCE_VERSION_6_1: 79 case DCE_VERSION_6_4: 80 dal_hw_factory_dce60_init(factory); 81 return true; 82 #endif 83 case DCE_VERSION_8_0: 84 case DCE_VERSION_8_1: 85 case DCE_VERSION_8_3: 86 dal_hw_factory_dce80_init(factory); 87 return true; 88 89 case DCE_VERSION_10_0: 90 dal_hw_factory_dce110_init(factory); 91 return true; 92 case DCE_VERSION_11_0: 93 case DCE_VERSION_11_2: 94 case DCE_VERSION_11_22: 95 dal_hw_factory_dce110_init(factory); 96 return true; 97 case DCE_VERSION_12_0: 98 case DCE_VERSION_12_1: 99 dal_hw_factory_dce120_init(factory); 100 return true; 101 #if defined(CONFIG_DRM_AMD_DC_DCN) 102 case DCN_VERSION_1_0: 103 case DCN_VERSION_1_01: 104 dal_hw_factory_dcn10_init(factory); 105 return true; 106 case DCN_VERSION_2_0: 107 dal_hw_factory_dcn20_init(factory); 108 return true; 109 case DCN_VERSION_2_01: 110 case DCN_VERSION_2_1: 111 dal_hw_factory_dcn21_init(factory); 112 return true; 113 case DCN_VERSION_3_0: 114 case DCN_VERSION_3_01: 115 case DCN_VERSION_3_02: 116 case DCN_VERSION_3_03: 117 case DCN_VERSION_3_1: 118 case DCN_VERSION_3_16: 119 dal_hw_factory_dcn30_init(factory); 120 return true; 121 case DCN_VERSION_3_15: 122 dal_hw_factory_dcn315_init(factory); 123 return true; 124 #endif 125 default: 126 ASSERT_CRITICAL(false); 127 return false; 128 } 129 } 130