1 /*
2  * Copyright 2012-15 Advanced Micro Devices, Inc.
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a
5  * copy of this software and associated documentation files (the "Software"),
6  * to deal in the Software without restriction, including without limitation
7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8  * and/or sell copies of the Software, and to permit persons to whom the
9  * Software is furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice shall be included in
12  * all copies or substantial portions of the Software.
13  *
14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20  * OTHER DEALINGS IN THE SOFTWARE.
21  *
22  * Authors: AMD
23  *
24  */
25 
26 #include <linux/slab.h>
27 
28 #include "dm_services.h"
29 
30 /*
31  * Pre-requisites: headers required by header of this unit
32  */
33 #include "include/gpio_types.h"
34 
35 /*
36  * Header of this unit
37  */
38 
39 #include "hw_factory.h"
40 
41 /*
42  * Post-requisites: headers required by this unit
43  */
44 
45 #include "dce80/hw_factory_dce80.h"
46 #include "dce110/hw_factory_dce110.h"
47 #include "dce120/hw_factory_dce120.h"
48 #if defined(CONFIG_DRM_AMD_DC_DCN)
49 #include "dcn10/hw_factory_dcn10.h"
50 #include "dcn20/hw_factory_dcn20.h"
51 #include "dcn21/hw_factory_dcn21.h"
52 #endif
53 
54 #include "diagnostics/hw_factory_diag.h"
55 
56 /*
57  * This unit
58  */
59 
60 bool dal_hw_factory_init(
61 	struct hw_factory *factory,
62 	enum dce_version dce_version,
63 	enum dce_environment dce_environment)
64 {
65 	if (IS_FPGA_MAXIMUS_DC(dce_environment)) {
66 		dal_hw_factory_diag_fpga_init(factory);
67 		return true;
68 	}
69 
70 	switch (dce_version) {
71 	case DCE_VERSION_8_0:
72 	case DCE_VERSION_8_1:
73 	case DCE_VERSION_8_3:
74 		dal_hw_factory_dce80_init(factory);
75 		return true;
76 
77 	case DCE_VERSION_10_0:
78 		dal_hw_factory_dce110_init(factory);
79 		return true;
80 	case DCE_VERSION_11_0:
81 	case DCE_VERSION_11_2:
82 	case DCE_VERSION_11_22:
83 		dal_hw_factory_dce110_init(factory);
84 		return true;
85 	case DCE_VERSION_12_0:
86 	case DCE_VERSION_12_1:
87 		dal_hw_factory_dce120_init(factory);
88 		return true;
89 #if defined(CONFIG_DRM_AMD_DC_DCN)
90 	case DCN_VERSION_1_0:
91 	case DCN_VERSION_1_01:
92 		dal_hw_factory_dcn10_init(factory);
93 		return true;
94 
95 	case DCN_VERSION_2_0:
96 		dal_hw_factory_dcn20_init(factory);
97 		return true;
98 	case DCN_VERSION_2_1:
99 		dal_hw_factory_dcn21_init(factory);
100 		return true;
101 #endif
102 
103 	default:
104 		ASSERT_CRITICAL(false);
105 		return false;
106 	}
107 }
108 
109 void dal_hw_factory_destroy(
110 	struct dc_context *ctx,
111 	struct hw_factory **factory)
112 {
113 	if (!factory || !*factory) {
114 		BREAK_TO_DEBUGGER();
115 		return;
116 	}
117 
118 	kfree(*factory);
119 
120 	*factory = NULL;
121 }
122