14562236bSHarry Wentland /* 24562236bSHarry Wentland * Copyright 2012-15 Advanced Micro Devices, Inc. 34562236bSHarry Wentland * 44562236bSHarry Wentland * Permission is hereby granted, free of charge, to any person obtaining a 54562236bSHarry Wentland * copy of this software and associated documentation files (the "Software"), 64562236bSHarry Wentland * to deal in the Software without restriction, including without limitation 74562236bSHarry Wentland * the rights to use, copy, modify, merge, publish, distribute, sublicense, 84562236bSHarry Wentland * and/or sell copies of the Software, and to permit persons to whom the 94562236bSHarry Wentland * Software is furnished to do so, subject to the following conditions: 104562236bSHarry Wentland * 114562236bSHarry Wentland * The above copyright notice and this permission notice shall be included in 124562236bSHarry Wentland * all copies or substantial portions of the Software. 134562236bSHarry Wentland * 144562236bSHarry Wentland * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 154562236bSHarry Wentland * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 164562236bSHarry Wentland * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 174562236bSHarry Wentland * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 184562236bSHarry Wentland * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 194562236bSHarry Wentland * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 204562236bSHarry Wentland * OTHER DEALINGS IN THE SOFTWARE. 214562236bSHarry Wentland * 224562236bSHarry Wentland * Authors: AMD 234562236bSHarry Wentland * 244562236bSHarry Wentland */ 254562236bSHarry Wentland 26c366be54SSam Ravnborg #include <linux/delay.h> 274fc4dca8SSam Ravnborg #include <linux/slab.h> 28c366be54SSam Ravnborg 294562236bSHarry Wentland #include "dm_services.h" 304562236bSHarry Wentland 3191db9311SSu Sung Chung #include "include/gpio_interface.h" 324562236bSHarry Wentland #include "include/gpio_types.h" 334562236bSHarry Wentland #include "hw_gpio.h" 344562236bSHarry Wentland #include "hw_ddc.h" 354562236bSHarry Wentland 364562236bSHarry Wentland #include "reg_helper.h" 374562236bSHarry Wentland #include "gpio_regs.h" 384562236bSHarry Wentland 394562236bSHarry Wentland 404562236bSHarry Wentland #undef FN 414562236bSHarry Wentland #define FN(reg_name, field_name) \ 424562236bSHarry Wentland ddc->shifts->field_name, ddc->masks->field_name 434562236bSHarry Wentland 444562236bSHarry Wentland #define CTX \ 454562236bSHarry Wentland ddc->base.base.ctx 464562236bSHarry Wentland #define REG(reg)\ 474562236bSHarry Wentland (ddc->regs->reg) 484562236bSHarry Wentland 4991db9311SSu Sung Chung struct gpio; 5091db9311SSu Sung Chung 514562236bSHarry Wentland static void destruct( 524562236bSHarry Wentland struct hw_ddc *pin) 534562236bSHarry Wentland { 544562236bSHarry Wentland dal_hw_gpio_destruct(&pin->base); 554562236bSHarry Wentland } 564562236bSHarry Wentland 574562236bSHarry Wentland static void destroy( 584562236bSHarry Wentland struct hw_gpio_pin **ptr) 594562236bSHarry Wentland { 604562236bSHarry Wentland struct hw_ddc *pin = HW_DDC_FROM_BASE(*ptr); 614562236bSHarry Wentland 624562236bSHarry Wentland destruct(pin); 634562236bSHarry Wentland 642004f45eSHarry Wentland kfree(pin); 654562236bSHarry Wentland 664562236bSHarry Wentland *ptr = NULL; 674562236bSHarry Wentland } 684562236bSHarry Wentland 694562236bSHarry Wentland static enum gpio_result set_config( 704562236bSHarry Wentland struct hw_gpio_pin *ptr, 714562236bSHarry Wentland const struct gpio_config_data *config_data) 724562236bSHarry Wentland { 734562236bSHarry Wentland struct hw_ddc *ddc = HW_DDC_FROM_BASE(ptr); 744562236bSHarry Wentland struct hw_gpio *hw_gpio = NULL; 754562236bSHarry Wentland uint32_t regval; 764562236bSHarry Wentland uint32_t ddc_data_pd_en = 0; 774562236bSHarry Wentland uint32_t ddc_clk_pd_en = 0; 784562236bSHarry Wentland uint32_t aux_pad_mode = 0; 794562236bSHarry Wentland 804562236bSHarry Wentland hw_gpio = &ddc->base; 814562236bSHarry Wentland 824562236bSHarry Wentland if (hw_gpio == NULL) { 834562236bSHarry Wentland ASSERT_CRITICAL(false); 844562236bSHarry Wentland return GPIO_RESULT_NULL_HANDLE; 854562236bSHarry Wentland } 864562236bSHarry Wentland 874562236bSHarry Wentland regval = REG_GET_3(gpio.MASK_reg, 884562236bSHarry Wentland DC_GPIO_DDC1DATA_PD_EN, &ddc_data_pd_en, 894562236bSHarry Wentland DC_GPIO_DDC1CLK_PD_EN, &ddc_clk_pd_en, 904562236bSHarry Wentland AUX_PAD1_MODE, &aux_pad_mode); 914562236bSHarry Wentland 924562236bSHarry Wentland switch (config_data->config.ddc.type) { 934562236bSHarry Wentland case GPIO_DDC_CONFIG_TYPE_MODE_I2C: 944562236bSHarry Wentland /* On plug-in, there is a transient level on the pad 954562236bSHarry Wentland * which must be discharged through the internal pull-down. 964562236bSHarry Wentland * Enable internal pull-down, 2.5msec discharge time 974562236bSHarry Wentland * is required for detection of AUX mode */ 984562236bSHarry Wentland if (hw_gpio->base.en != GPIO_DDC_LINE_VIP_PAD) { 994562236bSHarry Wentland if (!ddc_data_pd_en || !ddc_clk_pd_en) { 1004562236bSHarry Wentland 1014562236bSHarry Wentland REG_SET_2(gpio.MASK_reg, regval, 1024562236bSHarry Wentland DC_GPIO_DDC1DATA_PD_EN, 1, 1034562236bSHarry Wentland DC_GPIO_DDC1CLK_PD_EN, 1); 1044562236bSHarry Wentland 1054562236bSHarry Wentland if (config_data->type == 1064562236bSHarry Wentland GPIO_CONFIG_TYPE_I2C_AUX_DUAL_MODE) 1074562236bSHarry Wentland msleep(3); 1084562236bSHarry Wentland } 1094562236bSHarry Wentland } else { 1104562236bSHarry Wentland uint32_t reg2; 1114562236bSHarry Wentland uint32_t sda_pd_dis = 0; 1124562236bSHarry Wentland uint32_t scl_pd_dis = 0; 1134562236bSHarry Wentland 1144562236bSHarry Wentland reg2 = REG_GET_2(gpio.MASK_reg, 1154562236bSHarry Wentland DC_GPIO_SDA_PD_DIS, &sda_pd_dis, 1164562236bSHarry Wentland DC_GPIO_SCL_PD_DIS, &scl_pd_dis); 1174562236bSHarry Wentland 1184562236bSHarry Wentland if (sda_pd_dis) { 1194562236bSHarry Wentland REG_SET(gpio.MASK_reg, regval, 1204562236bSHarry Wentland DC_GPIO_SDA_PD_DIS, 0); 1214562236bSHarry Wentland 1224562236bSHarry Wentland if (config_data->type == 1234562236bSHarry Wentland GPIO_CONFIG_TYPE_I2C_AUX_DUAL_MODE) 1244562236bSHarry Wentland msleep(3); 1254562236bSHarry Wentland } 1264562236bSHarry Wentland 1274562236bSHarry Wentland if (!scl_pd_dis) { 1284562236bSHarry Wentland REG_SET(gpio.MASK_reg, regval, 1294562236bSHarry Wentland DC_GPIO_SCL_PD_DIS, 1); 1304562236bSHarry Wentland 1314562236bSHarry Wentland if (config_data->type == 1324562236bSHarry Wentland GPIO_CONFIG_TYPE_I2C_AUX_DUAL_MODE) 1334562236bSHarry Wentland msleep(3); 1344562236bSHarry Wentland } 1354562236bSHarry Wentland } 1364562236bSHarry Wentland 1374562236bSHarry Wentland if (aux_pad_mode) { 1384562236bSHarry Wentland /* let pins to get de-asserted 1394562236bSHarry Wentland * before setting pad to I2C mode */ 1404562236bSHarry Wentland if (config_data->config.ddc.data_en_bit_present || 1414562236bSHarry Wentland config_data->config.ddc.clock_en_bit_present) 1424562236bSHarry Wentland /* [anaumov] in DAL2, there was 1434562236bSHarry Wentland * dc_service_delay_in_microseconds(2000); */ 1444562236bSHarry Wentland msleep(2); 1454562236bSHarry Wentland 1464562236bSHarry Wentland /* set the I2C pad mode */ 1474562236bSHarry Wentland /* read the register again, 1484562236bSHarry Wentland * some bits may have been changed */ 1494562236bSHarry Wentland REG_UPDATE(gpio.MASK_reg, 1504562236bSHarry Wentland AUX_PAD1_MODE, 0); 1514562236bSHarry Wentland } 1524562236bSHarry Wentland 1532e35facfSHarry Wentland #if defined(CONFIG_DRM_AMD_DC_DCN2_0) 1542e35facfSHarry Wentland if (ddc->regs->dc_gpio_aux_ctrl_5 != 0) { 1552e35facfSHarry Wentland REG_UPDATE(dc_gpio_aux_ctrl_5, DDC_PAD_I2CMODE, 1); 1562e35facfSHarry Wentland } 1572e35facfSHarry Wentland //set DC_IO_aux_rxsel = 2'b01 1582e35facfSHarry Wentland if (ddc->regs->phy_aux_cntl != 0) { 1592e35facfSHarry Wentland REG_UPDATE(phy_aux_cntl, AUX_PAD_RXSEL, 1); 1602e35facfSHarry Wentland } 1612e35facfSHarry Wentland #endif 1624562236bSHarry Wentland return GPIO_RESULT_OK; 1634562236bSHarry Wentland case GPIO_DDC_CONFIG_TYPE_MODE_AUX: 1644562236bSHarry Wentland /* set the AUX pad mode */ 1654562236bSHarry Wentland if (!aux_pad_mode) { 1664562236bSHarry Wentland REG_SET(gpio.MASK_reg, regval, 1674562236bSHarry Wentland AUX_PAD1_MODE, 1); 1684562236bSHarry Wentland } 1692e35facfSHarry Wentland #if defined(CONFIG_DRM_AMD_DC_DCN2_0) 1702e35facfSHarry Wentland if (ddc->regs->dc_gpio_aux_ctrl_5 != 0) { 1712e35facfSHarry Wentland REG_UPDATE(dc_gpio_aux_ctrl_5, 1722e35facfSHarry Wentland DDC_PAD_I2CMODE, 0); 1732e35facfSHarry Wentland } 1742e35facfSHarry Wentland #endif 1754562236bSHarry Wentland 1764562236bSHarry Wentland return GPIO_RESULT_OK; 1774562236bSHarry Wentland case GPIO_DDC_CONFIG_TYPE_POLL_FOR_CONNECT: 1784562236bSHarry Wentland if ((hw_gpio->base.en >= GPIO_DDC_LINE_DDC1) && 1794562236bSHarry Wentland (hw_gpio->base.en <= GPIO_DDC_LINE_DDC_VGA)) { 1804562236bSHarry Wentland REG_UPDATE_3(ddc_setup, 1814562236bSHarry Wentland DC_I2C_DDC1_ENABLE, 1, 1824562236bSHarry Wentland DC_I2C_DDC1_EDID_DETECT_ENABLE, 1, 1834562236bSHarry Wentland DC_I2C_DDC1_EDID_DETECT_MODE, 0); 1844562236bSHarry Wentland return GPIO_RESULT_OK; 1854562236bSHarry Wentland } 1864562236bSHarry Wentland break; 1874562236bSHarry Wentland case GPIO_DDC_CONFIG_TYPE_POLL_FOR_DISCONNECT: 1884562236bSHarry Wentland if ((hw_gpio->base.en >= GPIO_DDC_LINE_DDC1) && 1894562236bSHarry Wentland (hw_gpio->base.en <= GPIO_DDC_LINE_DDC_VGA)) { 1904562236bSHarry Wentland REG_UPDATE_3(ddc_setup, 1914562236bSHarry Wentland DC_I2C_DDC1_ENABLE, 1, 1924562236bSHarry Wentland DC_I2C_DDC1_EDID_DETECT_ENABLE, 1, 1934562236bSHarry Wentland DC_I2C_DDC1_EDID_DETECT_MODE, 1); 1944562236bSHarry Wentland return GPIO_RESULT_OK; 1954562236bSHarry Wentland } 1964562236bSHarry Wentland break; 1974562236bSHarry Wentland case GPIO_DDC_CONFIG_TYPE_DISABLE_POLLING: 1984562236bSHarry Wentland if ((hw_gpio->base.en >= GPIO_DDC_LINE_DDC1) && 1994562236bSHarry Wentland (hw_gpio->base.en <= GPIO_DDC_LINE_DDC_VGA)) { 2004562236bSHarry Wentland REG_UPDATE_2(ddc_setup, 2014562236bSHarry Wentland DC_I2C_DDC1_ENABLE, 0, 2024562236bSHarry Wentland DC_I2C_DDC1_EDID_DETECT_ENABLE, 0); 2034562236bSHarry Wentland return GPIO_RESULT_OK; 2044562236bSHarry Wentland } 2054562236bSHarry Wentland break; 2064562236bSHarry Wentland } 2074562236bSHarry Wentland 2084562236bSHarry Wentland BREAK_TO_DEBUGGER(); 2094562236bSHarry Wentland 2104562236bSHarry Wentland return GPIO_RESULT_NON_SPECIFIC_ERROR; 2114562236bSHarry Wentland } 2124562236bSHarry Wentland 2134562236bSHarry Wentland static const struct hw_gpio_pin_funcs funcs = { 2144562236bSHarry Wentland .destroy = destroy, 2154562236bSHarry Wentland .open = dal_hw_gpio_open, 2164562236bSHarry Wentland .get_value = dal_hw_gpio_get_value, 2174562236bSHarry Wentland .set_value = dal_hw_gpio_set_value, 2184562236bSHarry Wentland .set_config = set_config, 2194562236bSHarry Wentland .change_mode = dal_hw_gpio_change_mode, 2204562236bSHarry Wentland .close = dal_hw_gpio_close, 2214562236bSHarry Wentland }; 2224562236bSHarry Wentland 2230e1c42fdSDave Airlie static void construct( 2244562236bSHarry Wentland struct hw_ddc *ddc, 2254562236bSHarry Wentland enum gpio_id id, 2264562236bSHarry Wentland uint32_t en, 2274562236bSHarry Wentland struct dc_context *ctx) 2284562236bSHarry Wentland { 2290e1c42fdSDave Airlie dal_hw_gpio_construct(&ddc->base, id, en, ctx); 2304562236bSHarry Wentland ddc->base.base.funcs = &funcs; 2314562236bSHarry Wentland } 2324562236bSHarry Wentland 23391db9311SSu Sung Chung void dal_hw_ddc_init( 23491db9311SSu Sung Chung struct hw_ddc **hw_ddc, 2354562236bSHarry Wentland struct dc_context *ctx, 2364562236bSHarry Wentland enum gpio_id id, 2374562236bSHarry Wentland uint32_t en) 2384562236bSHarry Wentland { 2390e1c42fdSDave Airlie if ((en < GPIO_DDC_LINE_MIN) || (en > GPIO_DDC_LINE_MAX)) { 2400e1c42fdSDave Airlie ASSERT_CRITICAL(false); 24191db9311SSu Sung Chung *hw_ddc = NULL; 2420e1c42fdSDave Airlie } 2430e1c42fdSDave Airlie 24491db9311SSu Sung Chung *hw_ddc = kzalloc(sizeof(struct hw_ddc), GFP_KERNEL); 24591db9311SSu Sung Chung if (!*hw_ddc) { 2464562236bSHarry Wentland ASSERT_CRITICAL(false); 24791db9311SSu Sung Chung return; 2484562236bSHarry Wentland } 2494562236bSHarry Wentland 25091db9311SSu Sung Chung construct(*hw_ddc, id, en, ctx); 25191db9311SSu Sung Chung } 25291db9311SSu Sung Chung 25391db9311SSu Sung Chung struct hw_gpio_pin *dal_hw_ddc_get_pin(struct gpio *gpio) 25491db9311SSu Sung Chung { 25591db9311SSu Sung Chung struct hw_ddc *hw_ddc = dal_gpio_get_ddc(gpio); 25691db9311SSu Sung Chung 25791db9311SSu Sung Chung return &hw_ddc->base.base; 2584562236bSHarry Wentland } 259