141529d79SRoman Li // SPDX-License-Identifier: MIT 241529d79SRoman Li /* 341529d79SRoman Li * Copyright 2022 Advanced Micro Devices, Inc. 441529d79SRoman Li * 541529d79SRoman Li * Permission is hereby granted, free of charge, to any person obtaining a 641529d79SRoman Li * copy of this software and associated documentation files (the "Software"), 741529d79SRoman Li * to deal in the Software without restriction, including without limitation 841529d79SRoman Li * the rights to use, copy, modify, merge, publish, distribute, sublicense, 941529d79SRoman Li * and/or sell copies of the Software, and to permit persons to whom the 1041529d79SRoman Li * Software is furnished to do so, subject to the following conditions: 1141529d79SRoman Li * 1241529d79SRoman Li * The above copyright notice and this permission notice shall be included in 1341529d79SRoman Li * all copies or substantial portions of the Software. 1441529d79SRoman Li * 1541529d79SRoman Li * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 1641529d79SRoman Li * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 1741529d79SRoman Li * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 1841529d79SRoman Li * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 1941529d79SRoman Li * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 2041529d79SRoman Li * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 2141529d79SRoman Li * OTHER DEALINGS IN THE SOFTWARE. 2241529d79SRoman Li * 2341529d79SRoman Li * Authors: AMD 2441529d79SRoman Li * 2541529d79SRoman Li */ 2641529d79SRoman Li 2741529d79SRoman Li #include "../display_mode_lib.h" 2841529d79SRoman Li #include "../display_mode_vba.h" 2941529d79SRoman Li #include "../dml_inline_defs.h" 3041529d79SRoman Li #include "display_rq_dlg_calc_314.h" 3141529d79SRoman Li 3241529d79SRoman Li static bool CalculateBytePerPixelAnd256BBlockSizes( 3341529d79SRoman Li enum source_format_class SourcePixelFormat, 3441529d79SRoman Li enum dm_swizzle_mode SurfaceTiling, 3541529d79SRoman Li unsigned int *BytePerPixelY, 3641529d79SRoman Li unsigned int *BytePerPixelC, 3741529d79SRoman Li double *BytePerPixelDETY, 3841529d79SRoman Li double *BytePerPixelDETC, 3941529d79SRoman Li unsigned int *BlockHeight256BytesY, 4041529d79SRoman Li unsigned int *BlockHeight256BytesC, 4141529d79SRoman Li unsigned int *BlockWidth256BytesY, 4241529d79SRoman Li unsigned int *BlockWidth256BytesC) 4341529d79SRoman Li { 4441529d79SRoman Li if (SourcePixelFormat == dm_444_64) { 4541529d79SRoman Li *BytePerPixelDETY = 8; 4641529d79SRoman Li *BytePerPixelDETC = 0; 4741529d79SRoman Li *BytePerPixelY = 8; 4841529d79SRoman Li *BytePerPixelC = 0; 4941529d79SRoman Li } else if (SourcePixelFormat == dm_444_32 || SourcePixelFormat == dm_rgbe) { 5041529d79SRoman Li *BytePerPixelDETY = 4; 5141529d79SRoman Li *BytePerPixelDETC = 0; 5241529d79SRoman Li *BytePerPixelY = 4; 5341529d79SRoman Li *BytePerPixelC = 0; 54*578292aaSDeepak R Varma } else if (SourcePixelFormat == dm_444_16) { 5541529d79SRoman Li *BytePerPixelDETY = 2; 5641529d79SRoman Li *BytePerPixelDETC = 0; 5741529d79SRoman Li *BytePerPixelY = 2; 5841529d79SRoman Li *BytePerPixelC = 0; 5941529d79SRoman Li } else if (SourcePixelFormat == dm_444_8) { 6041529d79SRoman Li *BytePerPixelDETY = 1; 6141529d79SRoman Li *BytePerPixelDETC = 0; 6241529d79SRoman Li *BytePerPixelY = 1; 6341529d79SRoman Li *BytePerPixelC = 0; 6441529d79SRoman Li } else if (SourcePixelFormat == dm_rgbe_alpha) { 6541529d79SRoman Li *BytePerPixelDETY = 4; 6641529d79SRoman Li *BytePerPixelDETC = 1; 6741529d79SRoman Li *BytePerPixelY = 4; 6841529d79SRoman Li *BytePerPixelC = 1; 6941529d79SRoman Li } else if (SourcePixelFormat == dm_420_8) { 7041529d79SRoman Li *BytePerPixelDETY = 1; 7141529d79SRoman Li *BytePerPixelDETC = 2; 7241529d79SRoman Li *BytePerPixelY = 1; 7341529d79SRoman Li *BytePerPixelC = 2; 7441529d79SRoman Li } else if (SourcePixelFormat == dm_420_12) { 7541529d79SRoman Li *BytePerPixelDETY = 2; 7641529d79SRoman Li *BytePerPixelDETC = 4; 7741529d79SRoman Li *BytePerPixelY = 2; 7841529d79SRoman Li *BytePerPixelC = 4; 7941529d79SRoman Li } else { 8041529d79SRoman Li *BytePerPixelDETY = 4.0 / 3; 8141529d79SRoman Li *BytePerPixelDETC = 8.0 / 3; 8241529d79SRoman Li *BytePerPixelY = 2; 8341529d79SRoman Li *BytePerPixelC = 4; 8441529d79SRoman Li } 8541529d79SRoman Li 8641529d79SRoman Li if ((SourcePixelFormat == dm_444_64 || SourcePixelFormat == dm_444_32 || SourcePixelFormat == dm_444_16 || SourcePixelFormat == dm_444_8 || SourcePixelFormat == dm_mono_16 8741529d79SRoman Li || SourcePixelFormat == dm_mono_8 || SourcePixelFormat == dm_rgbe)) { 8841529d79SRoman Li if (SurfaceTiling == dm_sw_linear) 8941529d79SRoman Li *BlockHeight256BytesY = 1; 9041529d79SRoman Li else if (SourcePixelFormat == dm_444_64) 9141529d79SRoman Li *BlockHeight256BytesY = 4; 9241529d79SRoman Li else if (SourcePixelFormat == dm_444_8) 9341529d79SRoman Li *BlockHeight256BytesY = 16; 9441529d79SRoman Li else 9541529d79SRoman Li *BlockHeight256BytesY = 8; 9641529d79SRoman Li 9741529d79SRoman Li *BlockWidth256BytesY = 256U / *BytePerPixelY / *BlockHeight256BytesY; 9841529d79SRoman Li *BlockHeight256BytesC = 0; 9941529d79SRoman Li *BlockWidth256BytesC = 0; 10041529d79SRoman Li } else { 10141529d79SRoman Li if (SurfaceTiling == dm_sw_linear) { 10241529d79SRoman Li *BlockHeight256BytesY = 1; 10341529d79SRoman Li *BlockHeight256BytesC = 1; 10441529d79SRoman Li } else if (SourcePixelFormat == dm_rgbe_alpha) { 10541529d79SRoman Li *BlockHeight256BytesY = 8; 10641529d79SRoman Li *BlockHeight256BytesC = 16; 10741529d79SRoman Li } else if (SourcePixelFormat == dm_420_8) { 10841529d79SRoman Li *BlockHeight256BytesY = 16; 10941529d79SRoman Li *BlockHeight256BytesC = 8; 11041529d79SRoman Li } else { 11141529d79SRoman Li *BlockHeight256BytesY = 8; 11241529d79SRoman Li *BlockHeight256BytesC = 8; 11341529d79SRoman Li } 11441529d79SRoman Li *BlockWidth256BytesY = 256U / *BytePerPixelY / *BlockHeight256BytesY; 11541529d79SRoman Li *BlockWidth256BytesC = 256U / *BytePerPixelC / *BlockHeight256BytesC; 11641529d79SRoman Li } 11741529d79SRoman Li return true; 11841529d79SRoman Li } 11941529d79SRoman Li 12041529d79SRoman Li static bool is_dual_plane(enum source_format_class source_format) 12141529d79SRoman Li { 12241529d79SRoman Li bool ret_val = 0; 12341529d79SRoman Li 12441529d79SRoman Li if ((source_format == dm_420_12) || (source_format == dm_420_8) || (source_format == dm_420_10) || (source_format == dm_rgbe_alpha)) 12541529d79SRoman Li ret_val = 1; 12641529d79SRoman Li 12741529d79SRoman Li return ret_val; 12841529d79SRoman Li } 12941529d79SRoman Li 13041529d79SRoman Li static double get_refcyc_per_delivery( 13141529d79SRoman Li struct display_mode_lib *mode_lib, 13241529d79SRoman Li double refclk_freq_in_mhz, 13341529d79SRoman Li double pclk_freq_in_mhz, 13441529d79SRoman Li unsigned int odm_combine, 13541529d79SRoman Li unsigned int recout_width, 13641529d79SRoman Li unsigned int hactive, 13741529d79SRoman Li double vratio, 13841529d79SRoman Li double hscale_pixel_rate, 13941529d79SRoman Li unsigned int delivery_width, 14041529d79SRoman Li unsigned int req_per_swath_ub) 14141529d79SRoman Li { 14241529d79SRoman Li double refcyc_per_delivery = 0.0; 14341529d79SRoman Li 14441529d79SRoman Li if (vratio <= 1.0) { 14541529d79SRoman Li if (odm_combine) 14641529d79SRoman Li refcyc_per_delivery = (double) refclk_freq_in_mhz * (double) ((unsigned int) odm_combine * 2) 14741529d79SRoman Li * dml_min((double) recout_width, (double) hactive / ((unsigned int) odm_combine * 2)) / pclk_freq_in_mhz / (double) req_per_swath_ub; 14841529d79SRoman Li else 14941529d79SRoman Li refcyc_per_delivery = (double) refclk_freq_in_mhz * (double) recout_width / pclk_freq_in_mhz / (double) req_per_swath_ub; 15041529d79SRoman Li } else { 15141529d79SRoman Li refcyc_per_delivery = (double) refclk_freq_in_mhz * (double) delivery_width / (double) hscale_pixel_rate / (double) req_per_swath_ub; 15241529d79SRoman Li } 15341529d79SRoman Li 15441529d79SRoman Li #ifdef __DML_RQ_DLG_CALC_DEBUG__ 15541529d79SRoman Li dml_print("DML_DLG: %s: refclk_freq_in_mhz = %3.2f\n", __func__, refclk_freq_in_mhz); 15641529d79SRoman Li dml_print("DML_DLG: %s: pclk_freq_in_mhz = %3.2f\n", __func__, pclk_freq_in_mhz); 15741529d79SRoman Li dml_print("DML_DLG: %s: recout_width = %d\n", __func__, recout_width); 15841529d79SRoman Li dml_print("DML_DLG: %s: vratio = %3.2f\n", __func__, vratio); 15941529d79SRoman Li dml_print("DML_DLG: %s: req_per_swath_ub = %d\n", __func__, req_per_swath_ub); 16041529d79SRoman Li dml_print("DML_DLG: %s: hscale_pixel_rate = %3.2f\n", __func__, hscale_pixel_rate); 16141529d79SRoman Li dml_print("DML_DLG: %s: delivery_width = %d\n", __func__, delivery_width); 16241529d79SRoman Li dml_print("DML_DLG: %s: refcyc_per_delivery= %3.2f\n", __func__, refcyc_per_delivery); 16341529d79SRoman Li #endif 16441529d79SRoman Li 16541529d79SRoman Li return refcyc_per_delivery; 16641529d79SRoman Li 16741529d79SRoman Li } 16841529d79SRoman Li 16941529d79SRoman Li static unsigned int get_blk_size_bytes(const enum source_macro_tile_size tile_size) 17041529d79SRoman Li { 17141529d79SRoman Li if (tile_size == dm_256k_tile) 17241529d79SRoman Li return (256 * 1024); 17341529d79SRoman Li else if (tile_size == dm_64k_tile) 17441529d79SRoman Li return (64 * 1024); 17541529d79SRoman Li else 17641529d79SRoman Li return (4 * 1024); 17741529d79SRoman Li } 17841529d79SRoman Li 17941529d79SRoman Li static void extract_rq_sizing_regs(struct display_mode_lib *mode_lib, display_data_rq_regs_st *rq_regs, const display_data_rq_sizing_params_st *rq_sizing) 18041529d79SRoman Li { 18141529d79SRoman Li print__data_rq_sizing_params_st(mode_lib, rq_sizing); 18241529d79SRoman Li 18341529d79SRoman Li rq_regs->chunk_size = dml_log2(rq_sizing->chunk_bytes) - 10; 18441529d79SRoman Li 18541529d79SRoman Li if (rq_sizing->min_chunk_bytes == 0) 18641529d79SRoman Li rq_regs->min_chunk_size = 0; 18741529d79SRoman Li else 18841529d79SRoman Li rq_regs->min_chunk_size = dml_log2(rq_sizing->min_chunk_bytes) - 8 + 1; 18941529d79SRoman Li 19041529d79SRoman Li rq_regs->meta_chunk_size = dml_log2(rq_sizing->meta_chunk_bytes) - 10; 19141529d79SRoman Li if (rq_sizing->min_meta_chunk_bytes == 0) 19241529d79SRoman Li rq_regs->min_meta_chunk_size = 0; 19341529d79SRoman Li else 19441529d79SRoman Li rq_regs->min_meta_chunk_size = dml_log2(rq_sizing->min_meta_chunk_bytes) - 6 + 1; 19541529d79SRoman Li 19641529d79SRoman Li rq_regs->dpte_group_size = dml_log2(rq_sizing->dpte_group_bytes) - 6; 19741529d79SRoman Li rq_regs->mpte_group_size = dml_log2(rq_sizing->mpte_group_bytes) - 6; 19841529d79SRoman Li } 19941529d79SRoman Li 20041529d79SRoman Li static void extract_rq_regs(struct display_mode_lib *mode_lib, display_rq_regs_st *rq_regs, const display_rq_params_st *rq_param) 20141529d79SRoman Li { 20241529d79SRoman Li unsigned int detile_buf_size_in_bytes = mode_lib->ip.det_buffer_size_kbytes * 1024; 20341529d79SRoman Li unsigned int detile_buf_plane1_addr = 0; 20441529d79SRoman Li 20541529d79SRoman Li extract_rq_sizing_regs(mode_lib, &(rq_regs->rq_regs_l), &rq_param->sizing.rq_l); 20641529d79SRoman Li 20741529d79SRoman Li rq_regs->rq_regs_l.pte_row_height_linear = dml_floor(dml_log2(rq_param->dlg.rq_l.dpte_row_height), 1) - 3; 20841529d79SRoman Li 20941529d79SRoman Li if (rq_param->yuv420) { 21041529d79SRoman Li extract_rq_sizing_regs(mode_lib, &(rq_regs->rq_regs_c), &rq_param->sizing.rq_c); 21141529d79SRoman Li rq_regs->rq_regs_c.pte_row_height_linear = dml_floor(dml_log2(rq_param->dlg.rq_c.dpte_row_height), 1) - 3; 21241529d79SRoman Li } 21341529d79SRoman Li 21441529d79SRoman Li rq_regs->rq_regs_l.swath_height = dml_log2(rq_param->dlg.rq_l.swath_height); 21541529d79SRoman Li rq_regs->rq_regs_c.swath_height = dml_log2(rq_param->dlg.rq_c.swath_height); 21641529d79SRoman Li 21741529d79SRoman Li // FIXME: take the max between luma, chroma chunk size? 21841529d79SRoman Li // okay for now, as we are setting chunk_bytes to 8kb anyways 21941529d79SRoman Li if (rq_param->sizing.rq_l.chunk_bytes >= 32 * 1024 || (rq_param->yuv420 && rq_param->sizing.rq_c.chunk_bytes >= 32 * 1024)) { //32kb 22041529d79SRoman Li rq_regs->drq_expansion_mode = 0; 22141529d79SRoman Li } else { 22241529d79SRoman Li rq_regs->drq_expansion_mode = 2; 22341529d79SRoman Li } 22441529d79SRoman Li rq_regs->prq_expansion_mode = 1; 22541529d79SRoman Li rq_regs->mrq_expansion_mode = 1; 22641529d79SRoman Li rq_regs->crq_expansion_mode = 1; 22741529d79SRoman Li 22841529d79SRoman Li // Note: detile_buf_plane1_addr is in unit of 1KB 22941529d79SRoman Li if (rq_param->yuv420) { 23041529d79SRoman Li if ((double) rq_param->misc.rq_l.stored_swath_bytes / (double) rq_param->misc.rq_c.stored_swath_bytes <= 1.5) { 23141529d79SRoman Li detile_buf_plane1_addr = (detile_buf_size_in_bytes / 2.0 / 1024.0); // half to chroma 23241529d79SRoman Li #ifdef __DML_RQ_DLG_CALC_DEBUG__ 23341529d79SRoman Li dml_print("DML_DLG: %s: detile_buf_plane1_addr = %0d (1/2 to chroma)\n", __func__, detile_buf_plane1_addr); 23441529d79SRoman Li #endif 23541529d79SRoman Li } else { 23641529d79SRoman Li detile_buf_plane1_addr = dml_round_to_multiple((unsigned int) ((2.0 * detile_buf_size_in_bytes) / 3.0), 1024, 0) / 1024.0; // 2/3 to luma 23741529d79SRoman Li #ifdef __DML_RQ_DLG_CALC_DEBUG__ 23841529d79SRoman Li dml_print("DML_DLG: %s: detile_buf_plane1_addr = %0d (1/3 chroma)\n", __func__, detile_buf_plane1_addr); 23941529d79SRoman Li #endif 24041529d79SRoman Li } 24141529d79SRoman Li } 24241529d79SRoman Li rq_regs->plane1_base_address = detile_buf_plane1_addr; 24341529d79SRoman Li 24441529d79SRoman Li #ifdef __DML_RQ_DLG_CALC_DEBUG__ 24541529d79SRoman Li dml_print("DML_DLG: %s: detile_buf_size_in_bytes = %0d\n", __func__, detile_buf_size_in_bytes); 24641529d79SRoman Li dml_print("DML_DLG: %s: detile_buf_plane1_addr = %0d\n", __func__, detile_buf_plane1_addr); 24741529d79SRoman Li dml_print("DML_DLG: %s: plane1_base_address = %0d\n", __func__, rq_regs->plane1_base_address); 24841529d79SRoman Li dml_print("DML_DLG: %s: rq_l.stored_swath_bytes = %0d\n", __func__, rq_param->misc.rq_l.stored_swath_bytes); 24941529d79SRoman Li dml_print("DML_DLG: %s: rq_c.stored_swath_bytes = %0d\n", __func__, rq_param->misc.rq_c.stored_swath_bytes); 25041529d79SRoman Li dml_print("DML_DLG: %s: rq_l.swath_height = %0d\n", __func__, rq_param->dlg.rq_l.swath_height); 25141529d79SRoman Li dml_print("DML_DLG: %s: rq_c.swath_height = %0d\n", __func__, rq_param->dlg.rq_c.swath_height); 25241529d79SRoman Li #endif 25341529d79SRoman Li } 25441529d79SRoman Li 25541529d79SRoman Li static void handle_det_buf_split(struct display_mode_lib *mode_lib, display_rq_params_st *rq_param, const display_pipe_source_params_st *pipe_src_param) 25641529d79SRoman Li { 25741529d79SRoman Li unsigned int total_swath_bytes = 0; 25841529d79SRoman Li unsigned int swath_bytes_l = 0; 25941529d79SRoman Li unsigned int swath_bytes_c = 0; 26041529d79SRoman Li unsigned int full_swath_bytes_packed_l = 0; 26141529d79SRoman Li unsigned int full_swath_bytes_packed_c = 0; 26241529d79SRoman Li bool req128_l = 0; 26341529d79SRoman Li bool req128_c = 0; 26441529d79SRoman Li bool surf_linear = (pipe_src_param->sw_mode == dm_sw_linear); 26541529d79SRoman Li bool surf_vert = (pipe_src_param->source_scan == dm_vert); 26641529d79SRoman Li unsigned int log2_swath_height_l = 0; 26741529d79SRoman Li unsigned int log2_swath_height_c = 0; 26841529d79SRoman Li unsigned int detile_buf_size_in_bytes = mode_lib->ip.det_buffer_size_kbytes * 1024; 26941529d79SRoman Li 27041529d79SRoman Li full_swath_bytes_packed_l = rq_param->misc.rq_l.full_swath_bytes; 27141529d79SRoman Li full_swath_bytes_packed_c = rq_param->misc.rq_c.full_swath_bytes; 27241529d79SRoman Li 27341529d79SRoman Li #ifdef __DML_RQ_DLG_CALC_DEBUG__ 27441529d79SRoman Li dml_print("DML_DLG: %s: full_swath_bytes_packed_l = %0d\n", __func__, full_swath_bytes_packed_l); 27541529d79SRoman Li dml_print("DML_DLG: %s: full_swath_bytes_packed_c = %0d\n", __func__, full_swath_bytes_packed_c); 27641529d79SRoman Li #endif 27741529d79SRoman Li 27841529d79SRoman Li if (rq_param->yuv420_10bpc) { 27941529d79SRoman Li full_swath_bytes_packed_l = dml_round_to_multiple(rq_param->misc.rq_l.full_swath_bytes * 2.0 / 3.0, 256, 1) + 256; 28041529d79SRoman Li full_swath_bytes_packed_c = dml_round_to_multiple(rq_param->misc.rq_c.full_swath_bytes * 2.0 / 3.0, 256, 1) + 256; 28141529d79SRoman Li #ifdef __DML_RQ_DLG_CALC_DEBUG__ 28241529d79SRoman Li dml_print("DML_DLG: %s: full_swath_bytes_packed_l = %0d (3-2 packing)\n", __func__, full_swath_bytes_packed_l); 28341529d79SRoman Li dml_print("DML_DLG: %s: full_swath_bytes_packed_c = %0d (3-2 packing)\n", __func__, full_swath_bytes_packed_c); 28441529d79SRoman Li #endif 28541529d79SRoman Li } 28641529d79SRoman Li 28741529d79SRoman Li if (rq_param->yuv420) 28841529d79SRoman Li total_swath_bytes = 2 * full_swath_bytes_packed_l + 2 * full_swath_bytes_packed_c; 28941529d79SRoman Li else 29041529d79SRoman Li total_swath_bytes = 2 * full_swath_bytes_packed_l; 29141529d79SRoman Li 29241529d79SRoman Li #ifdef __DML_RQ_DLG_CALC_DEBUG__ 29341529d79SRoman Li dml_print("DML_DLG: %s: total_swath_bytes = %0d\n", __func__, total_swath_bytes); 29441529d79SRoman Li dml_print("DML_DLG: %s: detile_buf_size_in_bytes = %0d\n", __func__, detile_buf_size_in_bytes); 29541529d79SRoman Li #endif 29641529d79SRoman Li 29741529d79SRoman Li if (total_swath_bytes <= detile_buf_size_in_bytes) { //full 256b request 29841529d79SRoman Li req128_l = 0; 29941529d79SRoman Li req128_c = 0; 30041529d79SRoman Li swath_bytes_l = full_swath_bytes_packed_l; 30141529d79SRoman Li swath_bytes_c = full_swath_bytes_packed_c; 30241529d79SRoman Li } else if (!rq_param->yuv420) { 30341529d79SRoman Li req128_l = 1; 30441529d79SRoman Li req128_c = 0; 30541529d79SRoman Li swath_bytes_c = full_swath_bytes_packed_c; 30641529d79SRoman Li swath_bytes_l = full_swath_bytes_packed_l / 2; 30741529d79SRoman Li } else if ((double) full_swath_bytes_packed_l / (double) full_swath_bytes_packed_c < 1.5) { 30841529d79SRoman Li req128_l = 0; 30941529d79SRoman Li req128_c = 1; 31041529d79SRoman Li swath_bytes_l = full_swath_bytes_packed_l; 31141529d79SRoman Li swath_bytes_c = full_swath_bytes_packed_c / 2; 31241529d79SRoman Li 31341529d79SRoman Li total_swath_bytes = 2 * swath_bytes_l + 2 * swath_bytes_c; 31441529d79SRoman Li 31541529d79SRoman Li if (total_swath_bytes > detile_buf_size_in_bytes) { 31641529d79SRoman Li req128_l = 1; 31741529d79SRoman Li swath_bytes_l = full_swath_bytes_packed_l / 2; 31841529d79SRoman Li } 31941529d79SRoman Li } else { 32041529d79SRoman Li req128_l = 1; 32141529d79SRoman Li req128_c = 0; 32241529d79SRoman Li swath_bytes_l = full_swath_bytes_packed_l / 2; 32341529d79SRoman Li swath_bytes_c = full_swath_bytes_packed_c; 32441529d79SRoman Li 32541529d79SRoman Li total_swath_bytes = 2 * swath_bytes_l + 2 * swath_bytes_c; 32641529d79SRoman Li 32741529d79SRoman Li if (total_swath_bytes > detile_buf_size_in_bytes) { 32841529d79SRoman Li req128_c = 1; 32941529d79SRoman Li swath_bytes_c = full_swath_bytes_packed_c / 2; 33041529d79SRoman Li } 33141529d79SRoman Li } 33241529d79SRoman Li 33341529d79SRoman Li if (rq_param->yuv420) 33441529d79SRoman Li total_swath_bytes = 2 * swath_bytes_l + 2 * swath_bytes_c; 33541529d79SRoman Li else 33641529d79SRoman Li total_swath_bytes = 2 * swath_bytes_l; 33741529d79SRoman Li 33841529d79SRoman Li rq_param->misc.rq_l.stored_swath_bytes = swath_bytes_l; 33941529d79SRoman Li rq_param->misc.rq_c.stored_swath_bytes = swath_bytes_c; 34041529d79SRoman Li 34141529d79SRoman Li #ifdef __DML_RQ_DLG_CALC_DEBUG__ 34241529d79SRoman Li dml_print("DML_DLG: %s: total_swath_bytes = %0d\n", __func__, total_swath_bytes); 34341529d79SRoman Li dml_print("DML_DLG: %s: rq_l.stored_swath_bytes = %0d\n", __func__, rq_param->misc.rq_l.stored_swath_bytes); 34441529d79SRoman Li dml_print("DML_DLG: %s: rq_c.stored_swath_bytes = %0d\n", __func__, rq_param->misc.rq_c.stored_swath_bytes); 34541529d79SRoman Li #endif 34641529d79SRoman Li if (surf_linear) { 34741529d79SRoman Li log2_swath_height_l = 0; 34841529d79SRoman Li log2_swath_height_c = 0; 34941529d79SRoman Li } else { 35041529d79SRoman Li unsigned int swath_height_l; 35141529d79SRoman Li unsigned int swath_height_c; 35241529d79SRoman Li 35341529d79SRoman Li if (!surf_vert) { 35441529d79SRoman Li swath_height_l = rq_param->misc.rq_l.blk256_height; 35541529d79SRoman Li swath_height_c = rq_param->misc.rq_c.blk256_height; 35641529d79SRoman Li } else { 35741529d79SRoman Li swath_height_l = rq_param->misc.rq_l.blk256_width; 35841529d79SRoman Li swath_height_c = rq_param->misc.rq_c.blk256_width; 35941529d79SRoman Li } 36041529d79SRoman Li 36141529d79SRoman Li if (swath_height_l > 0) 36241529d79SRoman Li log2_swath_height_l = dml_log2(swath_height_l); 36341529d79SRoman Li 36441529d79SRoman Li if (req128_l && log2_swath_height_l > 0) 36541529d79SRoman Li log2_swath_height_l -= 1; 36641529d79SRoman Li 36741529d79SRoman Li if (swath_height_c > 0) 36841529d79SRoman Li log2_swath_height_c = dml_log2(swath_height_c); 36941529d79SRoman Li 37041529d79SRoman Li if (req128_c && log2_swath_height_c > 0) 37141529d79SRoman Li log2_swath_height_c -= 1; 37241529d79SRoman Li } 37341529d79SRoman Li 37441529d79SRoman Li rq_param->dlg.rq_l.swath_height = 1 << log2_swath_height_l; 37541529d79SRoman Li rq_param->dlg.rq_c.swath_height = 1 << log2_swath_height_c; 37641529d79SRoman Li 37741529d79SRoman Li #ifdef __DML_RQ_DLG_CALC_DEBUG__ 37841529d79SRoman Li dml_print("DML_DLG: %s: req128_l = %0d\n", __func__, req128_l); 37941529d79SRoman Li dml_print("DML_DLG: %s: req128_c = %0d\n", __func__, req128_c); 38041529d79SRoman Li dml_print("DML_DLG: %s: full_swath_bytes_packed_l = %0d\n", __func__, full_swath_bytes_packed_l); 38141529d79SRoman Li dml_print("DML_DLG: %s: full_swath_bytes_packed_c = %0d\n", __func__, full_swath_bytes_packed_c); 38241529d79SRoman Li dml_print("DML_DLG: %s: swath_height luma = %0d\n", __func__, rq_param->dlg.rq_l.swath_height); 38341529d79SRoman Li dml_print("DML_DLG: %s: swath_height chroma = %0d\n", __func__, rq_param->dlg.rq_c.swath_height); 38441529d79SRoman Li #endif 38541529d79SRoman Li } 38641529d79SRoman Li 38741529d79SRoman Li static void get_meta_and_pte_attr( 38841529d79SRoman Li struct display_mode_lib *mode_lib, 38941529d79SRoman Li display_data_rq_dlg_params_st *rq_dlg_param, 39041529d79SRoman Li display_data_rq_misc_params_st *rq_misc_param, 39141529d79SRoman Li display_data_rq_sizing_params_st *rq_sizing_param, 39241529d79SRoman Li unsigned int vp_width, 39341529d79SRoman Li unsigned int vp_height, 39441529d79SRoman Li unsigned int data_pitch, 39541529d79SRoman Li unsigned int meta_pitch, 39641529d79SRoman Li unsigned int source_format, 39741529d79SRoman Li unsigned int tiling, 39841529d79SRoman Li unsigned int macro_tile_size, 39941529d79SRoman Li unsigned int source_scan, 40041529d79SRoman Li unsigned int hostvm_enable, 40141529d79SRoman Li unsigned int is_chroma, 40241529d79SRoman Li unsigned int surface_height) 40341529d79SRoman Li { 40441529d79SRoman Li bool surf_linear = (tiling == dm_sw_linear); 40541529d79SRoman Li bool surf_vert = (source_scan == dm_vert); 40641529d79SRoman Li 40741529d79SRoman Li unsigned int bytes_per_element; 40841529d79SRoman Li unsigned int bytes_per_element_y; 40941529d79SRoman Li unsigned int bytes_per_element_c; 41041529d79SRoman Li 41141529d79SRoman Li unsigned int blk256_width = 0; 41241529d79SRoman Li unsigned int blk256_height = 0; 41341529d79SRoman Li 41441529d79SRoman Li unsigned int blk256_width_y = 0; 41541529d79SRoman Li unsigned int blk256_height_y = 0; 41641529d79SRoman Li unsigned int blk256_width_c = 0; 41741529d79SRoman Li unsigned int blk256_height_c = 0; 41841529d79SRoman Li unsigned int log2_bytes_per_element; 41941529d79SRoman Li unsigned int log2_blk256_width; 42041529d79SRoman Li unsigned int log2_blk256_height; 42141529d79SRoman Li unsigned int blk_bytes; 42241529d79SRoman Li unsigned int log2_blk_bytes; 42341529d79SRoman Li unsigned int log2_blk_height; 42441529d79SRoman Li unsigned int log2_blk_width; 42541529d79SRoman Li unsigned int log2_meta_req_bytes; 42641529d79SRoman Li unsigned int log2_meta_req_height; 42741529d79SRoman Li unsigned int log2_meta_req_width; 42841529d79SRoman Li unsigned int meta_req_width; 42941529d79SRoman Li unsigned int meta_req_height; 43041529d79SRoman Li unsigned int log2_meta_row_height; 43141529d79SRoman Li unsigned int meta_row_width_ub; 43241529d79SRoman Li unsigned int log2_meta_chunk_bytes; 43341529d79SRoman Li unsigned int log2_meta_chunk_height; 43441529d79SRoman Li 43541529d79SRoman Li //full sized meta chunk width in unit of data elements 43641529d79SRoman Li unsigned int log2_meta_chunk_width; 43741529d79SRoman Li unsigned int log2_min_meta_chunk_bytes; 43841529d79SRoman Li unsigned int min_meta_chunk_width; 43941529d79SRoman Li unsigned int meta_chunk_width; 44041529d79SRoman Li unsigned int meta_chunk_per_row_int; 44141529d79SRoman Li unsigned int meta_row_remainder; 44241529d79SRoman Li unsigned int meta_chunk_threshold; 44341529d79SRoman Li unsigned int meta_blk_height; 44441529d79SRoman Li unsigned int meta_surface_bytes; 44541529d79SRoman Li unsigned int vmpg_bytes; 44641529d79SRoman Li unsigned int meta_pte_req_per_frame_ub; 44741529d79SRoman Li unsigned int meta_pte_bytes_per_frame_ub; 44841529d79SRoman Li const unsigned int log2_vmpg_bytes = dml_log2(mode_lib->soc.gpuvm_min_page_size_bytes); 44941529d79SRoman Li const bool dual_plane_en = is_dual_plane((enum source_format_class) (source_format)); 45041529d79SRoman Li const unsigned int dpte_buf_in_pte_reqs = 45141529d79SRoman Li dual_plane_en ? (is_chroma ? mode_lib->ip.dpte_buffer_size_in_pte_reqs_chroma : mode_lib->ip.dpte_buffer_size_in_pte_reqs_luma) : (mode_lib->ip.dpte_buffer_size_in_pte_reqs_luma 45241529d79SRoman Li + mode_lib->ip.dpte_buffer_size_in_pte_reqs_chroma); 45341529d79SRoman Li 45441529d79SRoman Li unsigned int log2_vmpg_height = 0; 45541529d79SRoman Li unsigned int log2_vmpg_width = 0; 45641529d79SRoman Li unsigned int log2_dpte_req_height_ptes = 0; 45741529d79SRoman Li unsigned int log2_dpte_req_height = 0; 45841529d79SRoman Li unsigned int log2_dpte_req_width = 0; 45941529d79SRoman Li unsigned int log2_dpte_row_height_linear = 0; 46041529d79SRoman Li unsigned int log2_dpte_row_height = 0; 46141529d79SRoman Li unsigned int log2_dpte_group_width = 0; 46241529d79SRoman Li unsigned int dpte_row_width_ub = 0; 46341529d79SRoman Li unsigned int dpte_req_height = 0; 46441529d79SRoman Li unsigned int dpte_req_width = 0; 46541529d79SRoman Li unsigned int dpte_group_width = 0; 46641529d79SRoman Li unsigned int log2_dpte_group_bytes = 0; 46741529d79SRoman Li unsigned int log2_dpte_group_length = 0; 46841529d79SRoman Li double byte_per_pixel_det_y; 46941529d79SRoman Li double byte_per_pixel_det_c; 47041529d79SRoman Li 47141529d79SRoman Li CalculateBytePerPixelAnd256BBlockSizes( 47241529d79SRoman Li (enum source_format_class) (source_format), 47341529d79SRoman Li (enum dm_swizzle_mode) (tiling), 47441529d79SRoman Li &bytes_per_element_y, 47541529d79SRoman Li &bytes_per_element_c, 47641529d79SRoman Li &byte_per_pixel_det_y, 47741529d79SRoman Li &byte_per_pixel_det_c, 47841529d79SRoman Li &blk256_height_y, 47941529d79SRoman Li &blk256_height_c, 48041529d79SRoman Li &blk256_width_y, 48141529d79SRoman Li &blk256_width_c); 48241529d79SRoman Li 48341529d79SRoman Li if (!is_chroma) { 48441529d79SRoman Li blk256_width = blk256_width_y; 48541529d79SRoman Li blk256_height = blk256_height_y; 48641529d79SRoman Li bytes_per_element = bytes_per_element_y; 48741529d79SRoman Li } else { 48841529d79SRoman Li blk256_width = blk256_width_c; 48941529d79SRoman Li blk256_height = blk256_height_c; 49041529d79SRoman Li bytes_per_element = bytes_per_element_c; 49141529d79SRoman Li } 49241529d79SRoman Li 49341529d79SRoman Li log2_bytes_per_element = dml_log2(bytes_per_element); 49441529d79SRoman Li 49541529d79SRoman Li dml_print("DML_DLG: %s: surf_linear = %d\n", __func__, surf_linear); 49641529d79SRoman Li dml_print("DML_DLG: %s: surf_vert = %d\n", __func__, surf_vert); 49741529d79SRoman Li dml_print("DML_DLG: %s: blk256_width = %d\n", __func__, blk256_width); 49841529d79SRoman Li dml_print("DML_DLG: %s: blk256_height = %d\n", __func__, blk256_height); 49941529d79SRoman Li 50041529d79SRoman Li log2_blk256_width = dml_log2((double) blk256_width); 50141529d79SRoman Li log2_blk256_height = dml_log2((double) blk256_height); 50241529d79SRoman Li blk_bytes = surf_linear ? 256 : get_blk_size_bytes((enum source_macro_tile_size) macro_tile_size); 50341529d79SRoman Li log2_blk_bytes = dml_log2((double) blk_bytes); 50441529d79SRoman Li log2_blk_height = 0; 50541529d79SRoman Li log2_blk_width = 0; 50641529d79SRoman Li 50741529d79SRoman Li // remember log rule 50841529d79SRoman Li // "+" in log is multiply 50941529d79SRoman Li // "-" in log is divide 51041529d79SRoman Li // "/2" is like square root 51141529d79SRoman Li // blk is vertical biased 51241529d79SRoman Li if (tiling != dm_sw_linear) 51341529d79SRoman Li log2_blk_height = log2_blk256_height + dml_ceil((double) (log2_blk_bytes - 8) / 2.0, 1); 51441529d79SRoman Li else 51541529d79SRoman Li log2_blk_height = 0; // blk height of 1 51641529d79SRoman Li 51741529d79SRoman Li log2_blk_width = log2_blk_bytes - log2_bytes_per_element - log2_blk_height; 51841529d79SRoman Li 51941529d79SRoman Li if (!surf_vert) { 52041529d79SRoman Li unsigned int temp; 52141529d79SRoman Li 52241529d79SRoman Li temp = dml_round_to_multiple(vp_width - 1, blk256_width, 1) + blk256_width; 52341529d79SRoman Li if (data_pitch < blk256_width) { 52441529d79SRoman Li dml_print("WARNING: DML_DLG: %s: swath_size calculation ignoring data_pitch=%u < blk256_width=%u\n", __func__, data_pitch, blk256_width); 52541529d79SRoman Li } else { 52641529d79SRoman Li if (temp > data_pitch) { 52741529d79SRoman Li if (data_pitch >= vp_width) 52841529d79SRoman Li temp = data_pitch; 52941529d79SRoman Li else 53041529d79SRoman Li dml_print("WARNING: DML_DLG: %s: swath_size calculation ignoring data_pitch=%u < vp_width=%u\n", __func__, data_pitch, vp_width); 53141529d79SRoman Li } 53241529d79SRoman Li } 53341529d79SRoman Li rq_dlg_param->swath_width_ub = temp; 53441529d79SRoman Li rq_dlg_param->req_per_swath_ub = temp >> log2_blk256_width; 53541529d79SRoman Li } else { 53641529d79SRoman Li unsigned int temp; 53741529d79SRoman Li 53841529d79SRoman Li temp = dml_round_to_multiple(vp_height - 1, blk256_height, 1) + blk256_height; 53941529d79SRoman Li if (surface_height < blk256_height) { 54041529d79SRoman Li dml_print("WARNING: DML_DLG: %s swath_size calculation ignored surface_height=%u < blk256_height=%u\n", __func__, surface_height, blk256_height); 54141529d79SRoman Li } else { 54241529d79SRoman Li if (temp > surface_height) { 54341529d79SRoman Li if (surface_height >= vp_height) 54441529d79SRoman Li temp = surface_height; 54541529d79SRoman Li else 54641529d79SRoman Li dml_print("WARNING: DML_DLG: %s swath_size calculation ignored surface_height=%u < vp_height=%u\n", __func__, surface_height, vp_height); 54741529d79SRoman Li } 54841529d79SRoman Li } 54941529d79SRoman Li rq_dlg_param->swath_width_ub = temp; 55041529d79SRoman Li rq_dlg_param->req_per_swath_ub = temp >> log2_blk256_height; 55141529d79SRoman Li } 55241529d79SRoman Li 55341529d79SRoman Li if (!surf_vert) 55441529d79SRoman Li rq_misc_param->full_swath_bytes = rq_dlg_param->swath_width_ub * blk256_height * bytes_per_element; 55541529d79SRoman Li else 55641529d79SRoman Li rq_misc_param->full_swath_bytes = rq_dlg_param->swath_width_ub * blk256_width * bytes_per_element; 55741529d79SRoman Li 55841529d79SRoman Li rq_misc_param->blk256_height = blk256_height; 55941529d79SRoman Li rq_misc_param->blk256_width = blk256_width; 56041529d79SRoman Li 56141529d79SRoman Li // ------- 56241529d79SRoman Li // meta 56341529d79SRoman Li // ------- 56441529d79SRoman Li log2_meta_req_bytes = 6; // meta request is 64b and is 8x8byte meta element 56541529d79SRoman Li 56641529d79SRoman Li // each 64b meta request for dcn is 8x8 meta elements and 56741529d79SRoman Li // a meta element covers one 256b block of the data surface. 56841529d79SRoman Li log2_meta_req_height = log2_blk256_height + 3; // meta req is 8x8 byte, each byte represent 1 blk256 56941529d79SRoman Li log2_meta_req_width = log2_meta_req_bytes + 8 - log2_bytes_per_element - log2_meta_req_height; 57041529d79SRoman Li meta_req_width = 1 << log2_meta_req_width; 57141529d79SRoman Li meta_req_height = 1 << log2_meta_req_height; 57241529d79SRoman Li log2_meta_row_height = 0; 57341529d79SRoman Li meta_row_width_ub = 0; 57441529d79SRoman Li 57541529d79SRoman Li // the dimensions of a meta row are meta_row_width x meta_row_height in elements. 57641529d79SRoman Li // calculate upper bound of the meta_row_width 57741529d79SRoman Li if (!surf_vert) { 57841529d79SRoman Li log2_meta_row_height = log2_meta_req_height; 57941529d79SRoman Li meta_row_width_ub = dml_round_to_multiple(vp_width - 1, meta_req_width, 1) + meta_req_width; 58041529d79SRoman Li rq_dlg_param->meta_req_per_row_ub = meta_row_width_ub / meta_req_width; 58141529d79SRoman Li } else { 58241529d79SRoman Li log2_meta_row_height = log2_meta_req_width; 58341529d79SRoman Li meta_row_width_ub = dml_round_to_multiple(vp_height - 1, meta_req_height, 1) + meta_req_height; 58441529d79SRoman Li rq_dlg_param->meta_req_per_row_ub = meta_row_width_ub / meta_req_height; 58541529d79SRoman Li } 58641529d79SRoman Li rq_dlg_param->meta_bytes_per_row_ub = rq_dlg_param->meta_req_per_row_ub * 64; 58741529d79SRoman Li 58841529d79SRoman Li rq_dlg_param->meta_row_height = 1 << log2_meta_row_height; 58941529d79SRoman Li 59041529d79SRoman Li log2_meta_chunk_bytes = dml_log2(rq_sizing_param->meta_chunk_bytes); 59141529d79SRoman Li log2_meta_chunk_height = log2_meta_row_height; 59241529d79SRoman Li 59341529d79SRoman Li //full sized meta chunk width in unit of data elements 59441529d79SRoman Li log2_meta_chunk_width = log2_meta_chunk_bytes + 8 - log2_bytes_per_element - log2_meta_chunk_height; 59541529d79SRoman Li log2_min_meta_chunk_bytes = dml_log2(rq_sizing_param->min_meta_chunk_bytes); 59641529d79SRoman Li min_meta_chunk_width = 1 << (log2_min_meta_chunk_bytes + 8 - log2_bytes_per_element - log2_meta_chunk_height); 59741529d79SRoman Li meta_chunk_width = 1 << log2_meta_chunk_width; 59841529d79SRoman Li meta_chunk_per_row_int = (unsigned int) (meta_row_width_ub / meta_chunk_width); 59941529d79SRoman Li meta_row_remainder = meta_row_width_ub % meta_chunk_width; 60041529d79SRoman Li meta_chunk_threshold = 0; 60141529d79SRoman Li meta_blk_height = blk256_height * 64; 60241529d79SRoman Li meta_surface_bytes = meta_pitch * (dml_round_to_multiple(vp_height - 1, meta_blk_height, 1) + meta_blk_height) * bytes_per_element / 256; 60341529d79SRoman Li vmpg_bytes = mode_lib->soc.gpuvm_min_page_size_bytes; 60441529d79SRoman Li meta_pte_req_per_frame_ub = (dml_round_to_multiple(meta_surface_bytes - vmpg_bytes, 8 * vmpg_bytes, 1) + 8 * vmpg_bytes) / (8 * vmpg_bytes); 60541529d79SRoman Li meta_pte_bytes_per_frame_ub = meta_pte_req_per_frame_ub * 64; //64B mpte request 60641529d79SRoman Li rq_dlg_param->meta_pte_bytes_per_frame_ub = meta_pte_bytes_per_frame_ub; 60741529d79SRoman Li 60841529d79SRoman Li dml_print("DML_DLG: %s: meta_blk_height = %d\n", __func__, meta_blk_height); 60941529d79SRoman Li dml_print("DML_DLG: %s: meta_surface_bytes = %d\n", __func__, meta_surface_bytes); 61041529d79SRoman Li dml_print("DML_DLG: %s: meta_pte_req_per_frame_ub = %d\n", __func__, meta_pte_req_per_frame_ub); 61141529d79SRoman Li dml_print("DML_DLG: %s: meta_pte_bytes_per_frame_ub = %d\n", __func__, meta_pte_bytes_per_frame_ub); 61241529d79SRoman Li 61341529d79SRoman Li if (!surf_vert) 61441529d79SRoman Li meta_chunk_threshold = 2 * min_meta_chunk_width - meta_req_width; 61541529d79SRoman Li else 61641529d79SRoman Li meta_chunk_threshold = 2 * min_meta_chunk_width - meta_req_height; 61741529d79SRoman Li 61841529d79SRoman Li if (meta_row_remainder <= meta_chunk_threshold) 61941529d79SRoman Li rq_dlg_param->meta_chunks_per_row_ub = meta_chunk_per_row_int + 1; 62041529d79SRoman Li else 62141529d79SRoman Li rq_dlg_param->meta_chunks_per_row_ub = meta_chunk_per_row_int + 2; 62241529d79SRoman Li 62341529d79SRoman Li // ------ 62441529d79SRoman Li // dpte 62541529d79SRoman Li // ------ 62641529d79SRoman Li if (surf_linear) 62741529d79SRoman Li log2_vmpg_height = 0; // one line high 62841529d79SRoman Li else 62941529d79SRoman Li log2_vmpg_height = (log2_vmpg_bytes - 8) / 2 + log2_blk256_height; 63041529d79SRoman Li 63141529d79SRoman Li log2_vmpg_width = log2_vmpg_bytes - log2_bytes_per_element - log2_vmpg_height; 63241529d79SRoman Li 63341529d79SRoman Li // only 3 possible shapes for dpte request in dimensions of ptes: 8x1, 4x2, 2x4. 63441529d79SRoman Li if (surf_linear) { //one 64B PTE request returns 8 PTEs 63541529d79SRoman Li log2_dpte_req_height_ptes = 0; 63641529d79SRoman Li log2_dpte_req_width = log2_vmpg_width + 3; 63741529d79SRoman Li log2_dpte_req_height = 0; 63841529d79SRoman Li } else if (log2_blk_bytes == 12) { //4KB tile means 4kB page size 63941529d79SRoman Li //one 64B req gives 8x1 PTEs for 4KB tile 64041529d79SRoman Li log2_dpte_req_height_ptes = 0; 64141529d79SRoman Li log2_dpte_req_width = log2_blk_width + 3; 64241529d79SRoman Li log2_dpte_req_height = log2_blk_height + 0; 64341529d79SRoman Li } else if ((log2_blk_bytes >= 16) && (log2_vmpg_bytes == 12)) { // tile block >= 64KB 64441529d79SRoman Li //two 64B reqs of 2x4 PTEs give 16 PTEs to cover 64KB 64541529d79SRoman Li log2_dpte_req_height_ptes = 4; 64641529d79SRoman Li log2_dpte_req_width = log2_blk256_width + 4; // log2_64KB_width 64741529d79SRoman Li log2_dpte_req_height = log2_blk256_height + 4; // log2_64KB_height 64841529d79SRoman Li } else { //64KB page size and must 64KB tile block 64941529d79SRoman Li //one 64B req gives 8x1 PTEs for 64KB tile 65041529d79SRoman Li log2_dpte_req_height_ptes = 0; 65141529d79SRoman Li log2_dpte_req_width = log2_blk_width + 3; 65241529d79SRoman Li log2_dpte_req_height = log2_blk_height + 0; 65341529d79SRoman Li } 65441529d79SRoman Li 65541529d79SRoman Li // The dpte request dimensions in data elements is dpte_req_width x dpte_req_height 65641529d79SRoman Li // log2_vmpg_width is how much 1 pte represent, now calculating how much a 64b pte req represent 65741529d79SRoman Li // That depends on the pte shape (i.e. 8x1, 4x2, 2x4) 65841529d79SRoman Li //log2_dpte_req_height = log2_vmpg_height + log2_dpte_req_height_ptes; 65941529d79SRoman Li //log2_dpte_req_width = log2_vmpg_width + log2_dpte_req_width_ptes; 66041529d79SRoman Li dpte_req_height = 1 << log2_dpte_req_height; 66141529d79SRoman Li dpte_req_width = 1 << log2_dpte_req_width; 66241529d79SRoman Li 66341529d79SRoman Li // calculate pitch dpte row buffer can hold 66441529d79SRoman Li // round the result down to a power of two. 66541529d79SRoman Li if (surf_linear) { 66641529d79SRoman Li unsigned int dpte_row_height; 66741529d79SRoman Li 66841529d79SRoman Li log2_dpte_row_height_linear = dml_floor(dml_log2(dpte_buf_in_pte_reqs * dpte_req_width / data_pitch), 1); 66941529d79SRoman Li 67041529d79SRoman Li dml_print("DML_DLG: %s: is_chroma = %d\n", __func__, is_chroma); 67141529d79SRoman Li dml_print("DML_DLG: %s: dpte_buf_in_pte_reqs = %d\n", __func__, dpte_buf_in_pte_reqs); 67241529d79SRoman Li dml_print("DML_DLG: %s: log2_dpte_row_height_linear = %d\n", __func__, log2_dpte_row_height_linear); 67341529d79SRoman Li 67441529d79SRoman Li ASSERT(log2_dpte_row_height_linear >= 3); 67541529d79SRoman Li 67641529d79SRoman Li if (log2_dpte_row_height_linear > 7) 67741529d79SRoman Li log2_dpte_row_height_linear = 7; 67841529d79SRoman Li 67941529d79SRoman Li log2_dpte_row_height = log2_dpte_row_height_linear; 68041529d79SRoman Li // For linear, the dpte row is pitch dependent and the pte requests wrap at the pitch boundary. 68141529d79SRoman Li // the dpte_row_width_ub is the upper bound of data_pitch*dpte_row_height in elements with this unique buffering. 68241529d79SRoman Li dpte_row_height = 1 << log2_dpte_row_height; 68341529d79SRoman Li dpte_row_width_ub = dml_round_to_multiple(data_pitch * dpte_row_height - 1, dpte_req_width, 1) + dpte_req_width; 68441529d79SRoman Li rq_dlg_param->dpte_req_per_row_ub = dpte_row_width_ub / dpte_req_width; 68541529d79SRoman Li } else { 68641529d79SRoman Li // the upper bound of the dpte_row_width without dependency on viewport position follows. 68741529d79SRoman Li // for tiled mode, row height is the same as req height and row store up to vp size upper bound 68841529d79SRoman Li if (!surf_vert) { 68941529d79SRoman Li log2_dpte_row_height = log2_dpte_req_height; 69041529d79SRoman Li dpte_row_width_ub = dml_round_to_multiple(vp_width - 1, dpte_req_width, 1) + dpte_req_width; 69141529d79SRoman Li rq_dlg_param->dpte_req_per_row_ub = dpte_row_width_ub / dpte_req_width; 69241529d79SRoman Li } else { 69341529d79SRoman Li log2_dpte_row_height = (log2_blk_width < log2_dpte_req_width) ? log2_blk_width : log2_dpte_req_width; 69441529d79SRoman Li dpte_row_width_ub = dml_round_to_multiple(vp_height - 1, dpte_req_height, 1) + dpte_req_height; 69541529d79SRoman Li rq_dlg_param->dpte_req_per_row_ub = dpte_row_width_ub / dpte_req_height; 69641529d79SRoman Li } 69741529d79SRoman Li } 69841529d79SRoman Li if (log2_blk_bytes >= 16 && log2_vmpg_bytes == 12) // tile block >= 64KB 69941529d79SRoman Li rq_dlg_param->dpte_bytes_per_row_ub = rq_dlg_param->dpte_req_per_row_ub * 128; //2*64B dpte request 70041529d79SRoman Li else 70141529d79SRoman Li rq_dlg_param->dpte_bytes_per_row_ub = rq_dlg_param->dpte_req_per_row_ub * 64; //64B dpte request 70241529d79SRoman Li 70341529d79SRoman Li rq_dlg_param->dpte_row_height = 1 << log2_dpte_row_height; 70441529d79SRoman Li 70541529d79SRoman Li // the dpte_group_bytes is reduced for the specific case of vertical 70641529d79SRoman Li // access of a tile surface that has dpte request of 8x1 ptes. 70741529d79SRoman Li if (hostvm_enable) 70841529d79SRoman Li rq_sizing_param->dpte_group_bytes = 512; 70941529d79SRoman Li else { 71041529d79SRoman Li if (!surf_linear & (log2_dpte_req_height_ptes == 0) & surf_vert) //reduced, in this case, will have page fault within a group 71141529d79SRoman Li rq_sizing_param->dpte_group_bytes = 512; 71241529d79SRoman Li else 71341529d79SRoman Li rq_sizing_param->dpte_group_bytes = 2048; 71441529d79SRoman Li } 71541529d79SRoman Li 71641529d79SRoman Li //since pte request size is 64byte, the number of data pte requests per full sized group is as follows. 71741529d79SRoman Li log2_dpte_group_bytes = dml_log2(rq_sizing_param->dpte_group_bytes); 71841529d79SRoman Li log2_dpte_group_length = log2_dpte_group_bytes - 6; //length in 64b requests 71941529d79SRoman Li 72041529d79SRoman Li // full sized data pte group width in elements 72141529d79SRoman Li if (!surf_vert) 72241529d79SRoman Li log2_dpte_group_width = log2_dpte_group_length + log2_dpte_req_width; 72341529d79SRoman Li else 72441529d79SRoman Li log2_dpte_group_width = log2_dpte_group_length + log2_dpte_req_height; 72541529d79SRoman Li 72641529d79SRoman Li //But if the tile block >=64KB and the page size is 4KB, then each dPTE request is 2*64B 72741529d79SRoman Li if ((log2_blk_bytes >= 16) && (log2_vmpg_bytes == 12)) // tile block >= 64KB 72841529d79SRoman Li log2_dpte_group_width = log2_dpte_group_width - 1; 72941529d79SRoman Li 73041529d79SRoman Li dpte_group_width = 1 << log2_dpte_group_width; 73141529d79SRoman Li 73241529d79SRoman Li // since dpte groups are only aligned to dpte_req_width and not dpte_group_width, 73341529d79SRoman Li // the upper bound for the dpte groups per row is as follows. 73441529d79SRoman Li rq_dlg_param->dpte_groups_per_row_ub = dml_ceil((double) dpte_row_width_ub / dpte_group_width, 1); 73541529d79SRoman Li } 73641529d79SRoman Li 73741529d79SRoman Li static void get_surf_rq_param( 73841529d79SRoman Li struct display_mode_lib *mode_lib, 73941529d79SRoman Li display_data_rq_sizing_params_st *rq_sizing_param, 74041529d79SRoman Li display_data_rq_dlg_params_st *rq_dlg_param, 74141529d79SRoman Li display_data_rq_misc_params_st *rq_misc_param, 74241529d79SRoman Li const display_pipe_params_st *pipe_param, 74341529d79SRoman Li bool is_chroma, 74441529d79SRoman Li bool is_alpha) 74541529d79SRoman Li { 74641529d79SRoman Li bool mode_422 = 0; 74741529d79SRoman Li unsigned int vp_width = 0; 74841529d79SRoman Li unsigned int vp_height = 0; 74941529d79SRoman Li unsigned int data_pitch = 0; 75041529d79SRoman Li unsigned int meta_pitch = 0; 75141529d79SRoman Li unsigned int surface_height = 0; 75241529d79SRoman Li unsigned int ppe = mode_422 ? 2 : 1; 75341529d79SRoman Li 75441529d79SRoman Li // FIXME check if ppe apply for both luma and chroma in 422 case 75541529d79SRoman Li if (is_chroma | is_alpha) { 75641529d79SRoman Li vp_width = pipe_param->src.viewport_width_c / ppe; 75741529d79SRoman Li vp_height = pipe_param->src.viewport_height_c; 75841529d79SRoman Li data_pitch = pipe_param->src.data_pitch_c; 75941529d79SRoman Li meta_pitch = pipe_param->src.meta_pitch_c; 76041529d79SRoman Li surface_height = pipe_param->src.surface_height_y / 2.0; 76141529d79SRoman Li } else { 76241529d79SRoman Li vp_width = pipe_param->src.viewport_width / ppe; 76341529d79SRoman Li vp_height = pipe_param->src.viewport_height; 76441529d79SRoman Li data_pitch = pipe_param->src.data_pitch; 76541529d79SRoman Li meta_pitch = pipe_param->src.meta_pitch; 76641529d79SRoman Li surface_height = pipe_param->src.surface_height_y; 76741529d79SRoman Li } 76841529d79SRoman Li 76941529d79SRoman Li if (pipe_param->dest.odm_combine) { 77041529d79SRoman Li unsigned int access_dir; 77141529d79SRoman Li unsigned int full_src_vp_width; 77241529d79SRoman Li unsigned int hactive_odm; 77341529d79SRoman Li unsigned int src_hactive_odm; 77441529d79SRoman Li 77541529d79SRoman Li access_dir = (pipe_param->src.source_scan == dm_vert); // vp access direction: horizontal or vertical accessed 77641529d79SRoman Li hactive_odm = pipe_param->dest.hactive / ((unsigned int) pipe_param->dest.odm_combine * 2); 77741529d79SRoman Li if (is_chroma) { 77841529d79SRoman Li full_src_vp_width = pipe_param->scale_ratio_depth.hscl_ratio_c * pipe_param->dest.full_recout_width; 77941529d79SRoman Li src_hactive_odm = pipe_param->scale_ratio_depth.hscl_ratio_c * hactive_odm; 78041529d79SRoman Li } else { 78141529d79SRoman Li full_src_vp_width = pipe_param->scale_ratio_depth.hscl_ratio * pipe_param->dest.full_recout_width; 78241529d79SRoman Li src_hactive_odm = pipe_param->scale_ratio_depth.hscl_ratio * hactive_odm; 78341529d79SRoman Li } 78441529d79SRoman Li 78541529d79SRoman Li if (access_dir == 0) { 78641529d79SRoman Li vp_width = dml_min(full_src_vp_width, src_hactive_odm); 78741529d79SRoman Li dml_print("DML_DLG: %s: vp_width = %d\n", __func__, vp_width); 78841529d79SRoman Li } else { 78941529d79SRoman Li vp_height = dml_min(full_src_vp_width, src_hactive_odm); 79041529d79SRoman Li dml_print("DML_DLG: %s: vp_height = %d\n", __func__, vp_height); 79141529d79SRoman Li 79241529d79SRoman Li } 79341529d79SRoman Li dml_print("DML_DLG: %s: full_src_vp_width = %d\n", __func__, full_src_vp_width); 79441529d79SRoman Li dml_print("DML_DLG: %s: hactive_odm = %d\n", __func__, hactive_odm); 79541529d79SRoman Li dml_print("DML_DLG: %s: src_hactive_odm = %d\n", __func__, src_hactive_odm); 79641529d79SRoman Li } 79741529d79SRoman Li 79841529d79SRoman Li rq_sizing_param->chunk_bytes = 8192; 79941529d79SRoman Li 80041529d79SRoman Li if (is_alpha) 80141529d79SRoman Li rq_sizing_param->chunk_bytes = 4096; 80241529d79SRoman Li 80341529d79SRoman Li if (rq_sizing_param->chunk_bytes == 64 * 1024) 80441529d79SRoman Li rq_sizing_param->min_chunk_bytes = 0; 80541529d79SRoman Li else 80641529d79SRoman Li rq_sizing_param->min_chunk_bytes = 1024; 80741529d79SRoman Li 80841529d79SRoman Li rq_sizing_param->meta_chunk_bytes = 2048; 80941529d79SRoman Li rq_sizing_param->min_meta_chunk_bytes = 256; 81041529d79SRoman Li 81141529d79SRoman Li if (pipe_param->src.hostvm) 81241529d79SRoman Li rq_sizing_param->mpte_group_bytes = 512; 81341529d79SRoman Li else 81441529d79SRoman Li rq_sizing_param->mpte_group_bytes = 2048; 81541529d79SRoman Li 81641529d79SRoman Li get_meta_and_pte_attr( 81741529d79SRoman Li mode_lib, 81841529d79SRoman Li rq_dlg_param, 81941529d79SRoman Li rq_misc_param, 82041529d79SRoman Li rq_sizing_param, 82141529d79SRoman Li vp_width, 82241529d79SRoman Li vp_height, 82341529d79SRoman Li data_pitch, 82441529d79SRoman Li meta_pitch, 82541529d79SRoman Li pipe_param->src.source_format, 82641529d79SRoman Li pipe_param->src.sw_mode, 82741529d79SRoman Li pipe_param->src.macro_tile_size, 82841529d79SRoman Li pipe_param->src.source_scan, 82941529d79SRoman Li pipe_param->src.hostvm, 83041529d79SRoman Li is_chroma, 83141529d79SRoman Li surface_height); 83241529d79SRoman Li } 83341529d79SRoman Li 83441529d79SRoman Li static void dml_rq_dlg_get_rq_params(struct display_mode_lib *mode_lib, display_rq_params_st *rq_param, const display_pipe_params_st *pipe_param) 83541529d79SRoman Li { 83641529d79SRoman Li // get param for luma surface 83741529d79SRoman Li rq_param->yuv420 = pipe_param->src.source_format == dm_420_8 || pipe_param->src.source_format == dm_420_10 || pipe_param->src.source_format == dm_rgbe_alpha 83841529d79SRoman Li || pipe_param->src.source_format == dm_420_12; 83941529d79SRoman Li 84041529d79SRoman Li rq_param->yuv420_10bpc = pipe_param->src.source_format == dm_420_10; 84141529d79SRoman Li 84241529d79SRoman Li rq_param->rgbe_alpha = (pipe_param->src.source_format == dm_rgbe_alpha) ? 1 : 0; 84341529d79SRoman Li 84441529d79SRoman Li get_surf_rq_param(mode_lib, &(rq_param->sizing.rq_l), &(rq_param->dlg.rq_l), &(rq_param->misc.rq_l), pipe_param, 0, 0); 84541529d79SRoman Li 84641529d79SRoman Li if (is_dual_plane((enum source_format_class) (pipe_param->src.source_format))) { 84741529d79SRoman Li // get param for chroma surface 84841529d79SRoman Li get_surf_rq_param(mode_lib, &(rq_param->sizing.rq_c), &(rq_param->dlg.rq_c), &(rq_param->misc.rq_c), pipe_param, 1, rq_param->rgbe_alpha); 84941529d79SRoman Li } 85041529d79SRoman Li 85141529d79SRoman Li // calculate how to split the det buffer space between luma and chroma 85241529d79SRoman Li handle_det_buf_split(mode_lib, rq_param, &pipe_param->src); 85341529d79SRoman Li print__rq_params_st(mode_lib, rq_param); 85441529d79SRoman Li } 85541529d79SRoman Li 85641529d79SRoman Li void dml314_rq_dlg_get_rq_reg(struct display_mode_lib *mode_lib, display_rq_regs_st *rq_regs, const display_pipe_params_st *pipe_param) 85741529d79SRoman Li { 85841529d79SRoman Li display_rq_params_st rq_param = {0}; 85941529d79SRoman Li 86041529d79SRoman Li memset(rq_regs, 0, sizeof(*rq_regs)); 86141529d79SRoman Li dml_rq_dlg_get_rq_params(mode_lib, &rq_param, pipe_param); 86241529d79SRoman Li extract_rq_regs(mode_lib, rq_regs, &rq_param); 86341529d79SRoman Li 86441529d79SRoman Li print__rq_regs_st(mode_lib, rq_regs); 86541529d79SRoman Li } 86641529d79SRoman Li 86741529d79SRoman Li static void calculate_ttu_cursor( 86841529d79SRoman Li struct display_mode_lib *mode_lib, 86941529d79SRoman Li double *refcyc_per_req_delivery_pre_cur, 87041529d79SRoman Li double *refcyc_per_req_delivery_cur, 87141529d79SRoman Li double refclk_freq_in_mhz, 87241529d79SRoman Li double ref_freq_to_pix_freq, 87341529d79SRoman Li double hscale_pixel_rate_l, 87441529d79SRoman Li double hscl_ratio, 87541529d79SRoman Li double vratio_pre_l, 87641529d79SRoman Li double vratio_l, 87741529d79SRoman Li unsigned int cur_width, 87841529d79SRoman Li enum cursor_bpp cur_bpp) 87941529d79SRoman Li { 88041529d79SRoman Li unsigned int cur_src_width = cur_width; 88141529d79SRoman Li unsigned int cur_req_size = 0; 88241529d79SRoman Li unsigned int cur_req_width = 0; 88341529d79SRoman Li double cur_width_ub = 0.0; 88441529d79SRoman Li double cur_req_per_width = 0.0; 88541529d79SRoman Li double hactive_cur = 0.0; 88641529d79SRoman Li 88741529d79SRoman Li ASSERT(cur_src_width <= 256); 88841529d79SRoman Li 88941529d79SRoman Li *refcyc_per_req_delivery_pre_cur = 0.0; 89041529d79SRoman Li *refcyc_per_req_delivery_cur = 0.0; 89141529d79SRoman Li if (cur_src_width > 0) { 89241529d79SRoman Li unsigned int cur_bit_per_pixel = 0; 89341529d79SRoman Li 89441529d79SRoman Li if (cur_bpp == dm_cur_2bit) { 89541529d79SRoman Li cur_req_size = 64; // byte 89641529d79SRoman Li cur_bit_per_pixel = 2; 89741529d79SRoman Li } else { // 32bit 89841529d79SRoman Li cur_bit_per_pixel = 32; 89941529d79SRoman Li if (cur_src_width >= 1 && cur_src_width <= 16) 90041529d79SRoman Li cur_req_size = 64; 90141529d79SRoman Li else if (cur_src_width >= 17 && cur_src_width <= 31) 90241529d79SRoman Li cur_req_size = 128; 90341529d79SRoman Li else 90441529d79SRoman Li cur_req_size = 256; 90541529d79SRoman Li } 90641529d79SRoman Li 90741529d79SRoman Li cur_req_width = (double) cur_req_size / ((double) cur_bit_per_pixel / 8.0); 90841529d79SRoman Li cur_width_ub = dml_ceil((double) cur_src_width / (double) cur_req_width, 1) * (double) cur_req_width; 90941529d79SRoman Li cur_req_per_width = cur_width_ub / (double) cur_req_width; 91041529d79SRoman Li hactive_cur = (double) cur_src_width / hscl_ratio; // FIXME: oswin to think about what to do for cursor 91141529d79SRoman Li 91241529d79SRoman Li if (vratio_pre_l <= 1.0) 91341529d79SRoman Li *refcyc_per_req_delivery_pre_cur = hactive_cur * ref_freq_to_pix_freq / (double) cur_req_per_width; 91441529d79SRoman Li else 91541529d79SRoman Li *refcyc_per_req_delivery_pre_cur = (double) refclk_freq_in_mhz * (double) cur_src_width / hscale_pixel_rate_l / (double) cur_req_per_width; 91641529d79SRoman Li 91741529d79SRoman Li ASSERT(*refcyc_per_req_delivery_pre_cur < dml_pow(2, 13)); 91841529d79SRoman Li 91941529d79SRoman Li if (vratio_l <= 1.0) 92041529d79SRoman Li *refcyc_per_req_delivery_cur = hactive_cur * ref_freq_to_pix_freq / (double) cur_req_per_width; 92141529d79SRoman Li else 92241529d79SRoman Li *refcyc_per_req_delivery_cur = (double) refclk_freq_in_mhz * (double) cur_src_width / hscale_pixel_rate_l / (double) cur_req_per_width; 92341529d79SRoman Li 92441529d79SRoman Li dml_print("DML_DLG: %s: cur_req_width = %d\n", __func__, cur_req_width); 92541529d79SRoman Li dml_print("DML_DLG: %s: cur_width_ub = %3.2f\n", __func__, cur_width_ub); 92641529d79SRoman Li dml_print("DML_DLG: %s: cur_req_per_width = %3.2f\n", __func__, cur_req_per_width); 92741529d79SRoman Li dml_print("DML_DLG: %s: hactive_cur = %3.2f\n", __func__, hactive_cur); 92841529d79SRoman Li dml_print("DML_DLG: %s: refcyc_per_req_delivery_pre_cur = %3.2f\n", __func__, *refcyc_per_req_delivery_pre_cur); 92941529d79SRoman Li dml_print("DML_DLG: %s: refcyc_per_req_delivery_cur = %3.2f\n", __func__, *refcyc_per_req_delivery_cur); 93041529d79SRoman Li 93141529d79SRoman Li ASSERT(*refcyc_per_req_delivery_cur < dml_pow(2, 13)); 93241529d79SRoman Li } 93341529d79SRoman Li } 93441529d79SRoman Li 93541529d79SRoman Li // Note: currently taken in as is. 93641529d79SRoman Li // Nice to decouple code from hw register implement and extract code that are repeated for luma and chroma. 93741529d79SRoman Li static void dml_rq_dlg_get_dlg_params( 93841529d79SRoman Li struct display_mode_lib *mode_lib, 93941529d79SRoman Li const display_e2e_pipe_params_st *e2e_pipe_param, 94041529d79SRoman Li const unsigned int num_pipes, 94141529d79SRoman Li const unsigned int pipe_idx, 94241529d79SRoman Li display_dlg_regs_st *disp_dlg_regs, 94341529d79SRoman Li display_ttu_regs_st *disp_ttu_regs, 94441529d79SRoman Li const display_rq_dlg_params_st *rq_dlg_param, 94541529d79SRoman Li const display_dlg_sys_params_st *dlg_sys_param, 94641529d79SRoman Li const bool cstate_en, 94741529d79SRoman Li const bool pstate_en, 94841529d79SRoman Li const bool vm_en, 94941529d79SRoman Li const bool ignore_viewport_pos, 95041529d79SRoman Li const bool immediate_flip_support) 95141529d79SRoman Li { 95241529d79SRoman Li const display_pipe_source_params_st *src = &e2e_pipe_param[pipe_idx].pipe.src; 95341529d79SRoman Li const display_pipe_dest_params_st *dst = &e2e_pipe_param[pipe_idx].pipe.dest; 95441529d79SRoman Li const display_output_params_st *dout = &e2e_pipe_param[pipe_idx].dout; 95541529d79SRoman Li const display_clocks_and_cfg_st *clks = &e2e_pipe_param[pipe_idx].clks_cfg; 95641529d79SRoman Li const scaler_ratio_depth_st *scl = &e2e_pipe_param[pipe_idx].pipe.scale_ratio_depth; 95741529d79SRoman Li const scaler_taps_st *taps = &e2e_pipe_param[pipe_idx].pipe.scale_taps; 95841529d79SRoman Li unsigned int pipe_index_in_combine[DC__NUM_PIPES__MAX]; 95941529d79SRoman Li 96041529d79SRoman Li // ------------------------- 96141529d79SRoman Li // Section 1.15.2.1: OTG dependent Params 96241529d79SRoman Li // ------------------------- 96341529d79SRoman Li // Timing 96441529d79SRoman Li unsigned int htotal = dst->htotal; 96541529d79SRoman Li unsigned int hblank_end = dst->hblank_end; 96641529d79SRoman Li unsigned int vblank_start = dst->vblank_start; 96741529d79SRoman Li unsigned int vblank_end = dst->vblank_end; 96841529d79SRoman Li 96941529d79SRoman Li double dppclk_freq_in_mhz = clks->dppclk_mhz; 97041529d79SRoman Li double refclk_freq_in_mhz = clks->refclk_mhz; 97141529d79SRoman Li double pclk_freq_in_mhz = dst->pixel_rate_mhz; 97241529d79SRoman Li bool interlaced = dst->interlaced; 97341529d79SRoman Li double ref_freq_to_pix_freq = refclk_freq_in_mhz / pclk_freq_in_mhz; 97441529d79SRoman Li double min_ttu_vblank; 97541529d79SRoman Li unsigned int dlg_vblank_start; 97641529d79SRoman Li bool dual_plane; 97741529d79SRoman Li bool mode_422; 97841529d79SRoman Li unsigned int access_dir; 97941529d79SRoman Li unsigned int vp_height_l; 98041529d79SRoman Li unsigned int vp_width_l; 98141529d79SRoman Li unsigned int vp_height_c; 98241529d79SRoman Li unsigned int vp_width_c; 98341529d79SRoman Li 98441529d79SRoman Li // Scaling 98541529d79SRoman Li unsigned int htaps_l; 98641529d79SRoman Li unsigned int htaps_c; 98741529d79SRoman Li double hratio_l; 98841529d79SRoman Li double hratio_c; 98941529d79SRoman Li double vratio_l; 99041529d79SRoman Li double vratio_c; 99141529d79SRoman Li bool scl_enable; 99241529d79SRoman Li 99341529d79SRoman Li unsigned int swath_width_ub_l; 99441529d79SRoman Li unsigned int dpte_groups_per_row_ub_l; 99541529d79SRoman Li unsigned int swath_width_ub_c; 99641529d79SRoman Li unsigned int dpte_groups_per_row_ub_c; 99741529d79SRoman Li 99841529d79SRoman Li unsigned int meta_chunks_per_row_ub_l; 99941529d79SRoman Li unsigned int meta_chunks_per_row_ub_c; 100041529d79SRoman Li unsigned int vupdate_offset; 100141529d79SRoman Li unsigned int vupdate_width; 100241529d79SRoman Li unsigned int vready_offset; 100341529d79SRoman Li 100441529d79SRoman Li unsigned int dppclk_delay_subtotal; 100541529d79SRoman Li unsigned int dispclk_delay_subtotal; 100641529d79SRoman Li 100741529d79SRoman Li unsigned int vstartup_start; 100841529d79SRoman Li unsigned int dst_x_after_scaler; 100941529d79SRoman Li unsigned int dst_y_after_scaler; 101041529d79SRoman Li double dst_y_prefetch; 101141529d79SRoman Li double dst_y_per_vm_vblank; 101241529d79SRoman Li double dst_y_per_row_vblank; 101341529d79SRoman Li double dst_y_per_vm_flip; 101441529d79SRoman Li double dst_y_per_row_flip; 101541529d79SRoman Li double max_dst_y_per_vm_vblank; 101641529d79SRoman Li double max_dst_y_per_row_vblank; 101741529d79SRoman Li double vratio_pre_l; 101841529d79SRoman Li double vratio_pre_c; 101941529d79SRoman Li unsigned int req_per_swath_ub_l; 102041529d79SRoman Li unsigned int req_per_swath_ub_c; 102141529d79SRoman Li unsigned int meta_row_height_l; 102241529d79SRoman Li unsigned int meta_row_height_c; 102341529d79SRoman Li unsigned int swath_width_pixels_ub_l; 102441529d79SRoman Li unsigned int swath_width_pixels_ub_c; 102541529d79SRoman Li unsigned int scaler_rec_in_width_l; 102641529d79SRoman Li unsigned int scaler_rec_in_width_c; 102741529d79SRoman Li unsigned int dpte_row_height_l; 102841529d79SRoman Li unsigned int dpte_row_height_c; 102941529d79SRoman Li double hscale_pixel_rate_l; 103041529d79SRoman Li double hscale_pixel_rate_c; 103141529d79SRoman Li double min_hratio_fact_l; 103241529d79SRoman Li double min_hratio_fact_c; 103341529d79SRoman Li double refcyc_per_line_delivery_pre_l; 103441529d79SRoman Li double refcyc_per_line_delivery_pre_c; 103541529d79SRoman Li double refcyc_per_line_delivery_l; 103641529d79SRoman Li double refcyc_per_line_delivery_c; 103741529d79SRoman Li 103841529d79SRoman Li double refcyc_per_req_delivery_pre_l; 103941529d79SRoman Li double refcyc_per_req_delivery_pre_c; 104041529d79SRoman Li double refcyc_per_req_delivery_l; 104141529d79SRoman Li double refcyc_per_req_delivery_c; 104241529d79SRoman Li 104341529d79SRoman Li unsigned int full_recout_width; 104441529d79SRoman Li double refcyc_per_req_delivery_pre_cur0; 104541529d79SRoman Li double refcyc_per_req_delivery_cur0; 104641529d79SRoman Li double refcyc_per_req_delivery_pre_cur1; 104741529d79SRoman Li double refcyc_per_req_delivery_cur1; 104841529d79SRoman Li unsigned int vba__min_dst_y_next_start = get_min_dst_y_next_start(mode_lib, e2e_pipe_param, num_pipes, pipe_idx); // FROM VBA 104941529d79SRoman Li unsigned int vba__vready_after_vcount0 = get_vready_at_or_after_vsync(mode_lib, e2e_pipe_param, num_pipes, pipe_idx); // From VBA 105041529d79SRoman Li 105141529d79SRoman Li float vba__refcyc_per_line_delivery_pre_l = get_refcyc_per_line_delivery_pre_l_in_us(mode_lib, e2e_pipe_param, num_pipes, pipe_idx) * refclk_freq_in_mhz; // From VBA 105241529d79SRoman Li float vba__refcyc_per_line_delivery_l = get_refcyc_per_line_delivery_l_in_us(mode_lib, e2e_pipe_param, num_pipes, pipe_idx) * refclk_freq_in_mhz; // From VBA 105341529d79SRoman Li 105441529d79SRoman Li float vba__refcyc_per_req_delivery_pre_l = get_refcyc_per_req_delivery_pre_l_in_us(mode_lib, e2e_pipe_param, num_pipes, pipe_idx) * refclk_freq_in_mhz; // From VBA 105541529d79SRoman Li float vba__refcyc_per_req_delivery_l = get_refcyc_per_req_delivery_l_in_us(mode_lib, e2e_pipe_param, num_pipes, pipe_idx) * refclk_freq_in_mhz; // From VBA 105641529d79SRoman Li int blank_lines = 0; 105741529d79SRoman Li 105841529d79SRoman Li memset(disp_dlg_regs, 0, sizeof(*disp_dlg_regs)); 105941529d79SRoman Li memset(disp_ttu_regs, 0, sizeof(*disp_ttu_regs)); 106041529d79SRoman Li 106141529d79SRoman Li dml_print("DML_DLG: %s: cstate_en = %d\n", __func__, cstate_en); 106241529d79SRoman Li dml_print("DML_DLG: %s: pstate_en = %d\n", __func__, pstate_en); 106341529d79SRoman Li dml_print("DML_DLG: %s: vm_en = %d\n", __func__, vm_en); 106441529d79SRoman Li dml_print("DML_DLG: %s: ignore_viewport_pos = %d\n", __func__, ignore_viewport_pos); 106541529d79SRoman Li dml_print("DML_DLG: %s: immediate_flip_support = %d\n", __func__, immediate_flip_support); 106641529d79SRoman Li 106741529d79SRoman Li dml_print("DML_DLG: %s: dppclk_freq_in_mhz = %3.2f\n", __func__, dppclk_freq_in_mhz); 106841529d79SRoman Li dml_print("DML_DLG: %s: refclk_freq_in_mhz = %3.2f\n", __func__, refclk_freq_in_mhz); 106941529d79SRoman Li dml_print("DML_DLG: %s: pclk_freq_in_mhz = %3.2f\n", __func__, pclk_freq_in_mhz); 107041529d79SRoman Li dml_print("DML_DLG: %s: interlaced = %d\n", __func__, interlaced); ASSERT(ref_freq_to_pix_freq < 4.0); 107141529d79SRoman Li 107241529d79SRoman Li disp_dlg_regs->ref_freq_to_pix_freq = (unsigned int) (ref_freq_to_pix_freq * dml_pow(2, 19)); 107341529d79SRoman Li disp_dlg_regs->refcyc_per_htotal = (unsigned int) (ref_freq_to_pix_freq * (double) htotal * dml_pow(2, 8)); 107441529d79SRoman Li disp_dlg_regs->dlg_vblank_end = interlaced ? (vblank_end / 2) : vblank_end; // 15 bits 107541529d79SRoman Li 107641529d79SRoman Li //set_prefetch_mode(mode_lib, cstate_en, pstate_en, ignore_viewport_pos, immediate_flip_support); 107741529d79SRoman Li min_ttu_vblank = get_min_ttu_vblank_in_us(mode_lib, e2e_pipe_param, num_pipes, pipe_idx); // From VBA 107841529d79SRoman Li 107941529d79SRoman Li dlg_vblank_start = interlaced ? (vblank_start / 2) : vblank_start; 108041529d79SRoman Li disp_dlg_regs->optimized_min_dst_y_next_start = disp_dlg_regs->min_dst_y_next_start; 108141529d79SRoman Li disp_dlg_regs->optimized_min_dst_y_next_start_us = 0; 108241529d79SRoman Li disp_dlg_regs->min_dst_y_next_start = (unsigned int) (((double) dlg_vblank_start) * dml_pow(2, 2)); 108341529d79SRoman Li blank_lines = (dst->vblank_end + dst->vtotal_min - dst->vblank_start - dst->vstartup_start - 1); 108441529d79SRoman Li if (blank_lines < 0) 108541529d79SRoman Li blank_lines = 0; 108641529d79SRoman Li if (blank_lines != 0) { 108741529d79SRoman Li disp_dlg_regs->optimized_min_dst_y_next_start = vba__min_dst_y_next_start; 108841529d79SRoman Li disp_dlg_regs->optimized_min_dst_y_next_start_us = (disp_dlg_regs->optimized_min_dst_y_next_start * dst->hactive) / (unsigned int) dst->pixel_rate_mhz; 108941529d79SRoman Li disp_dlg_regs->min_dst_y_next_start = disp_dlg_regs->optimized_min_dst_y_next_start; 109041529d79SRoman Li } 109141529d79SRoman Li ASSERT(disp_dlg_regs->min_dst_y_next_start < (unsigned int)dml_pow(2, 18)); 109241529d79SRoman Li 109341529d79SRoman Li dml_print("DML_DLG: %s: min_ttu_vblank (us) = %3.2f\n", __func__, min_ttu_vblank); 109441529d79SRoman Li dml_print("DML_DLG: %s: min_dst_y_next_start = 0x%0x\n", __func__, disp_dlg_regs->min_dst_y_next_start); 109541529d79SRoman Li dml_print("DML_DLG: %s: dlg_vblank_start = 0x%0x\n", __func__, dlg_vblank_start); 109641529d79SRoman Li dml_print("DML_DLG: %s: ref_freq_to_pix_freq = %3.2f\n", __func__, ref_freq_to_pix_freq); 109741529d79SRoman Li dml_print("DML_DLG: %s: vba__min_dst_y_next_start = 0x%0x\n", __func__, vba__min_dst_y_next_start); 109841529d79SRoman Li 109941529d79SRoman Li //old_impl_vs_vba_impl("min_dst_y_next_start", dlg_vblank_start, vba__min_dst_y_next_start); 110041529d79SRoman Li 110141529d79SRoman Li // ------------------------- 110241529d79SRoman Li // Section 1.15.2.2: Prefetch, Active and TTU 110341529d79SRoman Li // ------------------------- 110441529d79SRoman Li // Prefetch Calc 110541529d79SRoman Li // Source 110641529d79SRoman Li dual_plane = is_dual_plane((enum source_format_class) (src->source_format)); 110741529d79SRoman Li mode_422 = 0; 110841529d79SRoman Li access_dir = (src->source_scan == dm_vert); // vp access direction: horizontal or vertical accessed 110941529d79SRoman Li vp_height_l = src->viewport_height; 111041529d79SRoman Li vp_width_l = src->viewport_width; 111141529d79SRoman Li vp_height_c = src->viewport_height_c; 111241529d79SRoman Li vp_width_c = src->viewport_width_c; 111341529d79SRoman Li 111441529d79SRoman Li // Scaling 111541529d79SRoman Li htaps_l = taps->htaps; 111641529d79SRoman Li htaps_c = taps->htaps_c; 111741529d79SRoman Li hratio_l = scl->hscl_ratio; 111841529d79SRoman Li hratio_c = scl->hscl_ratio_c; 111941529d79SRoman Li vratio_l = scl->vscl_ratio; 112041529d79SRoman Li vratio_c = scl->vscl_ratio_c; 112141529d79SRoman Li scl_enable = scl->scl_enable; 112241529d79SRoman Li 112341529d79SRoman Li swath_width_ub_l = rq_dlg_param->rq_l.swath_width_ub; 112441529d79SRoman Li dpte_groups_per_row_ub_l = rq_dlg_param->rq_l.dpte_groups_per_row_ub; 112541529d79SRoman Li swath_width_ub_c = rq_dlg_param->rq_c.swath_width_ub; 112641529d79SRoman Li dpte_groups_per_row_ub_c = rq_dlg_param->rq_c.dpte_groups_per_row_ub; 112741529d79SRoman Li 112841529d79SRoman Li meta_chunks_per_row_ub_l = rq_dlg_param->rq_l.meta_chunks_per_row_ub; 112941529d79SRoman Li meta_chunks_per_row_ub_c = rq_dlg_param->rq_c.meta_chunks_per_row_ub; 113041529d79SRoman Li vupdate_offset = dst->vupdate_offset; 113141529d79SRoman Li vupdate_width = dst->vupdate_width; 113241529d79SRoman Li vready_offset = dst->vready_offset; 113341529d79SRoman Li 113441529d79SRoman Li dppclk_delay_subtotal = mode_lib->ip.dppclk_delay_subtotal; 113541529d79SRoman Li dispclk_delay_subtotal = mode_lib->ip.dispclk_delay_subtotal; 113641529d79SRoman Li 113741529d79SRoman Li if (scl_enable) 113841529d79SRoman Li dppclk_delay_subtotal += mode_lib->ip.dppclk_delay_scl; 113941529d79SRoman Li else 114041529d79SRoman Li dppclk_delay_subtotal += mode_lib->ip.dppclk_delay_scl_lb_only; 114141529d79SRoman Li 114241529d79SRoman Li dppclk_delay_subtotal += mode_lib->ip.dppclk_delay_cnvc_formatter + src->num_cursors * mode_lib->ip.dppclk_delay_cnvc_cursor; 114341529d79SRoman Li 114441529d79SRoman Li if (dout->dsc_enable) { 114541529d79SRoman Li double dsc_delay = get_dsc_delay(mode_lib, e2e_pipe_param, num_pipes, pipe_idx); // FROM VBA 114641529d79SRoman Li 114741529d79SRoman Li dispclk_delay_subtotal += dsc_delay; 114841529d79SRoman Li } 114941529d79SRoman Li 115041529d79SRoman Li vstartup_start = dst->vstartup_start; 115141529d79SRoman Li if (interlaced) { 115241529d79SRoman Li if (vstartup_start / 2.0 - (double) (vready_offset + vupdate_width + vupdate_offset) / htotal <= vblank_end / 2.0) 115341529d79SRoman Li disp_dlg_regs->vready_after_vcount0 = 1; 115441529d79SRoman Li else 115541529d79SRoman Li disp_dlg_regs->vready_after_vcount0 = 0; 115641529d79SRoman Li } else { 115741529d79SRoman Li if (vstartup_start - (double) (vready_offset + vupdate_width + vupdate_offset) / htotal <= vblank_end) 115841529d79SRoman Li disp_dlg_regs->vready_after_vcount0 = 1; 115941529d79SRoman Li else 116041529d79SRoman Li disp_dlg_regs->vready_after_vcount0 = 0; 116141529d79SRoman Li } 116241529d79SRoman Li 116341529d79SRoman Li dml_print("DML_DLG: %s: vready_after_vcount0 = %d\n", __func__, disp_dlg_regs->vready_after_vcount0); 116441529d79SRoman Li dml_print("DML_DLG: %s: vba__vready_after_vcount0 = %d\n", __func__, vba__vready_after_vcount0); 116541529d79SRoman Li //old_impl_vs_vba_impl("vready_after_vcount0", disp_dlg_regs->vready_after_vcount0, vba__vready_after_vcount0); 116641529d79SRoman Li 116741529d79SRoman Li if (interlaced) 116841529d79SRoman Li vstartup_start = vstartup_start / 2; 116941529d79SRoman Li 117041529d79SRoman Li dst_x_after_scaler = get_dst_x_after_scaler(mode_lib, e2e_pipe_param, num_pipes, pipe_idx); // From VBA 117141529d79SRoman Li dst_y_after_scaler = get_dst_y_after_scaler(mode_lib, e2e_pipe_param, num_pipes, pipe_idx); // From VBA 117241529d79SRoman Li 117341529d79SRoman Li // do some adjustment on the dst_after scaler to account for odm combine mode 117441529d79SRoman Li dml_print("DML_DLG: %s: input dst_x_after_scaler = %d\n", __func__, dst_x_after_scaler); 117541529d79SRoman Li dml_print("DML_DLG: %s: input dst_y_after_scaler = %d\n", __func__, dst_y_after_scaler); 117641529d79SRoman Li 117741529d79SRoman Li // need to figure out which side of odm combine we're in 117841529d79SRoman Li if (dst->odm_combine) { 117941529d79SRoman Li // figure out which pipes go together 118041529d79SRoman Li bool visited[DC__NUM_PIPES__MAX]; 118141529d79SRoman Li unsigned int i, j, k; 118241529d79SRoman Li 118341529d79SRoman Li for (k = 0; k < num_pipes; ++k) { 118441529d79SRoman Li visited[k] = false; 118541529d79SRoman Li pipe_index_in_combine[k] = 0; 118641529d79SRoman Li } 118741529d79SRoman Li 118841529d79SRoman Li for (i = 0; i < num_pipes; i++) { 118941529d79SRoman Li if (e2e_pipe_param[i].pipe.src.is_hsplit && !visited[i]) { 119041529d79SRoman Li 119141529d79SRoman Li unsigned int grp = e2e_pipe_param[i].pipe.src.hsplit_grp; 119241529d79SRoman Li unsigned int grp_idx = 0; 119341529d79SRoman Li 119441529d79SRoman Li for (j = i; j < num_pipes; j++) { 119541529d79SRoman Li if (e2e_pipe_param[j].pipe.src.hsplit_grp == grp && e2e_pipe_param[j].pipe.src.is_hsplit && !visited[j]) { 119641529d79SRoman Li pipe_index_in_combine[j] = grp_idx; 119741529d79SRoman Li dml_print("DML_DLG: %s: pipe[%d] is in grp %d idx %d\n", __func__, j, grp, grp_idx); 119841529d79SRoman Li grp_idx++; 119941529d79SRoman Li visited[j] = true; 120041529d79SRoman Li } 120141529d79SRoman Li } 120241529d79SRoman Li } 120341529d79SRoman Li } 120441529d79SRoman Li 120541529d79SRoman Li } 120641529d79SRoman Li 120741529d79SRoman Li if (dst->odm_combine == dm_odm_combine_mode_disabled) { 120841529d79SRoman Li disp_dlg_regs->refcyc_h_blank_end = (unsigned int) ((double) hblank_end * ref_freq_to_pix_freq); 120941529d79SRoman Li } else { 121041529d79SRoman Li unsigned int odm_combine_factor = (dst->odm_combine == dm_odm_combine_mode_2to1 ? 2 : 4); // TODO: We should really check that 4to1 is supported before setting it to 4 121141529d79SRoman Li unsigned int odm_pipe_index = pipe_index_in_combine[pipe_idx]; 121241529d79SRoman Li 121341529d79SRoman Li disp_dlg_regs->refcyc_h_blank_end = (unsigned int) (((double) hblank_end + odm_pipe_index * (double) dst->hactive / odm_combine_factor) * ref_freq_to_pix_freq); 121441529d79SRoman Li } ASSERT(disp_dlg_regs->refcyc_h_blank_end < (unsigned int)dml_pow(2, 13)); 121541529d79SRoman Li 121641529d79SRoman Li dml_print("DML_DLG: %s: htotal = %d\n", __func__, htotal); 121741529d79SRoman Li dml_print("DML_DLG: %s: dst_x_after_scaler[%d] = %d\n", __func__, pipe_idx, dst_x_after_scaler); 121841529d79SRoman Li dml_print("DML_DLG: %s: dst_y_after_scaler[%d] = %d\n", __func__, pipe_idx, dst_y_after_scaler); 121941529d79SRoman Li 122041529d79SRoman Li dst_y_prefetch = get_dst_y_prefetch(mode_lib, e2e_pipe_param, num_pipes, pipe_idx); // From VBA 122141529d79SRoman Li dst_y_per_vm_vblank = get_dst_y_per_vm_vblank(mode_lib, e2e_pipe_param, num_pipes, pipe_idx); // From VBA 122241529d79SRoman Li dst_y_per_row_vblank = get_dst_y_per_row_vblank(mode_lib, e2e_pipe_param, num_pipes, pipe_idx); // From VBA 122341529d79SRoman Li dst_y_per_vm_flip = get_dst_y_per_vm_flip(mode_lib, e2e_pipe_param, num_pipes, pipe_idx); // From VBA 122441529d79SRoman Li dst_y_per_row_flip = get_dst_y_per_row_flip(mode_lib, e2e_pipe_param, num_pipes, pipe_idx); // From VBA 122541529d79SRoman Li 122641529d79SRoman Li max_dst_y_per_vm_vblank = 32.0; //U5.2 122741529d79SRoman Li max_dst_y_per_row_vblank = 16.0; //U4.2 122841529d79SRoman Li 122941529d79SRoman Li // magic! 123041529d79SRoman Li if (htotal <= 75) { 123141529d79SRoman Li max_dst_y_per_vm_vblank = 100.0; 123241529d79SRoman Li max_dst_y_per_row_vblank = 100.0; 123341529d79SRoman Li } 123441529d79SRoman Li 123541529d79SRoman Li dml_print("DML_DLG: %s: dst_y_prefetch (after rnd) = %3.2f\n", __func__, dst_y_prefetch); 123641529d79SRoman Li dml_print("DML_DLG: %s: dst_y_per_vm_flip = %3.2f\n", __func__, dst_y_per_vm_flip); 123741529d79SRoman Li dml_print("DML_DLG: %s: dst_y_per_row_flip = %3.2f\n", __func__, dst_y_per_row_flip); 123841529d79SRoman Li dml_print("DML_DLG: %s: dst_y_per_vm_vblank = %3.2f\n", __func__, dst_y_per_vm_vblank); 123941529d79SRoman Li dml_print("DML_DLG: %s: dst_y_per_row_vblank = %3.2f\n", __func__, dst_y_per_row_vblank); 124041529d79SRoman Li 124141529d79SRoman Li ASSERT(dst_y_per_vm_vblank < max_dst_y_per_vm_vblank); ASSERT(dst_y_per_row_vblank < max_dst_y_per_row_vblank); 124241529d79SRoman Li 124341529d79SRoman Li ASSERT(dst_y_prefetch > (dst_y_per_vm_vblank + dst_y_per_row_vblank)); 124441529d79SRoman Li 124541529d79SRoman Li vratio_pre_l = get_vratio_prefetch_l(mode_lib, e2e_pipe_param, num_pipes, pipe_idx); // From VBA 124641529d79SRoman Li vratio_pre_c = get_vratio_prefetch_c(mode_lib, e2e_pipe_param, num_pipes, pipe_idx); // From VBA 124741529d79SRoman Li 124841529d79SRoman Li dml_print("DML_DLG: %s: vratio_pre_l = %3.2f\n", __func__, vratio_pre_l); 124941529d79SRoman Li dml_print("DML_DLG: %s: vratio_pre_c = %3.2f\n", __func__, vratio_pre_c); 125041529d79SRoman Li 125141529d79SRoman Li // Active 125241529d79SRoman Li req_per_swath_ub_l = rq_dlg_param->rq_l.req_per_swath_ub; 125341529d79SRoman Li req_per_swath_ub_c = rq_dlg_param->rq_c.req_per_swath_ub; 125441529d79SRoman Li meta_row_height_l = rq_dlg_param->rq_l.meta_row_height; 125541529d79SRoman Li meta_row_height_c = rq_dlg_param->rq_c.meta_row_height; 125641529d79SRoman Li swath_width_pixels_ub_l = 0; 125741529d79SRoman Li swath_width_pixels_ub_c = 0; 125841529d79SRoman Li scaler_rec_in_width_l = 0; 125941529d79SRoman Li scaler_rec_in_width_c = 0; 126041529d79SRoman Li dpte_row_height_l = rq_dlg_param->rq_l.dpte_row_height; 126141529d79SRoman Li dpte_row_height_c = rq_dlg_param->rq_c.dpte_row_height; 126241529d79SRoman Li 126341529d79SRoman Li if (mode_422) { 126441529d79SRoman Li swath_width_pixels_ub_l = swath_width_ub_l * 2; // *2 for 2 pixel per element 126541529d79SRoman Li swath_width_pixels_ub_c = swath_width_ub_c * 2; 126641529d79SRoman Li } else { 126741529d79SRoman Li swath_width_pixels_ub_l = swath_width_ub_l * 1; 126841529d79SRoman Li swath_width_pixels_ub_c = swath_width_ub_c * 1; 126941529d79SRoman Li } 127041529d79SRoman Li 127141529d79SRoman Li hscale_pixel_rate_l = 0.; 127241529d79SRoman Li hscale_pixel_rate_c = 0.; 127341529d79SRoman Li min_hratio_fact_l = 1.0; 127441529d79SRoman Li min_hratio_fact_c = 1.0; 127541529d79SRoman Li 127641529d79SRoman Li if (hratio_l <= 1) 127741529d79SRoman Li min_hratio_fact_l = 2.0; 127841529d79SRoman Li else if (htaps_l <= 6) { 127941529d79SRoman Li if ((hratio_l * 2.0) > 4.0) 128041529d79SRoman Li min_hratio_fact_l = 4.0; 128141529d79SRoman Li else 128241529d79SRoman Li min_hratio_fact_l = hratio_l * 2.0; 128341529d79SRoman Li } else { 128441529d79SRoman Li if (hratio_l > 4.0) 128541529d79SRoman Li min_hratio_fact_l = 4.0; 128641529d79SRoman Li else 128741529d79SRoman Li min_hratio_fact_l = hratio_l; 128841529d79SRoman Li } 128941529d79SRoman Li 129041529d79SRoman Li hscale_pixel_rate_l = min_hratio_fact_l * dppclk_freq_in_mhz; 129141529d79SRoman Li 129241529d79SRoman Li dml_print("DML_DLG: %s: hratio_l = %3.2f\n", __func__, hratio_l); 129341529d79SRoman Li dml_print("DML_DLG: %s: min_hratio_fact_l = %3.2f\n", __func__, min_hratio_fact_l); 129441529d79SRoman Li dml_print("DML_DLG: %s: hscale_pixel_rate_l = %3.2f\n", __func__, hscale_pixel_rate_l); 129541529d79SRoman Li 129641529d79SRoman Li if (hratio_c <= 1) 129741529d79SRoman Li min_hratio_fact_c = 2.0; 129841529d79SRoman Li else if (htaps_c <= 6) { 129941529d79SRoman Li if ((hratio_c * 2.0) > 4.0) 130041529d79SRoman Li min_hratio_fact_c = 4.0; 130141529d79SRoman Li else 130241529d79SRoman Li min_hratio_fact_c = hratio_c * 2.0; 130341529d79SRoman Li } else { 130441529d79SRoman Li if (hratio_c > 4.0) 130541529d79SRoman Li min_hratio_fact_c = 4.0; 130641529d79SRoman Li else 130741529d79SRoman Li min_hratio_fact_c = hratio_c; 130841529d79SRoman Li } 130941529d79SRoman Li 131041529d79SRoman Li hscale_pixel_rate_c = min_hratio_fact_c * dppclk_freq_in_mhz; 131141529d79SRoman Li 131241529d79SRoman Li refcyc_per_line_delivery_pre_l = 0.; 131341529d79SRoman Li refcyc_per_line_delivery_pre_c = 0.; 131441529d79SRoman Li refcyc_per_line_delivery_l = 0.; 131541529d79SRoman Li refcyc_per_line_delivery_c = 0.; 131641529d79SRoman Li 131741529d79SRoman Li refcyc_per_req_delivery_pre_l = 0.; 131841529d79SRoman Li refcyc_per_req_delivery_pre_c = 0.; 131941529d79SRoman Li refcyc_per_req_delivery_l = 0.; 132041529d79SRoman Li refcyc_per_req_delivery_c = 0.; 132141529d79SRoman Li 132241529d79SRoman Li full_recout_width = 0; 132341529d79SRoman Li // In ODM 132441529d79SRoman Li if (src->is_hsplit) { 132541529d79SRoman Li // This "hack" is only allowed (and valid) for MPC combine. In ODM 132641529d79SRoman Li // combine, you MUST specify the full_recout_width...according to Oswin 132741529d79SRoman Li if (dst->full_recout_width == 0 && !dst->odm_combine) { 132841529d79SRoman Li dml_print("DML_DLG: %s: Warning: full_recout_width not set in hsplit mode\n", __func__); 132941529d79SRoman Li full_recout_width = dst->recout_width * 2; // assume half split for dcn1 133041529d79SRoman Li } else 133141529d79SRoman Li full_recout_width = dst->full_recout_width; 133241529d79SRoman Li } else 133341529d79SRoman Li full_recout_width = dst->recout_width; 133441529d79SRoman Li 133541529d79SRoman Li // As of DCN2, mpc_combine and odm_combine are mutually exclusive 133641529d79SRoman Li refcyc_per_line_delivery_pre_l = get_refcyc_per_delivery( 133741529d79SRoman Li mode_lib, 133841529d79SRoman Li refclk_freq_in_mhz, 133941529d79SRoman Li pclk_freq_in_mhz, 134041529d79SRoman Li dst->odm_combine, 134141529d79SRoman Li full_recout_width, 134241529d79SRoman Li dst->hactive, 134341529d79SRoman Li vratio_pre_l, 134441529d79SRoman Li hscale_pixel_rate_l, 134541529d79SRoman Li swath_width_pixels_ub_l, 134641529d79SRoman Li 1); // per line 134741529d79SRoman Li 134841529d79SRoman Li refcyc_per_line_delivery_l = get_refcyc_per_delivery( 134941529d79SRoman Li mode_lib, 135041529d79SRoman Li refclk_freq_in_mhz, 135141529d79SRoman Li pclk_freq_in_mhz, 135241529d79SRoman Li dst->odm_combine, 135341529d79SRoman Li full_recout_width, 135441529d79SRoman Li dst->hactive, 135541529d79SRoman Li vratio_l, 135641529d79SRoman Li hscale_pixel_rate_l, 135741529d79SRoman Li swath_width_pixels_ub_l, 135841529d79SRoman Li 1); // per line 135941529d79SRoman Li 136041529d79SRoman Li dml_print("DML_DLG: %s: full_recout_width = %d\n", __func__, full_recout_width); 136141529d79SRoman Li dml_print("DML_DLG: %s: hscale_pixel_rate_l = %3.2f\n", __func__, hscale_pixel_rate_l); 136241529d79SRoman Li dml_print("DML_DLG: %s: refcyc_per_line_delivery_pre_l = %3.2f\n", __func__, refcyc_per_line_delivery_pre_l); 136341529d79SRoman Li dml_print("DML_DLG: %s: refcyc_per_line_delivery_l = %3.2f\n", __func__, refcyc_per_line_delivery_l); 136441529d79SRoman Li dml_print("DML_DLG: %s: vba__refcyc_per_line_delivery_pre_l = %3.2f\n", __func__, vba__refcyc_per_line_delivery_pre_l); 136541529d79SRoman Li dml_print("DML_DLG: %s: vba__refcyc_per_line_delivery_l = %3.2f\n", __func__, vba__refcyc_per_line_delivery_l); 136641529d79SRoman Li 136741529d79SRoman Li //old_impl_vs_vba_impl("refcyc_per_line_delivery_pre_l", refcyc_per_line_delivery_pre_l, vba__refcyc_per_line_delivery_pre_l); 136841529d79SRoman Li //old_impl_vs_vba_impl("refcyc_per_line_delivery_l", refcyc_per_line_delivery_l, vba__refcyc_per_line_delivery_l); 136941529d79SRoman Li 137041529d79SRoman Li if (dual_plane) { 137141529d79SRoman Li float vba__refcyc_per_line_delivery_pre_c = get_refcyc_per_line_delivery_pre_c_in_us(mode_lib, e2e_pipe_param, num_pipes, pipe_idx) * refclk_freq_in_mhz; // From VBA 137241529d79SRoman Li float vba__refcyc_per_line_delivery_c = get_refcyc_per_line_delivery_c_in_us(mode_lib, e2e_pipe_param, num_pipes, pipe_idx) * refclk_freq_in_mhz; // From VBA 137341529d79SRoman Li 137441529d79SRoman Li refcyc_per_line_delivery_pre_c = get_refcyc_per_delivery( 137541529d79SRoman Li mode_lib, 137641529d79SRoman Li refclk_freq_in_mhz, 137741529d79SRoman Li pclk_freq_in_mhz, 137841529d79SRoman Li dst->odm_combine, 137941529d79SRoman Li full_recout_width, 138041529d79SRoman Li dst->hactive, 138141529d79SRoman Li vratio_pre_c, 138241529d79SRoman Li hscale_pixel_rate_c, 138341529d79SRoman Li swath_width_pixels_ub_c, 138441529d79SRoman Li 1); // per line 138541529d79SRoman Li 138641529d79SRoman Li refcyc_per_line_delivery_c = get_refcyc_per_delivery( 138741529d79SRoman Li mode_lib, 138841529d79SRoman Li refclk_freq_in_mhz, 138941529d79SRoman Li pclk_freq_in_mhz, 139041529d79SRoman Li dst->odm_combine, 139141529d79SRoman Li full_recout_width, 139241529d79SRoman Li dst->hactive, 139341529d79SRoman Li vratio_c, 139441529d79SRoman Li hscale_pixel_rate_c, 139541529d79SRoman Li swath_width_pixels_ub_c, 139641529d79SRoman Li 1); // per line 139741529d79SRoman Li 139841529d79SRoman Li dml_print("DML_DLG: %s: refcyc_per_line_delivery_pre_c = %3.2f\n", __func__, refcyc_per_line_delivery_pre_c); 139941529d79SRoman Li dml_print("DML_DLG: %s: refcyc_per_line_delivery_c = %3.2f\n", __func__, refcyc_per_line_delivery_c); 140041529d79SRoman Li dml_print("DML_DLG: %s: vba__refcyc_per_line_delivery_pre_c = %3.2f\n", __func__, vba__refcyc_per_line_delivery_pre_c); 140141529d79SRoman Li dml_print("DML_DLG: %s: vba__refcyc_per_line_delivery_c = %3.2f\n", __func__, vba__refcyc_per_line_delivery_c); 140241529d79SRoman Li 140341529d79SRoman Li //old_impl_vs_vba_impl("refcyc_per_line_delivery_pre_c", refcyc_per_line_delivery_pre_c, vba__refcyc_per_line_delivery_pre_c); 140441529d79SRoman Li //old_impl_vs_vba_impl("refcyc_per_line_delivery_c", refcyc_per_line_delivery_c, vba__refcyc_per_line_delivery_c); 140541529d79SRoman Li } 140641529d79SRoman Li 140741529d79SRoman Li if (src->dynamic_metadata_enable && src->gpuvm) 140841529d79SRoman Li disp_dlg_regs->refcyc_per_vm_dmdata = get_refcyc_per_vm_dmdata_in_us(mode_lib, e2e_pipe_param, num_pipes, pipe_idx) * refclk_freq_in_mhz; // From VBA 140941529d79SRoman Li 141041529d79SRoman Li disp_dlg_regs->dmdata_dl_delta = get_dmdata_dl_delta_in_us(mode_lib, e2e_pipe_param, num_pipes, pipe_idx) * refclk_freq_in_mhz; // From VBA 141141529d79SRoman Li 141241529d79SRoman Li // TTU - Luma / Chroma 141341529d79SRoman Li if (access_dir) { // vertical access 141441529d79SRoman Li scaler_rec_in_width_l = vp_height_l; 141541529d79SRoman Li scaler_rec_in_width_c = vp_height_c; 141641529d79SRoman Li } else { 141741529d79SRoman Li scaler_rec_in_width_l = vp_width_l; 141841529d79SRoman Li scaler_rec_in_width_c = vp_width_c; 141941529d79SRoman Li } 142041529d79SRoman Li 142141529d79SRoman Li refcyc_per_req_delivery_pre_l = get_refcyc_per_delivery( 142241529d79SRoman Li mode_lib, 142341529d79SRoman Li refclk_freq_in_mhz, 142441529d79SRoman Li pclk_freq_in_mhz, 142541529d79SRoman Li dst->odm_combine, 142641529d79SRoman Li full_recout_width, 142741529d79SRoman Li dst->hactive, 142841529d79SRoman Li vratio_pre_l, 142941529d79SRoman Li hscale_pixel_rate_l, 143041529d79SRoman Li scaler_rec_in_width_l, 143141529d79SRoman Li req_per_swath_ub_l); // per req 143241529d79SRoman Li 143341529d79SRoman Li refcyc_per_req_delivery_l = get_refcyc_per_delivery( 143441529d79SRoman Li mode_lib, 143541529d79SRoman Li refclk_freq_in_mhz, 143641529d79SRoman Li pclk_freq_in_mhz, 143741529d79SRoman Li dst->odm_combine, 143841529d79SRoman Li full_recout_width, 143941529d79SRoman Li dst->hactive, 144041529d79SRoman Li vratio_l, 144141529d79SRoman Li hscale_pixel_rate_l, 144241529d79SRoman Li scaler_rec_in_width_l, 144341529d79SRoman Li req_per_swath_ub_l); // per req 144441529d79SRoman Li 144541529d79SRoman Li dml_print("DML_DLG: %s: refcyc_per_req_delivery_pre_l = %3.2f\n", __func__, refcyc_per_req_delivery_pre_l); 144641529d79SRoman Li dml_print("DML_DLG: %s: refcyc_per_req_delivery_l = %3.2f\n", __func__, refcyc_per_req_delivery_l); 144741529d79SRoman Li dml_print("DML_DLG: %s: vba__refcyc_per_req_delivery_pre_l = %3.2f\n", __func__, vba__refcyc_per_req_delivery_pre_l); 144841529d79SRoman Li dml_print("DML_DLG: %s: vba__refcyc_per_req_delivery_l = %3.2f\n", __func__, vba__refcyc_per_req_delivery_l); 144941529d79SRoman Li 145041529d79SRoman Li //old_impl_vs_vba_impl("refcyc_per_req_delivery_pre_l", refcyc_per_req_delivery_pre_l, vba__refcyc_per_req_delivery_pre_l); 145141529d79SRoman Li //old_impl_vs_vba_impl("refcyc_per_req_delivery_l", refcyc_per_req_delivery_l, vba__refcyc_per_req_delivery_l); 145241529d79SRoman Li 145341529d79SRoman Li ASSERT(refcyc_per_req_delivery_pre_l < dml_pow(2, 13)); ASSERT(refcyc_per_req_delivery_l < dml_pow(2, 13)); 145441529d79SRoman Li 145541529d79SRoman Li if (dual_plane) { 145641529d79SRoman Li float vba__refcyc_per_req_delivery_pre_c = get_refcyc_per_req_delivery_pre_c_in_us(mode_lib, e2e_pipe_param, num_pipes, pipe_idx) * refclk_freq_in_mhz; // From VBA 145741529d79SRoman Li float vba__refcyc_per_req_delivery_c = get_refcyc_per_req_delivery_c_in_us(mode_lib, e2e_pipe_param, num_pipes, pipe_idx) * refclk_freq_in_mhz; // From VBA 145841529d79SRoman Li 145941529d79SRoman Li refcyc_per_req_delivery_pre_c = get_refcyc_per_delivery( 146041529d79SRoman Li mode_lib, 146141529d79SRoman Li refclk_freq_in_mhz, 146241529d79SRoman Li pclk_freq_in_mhz, 146341529d79SRoman Li dst->odm_combine, 146441529d79SRoman Li full_recout_width, 146541529d79SRoman Li dst->hactive, 146641529d79SRoman Li vratio_pre_c, 146741529d79SRoman Li hscale_pixel_rate_c, 146841529d79SRoman Li scaler_rec_in_width_c, 146941529d79SRoman Li req_per_swath_ub_c); // per req 147041529d79SRoman Li refcyc_per_req_delivery_c = get_refcyc_per_delivery( 147141529d79SRoman Li mode_lib, 147241529d79SRoman Li refclk_freq_in_mhz, 147341529d79SRoman Li pclk_freq_in_mhz, 147441529d79SRoman Li dst->odm_combine, 147541529d79SRoman Li full_recout_width, 147641529d79SRoman Li dst->hactive, 147741529d79SRoman Li vratio_c, 147841529d79SRoman Li hscale_pixel_rate_c, 147941529d79SRoman Li scaler_rec_in_width_c, 148041529d79SRoman Li req_per_swath_ub_c); // per req 148141529d79SRoman Li 148241529d79SRoman Li dml_print("DML_DLG: %s: refcyc_per_req_delivery_pre_c = %3.2f\n", __func__, refcyc_per_req_delivery_pre_c); 148341529d79SRoman Li dml_print("DML_DLG: %s: refcyc_per_req_delivery_c = %3.2f\n", __func__, refcyc_per_req_delivery_c); 148441529d79SRoman Li dml_print("DML_DLG: %s: vba__refcyc_per_req_delivery_pre_c = %3.2f\n", __func__, vba__refcyc_per_req_delivery_pre_c); 148541529d79SRoman Li dml_print("DML_DLG: %s: vba__refcyc_per_req_delivery_c = %3.2f\n", __func__, vba__refcyc_per_req_delivery_c); 148641529d79SRoman Li 148741529d79SRoman Li //old_impl_vs_vba_impl("refcyc_per_req_delivery_pre_c", refcyc_per_req_delivery_pre_c, vba__refcyc_per_req_delivery_pre_c); 148841529d79SRoman Li //old_impl_vs_vba_impl("refcyc_per_req_delivery_c", refcyc_per_req_delivery_c, vba__refcyc_per_req_delivery_c); 148941529d79SRoman Li 149041529d79SRoman Li ASSERT(refcyc_per_req_delivery_pre_c < dml_pow(2, 13)); ASSERT(refcyc_per_req_delivery_c < dml_pow(2, 13)); 149141529d79SRoman Li } 149241529d79SRoman Li 149341529d79SRoman Li // TTU - Cursor 149441529d79SRoman Li refcyc_per_req_delivery_pre_cur0 = 0.0; 149541529d79SRoman Li refcyc_per_req_delivery_cur0 = 0.0; 149641529d79SRoman Li 149741529d79SRoman Li ASSERT(src->num_cursors <= 1); 149841529d79SRoman Li 149941529d79SRoman Li if (src->num_cursors > 0) { 150041529d79SRoman Li float vba__refcyc_per_req_delivery_pre_cur0; 150141529d79SRoman Li float vba__refcyc_per_req_delivery_cur0; 150241529d79SRoman Li 150341529d79SRoman Li calculate_ttu_cursor( 150441529d79SRoman Li mode_lib, 150541529d79SRoman Li &refcyc_per_req_delivery_pre_cur0, 150641529d79SRoman Li &refcyc_per_req_delivery_cur0, 150741529d79SRoman Li refclk_freq_in_mhz, 150841529d79SRoman Li ref_freq_to_pix_freq, 150941529d79SRoman Li hscale_pixel_rate_l, 151041529d79SRoman Li scl->hscl_ratio, 151141529d79SRoman Li vratio_pre_l, 151241529d79SRoman Li vratio_l, 151341529d79SRoman Li src->cur0_src_width, 151441529d79SRoman Li (enum cursor_bpp) (src->cur0_bpp)); 151541529d79SRoman Li 151641529d79SRoman Li vba__refcyc_per_req_delivery_pre_cur0 = get_refcyc_per_cursor_req_delivery_pre_in_us(mode_lib, e2e_pipe_param, num_pipes, pipe_idx) * refclk_freq_in_mhz; // From VBA 151741529d79SRoman Li vba__refcyc_per_req_delivery_cur0 = get_refcyc_per_cursor_req_delivery_in_us(mode_lib, e2e_pipe_param, num_pipes, pipe_idx) * refclk_freq_in_mhz; // From VBA 151841529d79SRoman Li 151941529d79SRoman Li dml_print("DML_DLG: %s: refcyc_per_req_delivery_pre_cur0 = %3.2f\n", __func__, refcyc_per_req_delivery_pre_cur0); 152041529d79SRoman Li dml_print("DML_DLG: %s: refcyc_per_req_delivery_cur0 = %3.2f\n", __func__, refcyc_per_req_delivery_cur0); 152141529d79SRoman Li dml_print("DML_DLG: %s: vba__refcyc_per_req_delivery_pre_cur0 = %3.2f\n", __func__, vba__refcyc_per_req_delivery_pre_cur0); 152241529d79SRoman Li dml_print("DML_DLG: %s: vba__refcyc_per_req_delivery_cur0 = %3.2f\n", __func__, vba__refcyc_per_req_delivery_cur0); 152341529d79SRoman Li 152441529d79SRoman Li //old_impl_vs_vba_impl("refcyc_per_req_delivery_pre_cur0", refcyc_per_req_delivery_pre_cur0, vba__refcyc_per_req_delivery_pre_cur0); 152541529d79SRoman Li //old_impl_vs_vba_impl("refcyc_per_req_delivery_cur0", refcyc_per_req_delivery_cur0, vba__refcyc_per_req_delivery_cur0); 152641529d79SRoman Li } 152741529d79SRoman Li 152841529d79SRoman Li refcyc_per_req_delivery_pre_cur1 = 0.0; 152941529d79SRoman Li refcyc_per_req_delivery_cur1 = 0.0; 153041529d79SRoman Li 153141529d79SRoman Li // TTU - Misc 153241529d79SRoman Li // all hard-coded 153341529d79SRoman Li 153441529d79SRoman Li // Assignment to register structures 153541529d79SRoman Li disp_dlg_regs->dst_y_after_scaler = dst_y_after_scaler; // in terms of line 153641529d79SRoman Li ASSERT(disp_dlg_regs->dst_y_after_scaler < 8); 153741529d79SRoman Li disp_dlg_regs->refcyc_x_after_scaler = dst_x_after_scaler * ref_freq_to_pix_freq; // in terms of refclk 153841529d79SRoman Li ASSERT(disp_dlg_regs->refcyc_x_after_scaler < (unsigned int)dml_pow(2, 13)); 153941529d79SRoman Li disp_dlg_regs->dst_y_prefetch = (unsigned int) (dst_y_prefetch * dml_pow(2, 2)); 154041529d79SRoman Li disp_dlg_regs->dst_y_per_vm_vblank = (unsigned int) (dst_y_per_vm_vblank * dml_pow(2, 2)); 154141529d79SRoman Li disp_dlg_regs->dst_y_per_row_vblank = (unsigned int) (dst_y_per_row_vblank * dml_pow(2, 2)); 154241529d79SRoman Li disp_dlg_regs->dst_y_per_vm_flip = (unsigned int) (dst_y_per_vm_flip * dml_pow(2, 2)); 154341529d79SRoman Li disp_dlg_regs->dst_y_per_row_flip = (unsigned int) (dst_y_per_row_flip * dml_pow(2, 2)); 154441529d79SRoman Li 154541529d79SRoman Li disp_dlg_regs->vratio_prefetch = (unsigned int) (vratio_pre_l * dml_pow(2, 19)); 154641529d79SRoman Li disp_dlg_regs->vratio_prefetch_c = (unsigned int) (vratio_pre_c * dml_pow(2, 19)); 154741529d79SRoman Li 154841529d79SRoman Li dml_print("DML_DLG: %s: disp_dlg_regs->dst_y_per_vm_vblank = 0x%x\n", __func__, disp_dlg_regs->dst_y_per_vm_vblank); 154941529d79SRoman Li dml_print("DML_DLG: %s: disp_dlg_regs->dst_y_per_row_vblank = 0x%x\n", __func__, disp_dlg_regs->dst_y_per_row_vblank); 155041529d79SRoman Li dml_print("DML_DLG: %s: disp_dlg_regs->dst_y_per_vm_flip = 0x%x\n", __func__, disp_dlg_regs->dst_y_per_vm_flip); 155141529d79SRoman Li dml_print("DML_DLG: %s: disp_dlg_regs->dst_y_per_row_flip = 0x%x\n", __func__, disp_dlg_regs->dst_y_per_row_flip); 155241529d79SRoman Li 155341529d79SRoman Li // hack for FPGA 155441529d79SRoman Li if (mode_lib->project == DML_PROJECT_DCN31_FPGA) { 155541529d79SRoman Li if (disp_dlg_regs->vratio_prefetch >= (unsigned int) dml_pow(2, 22)) { 155641529d79SRoman Li disp_dlg_regs->vratio_prefetch = (unsigned int) dml_pow(2, 22) - 1; 155741529d79SRoman Li dml_print("vratio_prefetch exceed the max value, the register field is [21:0]\n"); 155841529d79SRoman Li } 155941529d79SRoman Li } 156041529d79SRoman Li 156141529d79SRoman Li disp_dlg_regs->refcyc_per_pte_group_vblank_l = (unsigned int) (dst_y_per_row_vblank * (double) htotal * ref_freq_to_pix_freq / (double) dpte_groups_per_row_ub_l); 156241529d79SRoman Li ASSERT(disp_dlg_regs->refcyc_per_pte_group_vblank_l < (unsigned int)dml_pow(2, 13)); 156341529d79SRoman Li 156441529d79SRoman Li if (dual_plane) { 156541529d79SRoman Li disp_dlg_regs->refcyc_per_pte_group_vblank_c = (unsigned int) (dst_y_per_row_vblank * (double) htotal * ref_freq_to_pix_freq / (double) dpte_groups_per_row_ub_c); 156641529d79SRoman Li ASSERT(disp_dlg_regs->refcyc_per_pte_group_vblank_c < (unsigned int)dml_pow(2, 13)); 156741529d79SRoman Li } 156841529d79SRoman Li 156941529d79SRoman Li disp_dlg_regs->refcyc_per_meta_chunk_vblank_l = (unsigned int) (dst_y_per_row_vblank * (double) htotal * ref_freq_to_pix_freq / (double) meta_chunks_per_row_ub_l); 157041529d79SRoman Li ASSERT(disp_dlg_regs->refcyc_per_meta_chunk_vblank_l < (unsigned int)dml_pow(2, 13)); 157141529d79SRoman Li 157241529d79SRoman Li disp_dlg_regs->refcyc_per_meta_chunk_vblank_c = disp_dlg_regs->refcyc_per_meta_chunk_vblank_l; // dcc for 4:2:0 is not supported in dcn1.0. assigned to be the same as _l for now 157341529d79SRoman Li 157441529d79SRoman Li disp_dlg_regs->refcyc_per_pte_group_flip_l = (unsigned int) (dst_y_per_row_flip * htotal * ref_freq_to_pix_freq) / dpte_groups_per_row_ub_l; 157541529d79SRoman Li disp_dlg_regs->refcyc_per_meta_chunk_flip_l = (unsigned int) (dst_y_per_row_flip * htotal * ref_freq_to_pix_freq) / meta_chunks_per_row_ub_l; 157641529d79SRoman Li 157741529d79SRoman Li if (dual_plane) { 157841529d79SRoman Li disp_dlg_regs->refcyc_per_pte_group_flip_c = (unsigned int) (dst_y_per_row_flip * htotal * ref_freq_to_pix_freq) / dpte_groups_per_row_ub_c; 157941529d79SRoman Li disp_dlg_regs->refcyc_per_meta_chunk_flip_c = (unsigned int) (dst_y_per_row_flip * htotal * ref_freq_to_pix_freq) / meta_chunks_per_row_ub_c; 158041529d79SRoman Li } 158141529d79SRoman Li 158241529d79SRoman Li disp_dlg_regs->refcyc_per_vm_group_vblank = get_refcyc_per_vm_group_vblank_in_us(mode_lib, e2e_pipe_param, num_pipes, pipe_idx) * refclk_freq_in_mhz; // From VBA 158341529d79SRoman Li disp_dlg_regs->refcyc_per_vm_group_flip = get_refcyc_per_vm_group_flip_in_us(mode_lib, e2e_pipe_param, num_pipes, pipe_idx) * refclk_freq_in_mhz; // From VBA 158441529d79SRoman Li disp_dlg_regs->refcyc_per_vm_req_vblank = get_refcyc_per_vm_req_vblank_in_us(mode_lib, e2e_pipe_param, num_pipes, pipe_idx) * refclk_freq_in_mhz * dml_pow(2, 10); // From VBA 158541529d79SRoman Li disp_dlg_regs->refcyc_per_vm_req_flip = get_refcyc_per_vm_req_flip_in_us(mode_lib, e2e_pipe_param, num_pipes, pipe_idx) * refclk_freq_in_mhz * dml_pow(2, 10); // From VBA 158641529d79SRoman Li 158741529d79SRoman Li // Clamp to max for now 158841529d79SRoman Li if (disp_dlg_regs->refcyc_per_vm_group_vblank >= (unsigned int) dml_pow(2, 23)) 158941529d79SRoman Li disp_dlg_regs->refcyc_per_vm_group_vblank = dml_pow(2, 23) - 1; 159041529d79SRoman Li 159141529d79SRoman Li if (disp_dlg_regs->refcyc_per_vm_group_flip >= (unsigned int) dml_pow(2, 23)) 159241529d79SRoman Li disp_dlg_regs->refcyc_per_vm_group_flip = dml_pow(2, 23) - 1; 159341529d79SRoman Li 159441529d79SRoman Li if (disp_dlg_regs->refcyc_per_vm_req_vblank >= (unsigned int) dml_pow(2, 23)) 159541529d79SRoman Li disp_dlg_regs->refcyc_per_vm_req_vblank = dml_pow(2, 23) - 1; 159641529d79SRoman Li 159741529d79SRoman Li if (disp_dlg_regs->refcyc_per_vm_req_flip >= (unsigned int) dml_pow(2, 23)) 159841529d79SRoman Li disp_dlg_regs->refcyc_per_vm_req_flip = dml_pow(2, 23) - 1; 159941529d79SRoman Li 160041529d79SRoman Li disp_dlg_regs->dst_y_per_pte_row_nom_l = (unsigned int) ((double) dpte_row_height_l / (double) vratio_l * dml_pow(2, 2)); 160141529d79SRoman Li ASSERT(disp_dlg_regs->dst_y_per_pte_row_nom_l < (unsigned int)dml_pow(2, 17)); 160241529d79SRoman Li if (dual_plane) { 160341529d79SRoman Li disp_dlg_regs->dst_y_per_pte_row_nom_c = (unsigned int) ((double) dpte_row_height_c / (double) vratio_c * dml_pow(2, 2)); 160441529d79SRoman Li if (disp_dlg_regs->dst_y_per_pte_row_nom_c >= (unsigned int) dml_pow(2, 17)) { 160541529d79SRoman Li dml_print( 160641529d79SRoman Li "DML_DLG: %s: Warning dst_y_per_pte_row_nom_c %u larger than supported by register format U15.2 %u\n", 160741529d79SRoman Li __func__, 160841529d79SRoman Li disp_dlg_regs->dst_y_per_pte_row_nom_c, 160941529d79SRoman Li (unsigned int) dml_pow(2, 17) - 1); 161041529d79SRoman Li } 161141529d79SRoman Li } 161241529d79SRoman Li 161341529d79SRoman Li disp_dlg_regs->dst_y_per_meta_row_nom_l = (unsigned int) ((double) meta_row_height_l / (double) vratio_l * dml_pow(2, 2)); 161441529d79SRoman Li ASSERT(disp_dlg_regs->dst_y_per_meta_row_nom_l < (unsigned int)dml_pow(2, 17)); 161541529d79SRoman Li 161641529d79SRoman Li disp_dlg_regs->dst_y_per_meta_row_nom_c = (unsigned int) ((double) meta_row_height_c / (double) vratio_c * dml_pow(2, 2)); 161741529d79SRoman Li ASSERT(disp_dlg_regs->dst_y_per_meta_row_nom_c < (unsigned int)dml_pow(2, 17)); 161841529d79SRoman Li 161941529d79SRoman Li disp_dlg_regs->refcyc_per_pte_group_nom_l = (unsigned int) ((double) dpte_row_height_l / (double) vratio_l * (double) htotal * ref_freq_to_pix_freq 162041529d79SRoman Li / (double) dpte_groups_per_row_ub_l); 162141529d79SRoman Li if (disp_dlg_regs->refcyc_per_pte_group_nom_l >= (unsigned int) dml_pow(2, 23)) 162241529d79SRoman Li disp_dlg_regs->refcyc_per_pte_group_nom_l = dml_pow(2, 23) - 1; 162341529d79SRoman Li disp_dlg_regs->refcyc_per_meta_chunk_nom_l = (unsigned int) ((double) meta_row_height_l / (double) vratio_l * (double) htotal * ref_freq_to_pix_freq 162441529d79SRoman Li / (double) meta_chunks_per_row_ub_l); 162541529d79SRoman Li if (disp_dlg_regs->refcyc_per_meta_chunk_nom_l >= (unsigned int) dml_pow(2, 23)) 162641529d79SRoman Li disp_dlg_regs->refcyc_per_meta_chunk_nom_l = dml_pow(2, 23) - 1; 162741529d79SRoman Li 162841529d79SRoman Li if (dual_plane) { 162941529d79SRoman Li disp_dlg_regs->refcyc_per_pte_group_nom_c = (unsigned int) ((double) dpte_row_height_c / (double) vratio_c * (double) htotal * ref_freq_to_pix_freq 163041529d79SRoman Li / (double) dpte_groups_per_row_ub_c); 163141529d79SRoman Li if (disp_dlg_regs->refcyc_per_pte_group_nom_c >= (unsigned int) dml_pow(2, 23)) 163241529d79SRoman Li disp_dlg_regs->refcyc_per_pte_group_nom_c = dml_pow(2, 23) - 1; 163341529d79SRoman Li 163441529d79SRoman Li // TODO: Is this the right calculation? Does htotal need to be halved? 163541529d79SRoman Li disp_dlg_regs->refcyc_per_meta_chunk_nom_c = (unsigned int) ((double) meta_row_height_c / (double) vratio_c * (double) htotal * ref_freq_to_pix_freq 163641529d79SRoman Li / (double) meta_chunks_per_row_ub_c); 163741529d79SRoman Li if (disp_dlg_regs->refcyc_per_meta_chunk_nom_c >= (unsigned int) dml_pow(2, 23)) 163841529d79SRoman Li disp_dlg_regs->refcyc_per_meta_chunk_nom_c = dml_pow(2, 23) - 1; 163941529d79SRoman Li } 164041529d79SRoman Li 164141529d79SRoman Li disp_dlg_regs->refcyc_per_line_delivery_pre_l = (unsigned int) dml_floor(refcyc_per_line_delivery_pre_l, 1); 164241529d79SRoman Li disp_dlg_regs->refcyc_per_line_delivery_l = (unsigned int) dml_floor(refcyc_per_line_delivery_l, 1); 164341529d79SRoman Li ASSERT(disp_dlg_regs->refcyc_per_line_delivery_pre_l < (unsigned int)dml_pow(2, 13)); ASSERT(disp_dlg_regs->refcyc_per_line_delivery_l < (unsigned int)dml_pow(2, 13)); 164441529d79SRoman Li 164541529d79SRoman Li disp_dlg_regs->refcyc_per_line_delivery_pre_c = (unsigned int) dml_floor(refcyc_per_line_delivery_pre_c, 1); 164641529d79SRoman Li disp_dlg_regs->refcyc_per_line_delivery_c = (unsigned int) dml_floor(refcyc_per_line_delivery_c, 1); 164741529d79SRoman Li ASSERT(disp_dlg_regs->refcyc_per_line_delivery_pre_c < (unsigned int)dml_pow(2, 13)); ASSERT(disp_dlg_regs->refcyc_per_line_delivery_c < (unsigned int)dml_pow(2, 13)); 164841529d79SRoman Li 164941529d79SRoman Li disp_dlg_regs->chunk_hdl_adjust_cur0 = 3; 165041529d79SRoman Li disp_dlg_regs->dst_y_offset_cur0 = 0; 165141529d79SRoman Li disp_dlg_regs->chunk_hdl_adjust_cur1 = 3; 165241529d79SRoman Li disp_dlg_regs->dst_y_offset_cur1 = 0; 165341529d79SRoman Li 165441529d79SRoman Li disp_dlg_regs->dst_y_delta_drq_limit = 0x7fff; // off 165541529d79SRoman Li 165641529d79SRoman Li disp_ttu_regs->refcyc_per_req_delivery_pre_l = (unsigned int) (refcyc_per_req_delivery_pre_l * dml_pow(2, 10)); 165741529d79SRoman Li disp_ttu_regs->refcyc_per_req_delivery_l = (unsigned int) (refcyc_per_req_delivery_l * dml_pow(2, 10)); 165841529d79SRoman Li disp_ttu_regs->refcyc_per_req_delivery_pre_c = (unsigned int) (refcyc_per_req_delivery_pre_c * dml_pow(2, 10)); 165941529d79SRoman Li disp_ttu_regs->refcyc_per_req_delivery_c = (unsigned int) (refcyc_per_req_delivery_c * dml_pow(2, 10)); 166041529d79SRoman Li disp_ttu_regs->refcyc_per_req_delivery_pre_cur0 = (unsigned int) (refcyc_per_req_delivery_pre_cur0 * dml_pow(2, 10)); 166141529d79SRoman Li disp_ttu_regs->refcyc_per_req_delivery_cur0 = (unsigned int) (refcyc_per_req_delivery_cur0 * dml_pow(2, 10)); 166241529d79SRoman Li disp_ttu_regs->refcyc_per_req_delivery_pre_cur1 = (unsigned int) (refcyc_per_req_delivery_pre_cur1 * dml_pow(2, 10)); 166341529d79SRoman Li disp_ttu_regs->refcyc_per_req_delivery_cur1 = (unsigned int) (refcyc_per_req_delivery_cur1 * dml_pow(2, 10)); 166441529d79SRoman Li 166541529d79SRoman Li disp_ttu_regs->qos_level_low_wm = 0; 166641529d79SRoman Li ASSERT(disp_ttu_regs->qos_level_low_wm < dml_pow(2, 14)); 166741529d79SRoman Li 166841529d79SRoman Li disp_ttu_regs->qos_level_high_wm = (unsigned int) (4.0 * (double) htotal * ref_freq_to_pix_freq); 166941529d79SRoman Li ASSERT(disp_ttu_regs->qos_level_high_wm < dml_pow(2, 14)); 167041529d79SRoman Li 167141529d79SRoman Li disp_ttu_regs->qos_level_flip = 14; 167241529d79SRoman Li disp_ttu_regs->qos_level_fixed_l = 8; 167341529d79SRoman Li disp_ttu_regs->qos_level_fixed_c = 8; 167441529d79SRoman Li disp_ttu_regs->qos_level_fixed_cur0 = 8; 167541529d79SRoman Li disp_ttu_regs->qos_ramp_disable_l = 0; 167641529d79SRoman Li disp_ttu_regs->qos_ramp_disable_c = 0; 167741529d79SRoman Li disp_ttu_regs->qos_ramp_disable_cur0 = 0; 167841529d79SRoman Li 167941529d79SRoman Li disp_ttu_regs->min_ttu_vblank = min_ttu_vblank * refclk_freq_in_mhz; 168041529d79SRoman Li ASSERT(disp_ttu_regs->min_ttu_vblank < dml_pow(2, 24)); 168141529d79SRoman Li 168241529d79SRoman Li print__ttu_regs_st(mode_lib, disp_ttu_regs); 168341529d79SRoman Li print__dlg_regs_st(mode_lib, disp_dlg_regs); 168441529d79SRoman Li } 168541529d79SRoman Li 168641529d79SRoman Li void dml314_rq_dlg_get_dlg_reg( 168741529d79SRoman Li struct display_mode_lib *mode_lib, 168841529d79SRoman Li display_dlg_regs_st *dlg_regs, 168941529d79SRoman Li display_ttu_regs_st *ttu_regs, 169041529d79SRoman Li const display_e2e_pipe_params_st *e2e_pipe_param, 169141529d79SRoman Li const unsigned int num_pipes, 169241529d79SRoman Li const unsigned int pipe_idx, 169341529d79SRoman Li const bool cstate_en, 169441529d79SRoman Li const bool pstate_en, 169541529d79SRoman Li const bool vm_en, 169641529d79SRoman Li const bool ignore_viewport_pos, 169741529d79SRoman Li const bool immediate_flip_support) 169841529d79SRoman Li { 169941529d79SRoman Li display_rq_params_st rq_param = {0}; 170041529d79SRoman Li display_dlg_sys_params_st dlg_sys_param = {0}; 170141529d79SRoman Li 170241529d79SRoman Li // Get watermark and Tex. 170341529d79SRoman Li dlg_sys_param.t_urg_wm_us = get_wm_urgent(mode_lib, e2e_pipe_param, num_pipes); 170441529d79SRoman Li dlg_sys_param.deepsleep_dcfclk_mhz = get_clk_dcf_deepsleep(mode_lib, e2e_pipe_param, num_pipes); 170541529d79SRoman Li dlg_sys_param.t_extra_us = get_urgent_extra_latency(mode_lib, e2e_pipe_param, num_pipes); 170641529d79SRoman Li dlg_sys_param.mem_trip_us = get_wm_memory_trip(mode_lib, e2e_pipe_param, num_pipes); 170741529d79SRoman Li dlg_sys_param.t_mclk_wm_us = get_wm_dram_clock_change(mode_lib, e2e_pipe_param, num_pipes); 170841529d79SRoman Li dlg_sys_param.t_sr_wm_us = get_wm_stutter_enter_exit(mode_lib, e2e_pipe_param, num_pipes); 170941529d79SRoman Li dlg_sys_param.total_flip_bw = get_total_immediate_flip_bw(mode_lib, e2e_pipe_param, num_pipes); 171041529d79SRoman Li dlg_sys_param.total_flip_bytes = get_total_immediate_flip_bytes(mode_lib, e2e_pipe_param, num_pipes); 171141529d79SRoman Li 171241529d79SRoman Li print__dlg_sys_params_st(mode_lib, &dlg_sys_param); 171341529d79SRoman Li 171441529d79SRoman Li // system parameter calculation done 171541529d79SRoman Li 171641529d79SRoman Li dml_print("DML_DLG: Calculation for pipe[%d] start\n\n", pipe_idx); 171741529d79SRoman Li dml_rq_dlg_get_rq_params(mode_lib, &rq_param, &e2e_pipe_param[pipe_idx].pipe); 171841529d79SRoman Li dml_rq_dlg_get_dlg_params( 171941529d79SRoman Li mode_lib, 172041529d79SRoman Li e2e_pipe_param, 172141529d79SRoman Li num_pipes, 172241529d79SRoman Li pipe_idx, 172341529d79SRoman Li dlg_regs, 172441529d79SRoman Li ttu_regs, 172541529d79SRoman Li &rq_param.dlg, 172641529d79SRoman Li &dlg_sys_param, 172741529d79SRoman Li cstate_en, 172841529d79SRoman Li pstate_en, 172941529d79SRoman Li vm_en, 173041529d79SRoman Li ignore_viewport_pos, 173141529d79SRoman Li immediate_flip_support); 173241529d79SRoman Li dml_print("DML_DLG: Calculation for pipe[%d] end\n", pipe_idx); 173341529d79SRoman Li } 1734