1*f369e4ebSJasdeep Dhillon /* 2*f369e4ebSJasdeep Dhillon * Copyright 2019-2021 Advanced Micro Devices, Inc. 3*f369e4ebSJasdeep Dhillon * 4*f369e4ebSJasdeep Dhillon * Permission is hereby granted, free of charge, to any person obtaining a 5*f369e4ebSJasdeep Dhillon * copy of this software and associated documentation files (the "Software"), 6*f369e4ebSJasdeep Dhillon * to deal in the Software without restriction, including without limitation 7*f369e4ebSJasdeep Dhillon * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8*f369e4ebSJasdeep Dhillon * and/or sell copies of the Software, and to permit persons to whom the 9*f369e4ebSJasdeep Dhillon * Software is furnished to do so, subject to the following conditions: 10*f369e4ebSJasdeep Dhillon * 11*f369e4ebSJasdeep Dhillon * The above copyright notice and this permission notice shall be included in 12*f369e4ebSJasdeep Dhillon * all copies or substantial portions of the Software. 13*f369e4ebSJasdeep Dhillon * 14*f369e4ebSJasdeep Dhillon * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15*f369e4ebSJasdeep Dhillon * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16*f369e4ebSJasdeep Dhillon * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17*f369e4ebSJasdeep Dhillon * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18*f369e4ebSJasdeep Dhillon * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19*f369e4ebSJasdeep Dhillon * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20*f369e4ebSJasdeep Dhillon * OTHER DEALINGS IN THE SOFTWARE. 21*f369e4ebSJasdeep Dhillon * 22*f369e4ebSJasdeep Dhillon * Authors: AMD 23*f369e4ebSJasdeep Dhillon * 24*f369e4ebSJasdeep Dhillon */ 25*f369e4ebSJasdeep Dhillon 26*f369e4ebSJasdeep Dhillon #ifndef __DCN302_FPU_H__ 27*f369e4ebSJasdeep Dhillon #define __DCN302_FPU_H__ 28*f369e4ebSJasdeep Dhillon 29*f369e4ebSJasdeep Dhillon void dcn302_fpu_init_soc_bounding_box(struct bp_soc_bb_info bb_info); 30*f369e4ebSJasdeep Dhillon void dcn302_fpu_update_bw_bounding_box(struct dc *dc, struct clk_bw_params *bw_params); 31*f369e4ebSJasdeep Dhillon 32*f369e4ebSJasdeep Dhillon #endif /* __DCN302_FPU_H__*/ 33