131484207SQingqing Zhuo /* 231484207SQingqing Zhuo * Copyright 2019-2021 Advanced Micro Devices, Inc. 331484207SQingqing Zhuo * 431484207SQingqing Zhuo * Permission is hereby granted, free of charge, to any person obtaining a 531484207SQingqing Zhuo * copy of this software and associated documentation files (the "Software"), 631484207SQingqing Zhuo * to deal in the Software without restriction, including without limitation 731484207SQingqing Zhuo * the rights to use, copy, modify, merge, publish, distribute, sublicense, 831484207SQingqing Zhuo * and/or sell copies of the Software, and to permit persons to whom the 931484207SQingqing Zhuo * Software is furnished to do so, subject to the following conditions: 1031484207SQingqing Zhuo * 1131484207SQingqing Zhuo * The above copyright notice and this permission notice shall be included in 1231484207SQingqing Zhuo * all copies or substantial portions of the Software. 1331484207SQingqing Zhuo * 1431484207SQingqing Zhuo * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 1531484207SQingqing Zhuo * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 1631484207SQingqing Zhuo * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 1731484207SQingqing Zhuo * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 1831484207SQingqing Zhuo * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 1931484207SQingqing Zhuo * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 2031484207SQingqing Zhuo * OTHER DEALINGS IN THE SOFTWARE. 2131484207SQingqing Zhuo * 2231484207SQingqing Zhuo * Authors: AMD 2331484207SQingqing Zhuo * 2431484207SQingqing Zhuo */ 2531484207SQingqing Zhuo 2631484207SQingqing Zhuo #ifndef __DCN301_FPU_H__ 2731484207SQingqing Zhuo #define __DCN301_FPU_H__ 2831484207SQingqing Zhuo 2931484207SQingqing Zhuo void dcn301_update_bw_bounding_box(struct dc *dc, struct clk_bw_params *bw_params); 3031484207SQingqing Zhuo 3131484207SQingqing Zhuo void dcn301_fpu_set_wm_ranges(int i, 3231484207SQingqing Zhuo struct pp_smu_wm_range_sets *ranges, 3331484207SQingqing Zhuo struct _vcs_dpi_soc_bounding_box_st *loaded_bb); 3431484207SQingqing Zhuo 3531484207SQingqing Zhuo void dcn301_fpu_init_soc_bounding_box(struct bp_soc_bb_info bb_info); 3631484207SQingqing Zhuo 37*5e6d72c6SBas Nieuwenhuizen void dcn301_calculate_wm_and_dlg_fp(struct dc *dc, 3831484207SQingqing Zhuo struct dc_state *context, 3931484207SQingqing Zhuo display_e2e_pipe_params_st *pipes, 4031484207SQingqing Zhuo int pipe_cnt, 4131484207SQingqing Zhuo int vlevel_req); 4231484207SQingqing Zhuo #endif /* __DCN301_FPU_H__*/ 43