1b04641a3SBhawanpreet Lakha /* 2b04641a3SBhawanpreet Lakha * Copyright 2017 Advanced Micro Devices, Inc. 3b04641a3SBhawanpreet Lakha * 4b04641a3SBhawanpreet Lakha * Permission is hereby granted, free of charge, to any person obtaining a 5b04641a3SBhawanpreet Lakha * copy of this software and associated documentation files (the "Software"), 6b04641a3SBhawanpreet Lakha * to deal in the Software without restriction, including without limitation 7b04641a3SBhawanpreet Lakha * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8b04641a3SBhawanpreet Lakha * and/or sell copies of the Software, and to permit persons to whom the 9b04641a3SBhawanpreet Lakha * Software is furnished to do so, subject to the following conditions: 10b04641a3SBhawanpreet Lakha * 11b04641a3SBhawanpreet Lakha * The above copyright notice and this permission notice shall be included in 12b04641a3SBhawanpreet Lakha * all copies or substantial portions of the Software. 13b04641a3SBhawanpreet Lakha * 14b04641a3SBhawanpreet Lakha * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15b04641a3SBhawanpreet Lakha * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16b04641a3SBhawanpreet Lakha * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17b04641a3SBhawanpreet Lakha * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18b04641a3SBhawanpreet Lakha * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19b04641a3SBhawanpreet Lakha * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20b04641a3SBhawanpreet Lakha * OTHER DEALINGS IN THE SOFTWARE. 21b04641a3SBhawanpreet Lakha * 22b04641a3SBhawanpreet Lakha * Authors: AMD 23b04641a3SBhawanpreet Lakha * 24b04641a3SBhawanpreet Lakha */ 25b04641a3SBhawanpreet Lakha 26b04641a3SBhawanpreet Lakha #ifndef __DML21_DISPLAY_RQ_DLG_CALC_H__ 27b04641a3SBhawanpreet Lakha #define __DML21_DISPLAY_RQ_DLG_CALC_H__ 28b04641a3SBhawanpreet Lakha 295aa82e35SRodrigo Siqueira #include "dm_services.h" 30b04641a3SBhawanpreet Lakha #include "../display_rq_dlg_helpers.h" 31b04641a3SBhawanpreet Lakha 32b04641a3SBhawanpreet Lakha struct display_mode_lib; 33b04641a3SBhawanpreet Lakha 34b04641a3SBhawanpreet Lakha 35b04641a3SBhawanpreet Lakha // Function: dml_rq_dlg_get_rq_reg 36b04641a3SBhawanpreet Lakha // Main entry point for test to get the register values out of this DML class. 37b04641a3SBhawanpreet Lakha // This function calls <get_rq_param> and <extract_rq_regs> functions to calculate 38b04641a3SBhawanpreet Lakha // and then populate the rq_regs struct 39b04641a3SBhawanpreet Lakha // Input: 40b04641a3SBhawanpreet Lakha // pipe_src_param - pipe source configuration (e.g. vp, pitch, etc.) 41b04641a3SBhawanpreet Lakha // Output: 42b04641a3SBhawanpreet Lakha // rq_regs - struct that holds all the RQ registers field value. 43b04641a3SBhawanpreet Lakha // See also: <display_rq_regs_st> 44b04641a3SBhawanpreet Lakha void dml21_rq_dlg_get_rq_reg( 45b04641a3SBhawanpreet Lakha struct display_mode_lib *mode_lib, 46b04641a3SBhawanpreet Lakha display_rq_regs_st *rq_regs, 47*63c1435cSHarry Wentland const display_pipe_params_st *pipe_param); 48b04641a3SBhawanpreet Lakha 49b04641a3SBhawanpreet Lakha // Function: dml_rq_dlg_get_dlg_reg 50b04641a3SBhawanpreet Lakha // Calculate and return DLG and TTU register struct given the system setting 51b04641a3SBhawanpreet Lakha // Output: 52b04641a3SBhawanpreet Lakha // dlg_regs - output DLG register struct 53b04641a3SBhawanpreet Lakha // ttu_regs - output DLG TTU register struct 54b04641a3SBhawanpreet Lakha // Input: 55b04641a3SBhawanpreet Lakha // e2e_pipe_param - "compacted" array of e2e pipe param struct 56b04641a3SBhawanpreet Lakha // num_pipes - num of active "pipe" or "route" 57b04641a3SBhawanpreet Lakha // pipe_idx - index that identifies the e2e_pipe_param that corresponding to this dlg 58b04641a3SBhawanpreet Lakha // cstate - 0: when calculate min_ttu_vblank it is assumed cstate is not required. 1: Normal mode, cstate is considered. 59b04641a3SBhawanpreet Lakha // Added for legacy or unrealistic timing tests. 60b04641a3SBhawanpreet Lakha void dml21_rq_dlg_get_dlg_reg( 61b04641a3SBhawanpreet Lakha struct display_mode_lib *mode_lib, 62b04641a3SBhawanpreet Lakha display_dlg_regs_st *dlg_regs, 63b04641a3SBhawanpreet Lakha display_ttu_regs_st *ttu_regs, 64*63c1435cSHarry Wentland const display_e2e_pipe_params_st *e2e_pipe_param, 65b04641a3SBhawanpreet Lakha const unsigned int num_pipes, 66b04641a3SBhawanpreet Lakha const unsigned int pipe_idx, 67b04641a3SBhawanpreet Lakha const bool cstate_en, 68b04641a3SBhawanpreet Lakha const bool pstate_en, 69b04641a3SBhawanpreet Lakha const bool vm_en, 70b04641a3SBhawanpreet Lakha const bool ignore_viewport_pos, 71b04641a3SBhawanpreet Lakha const bool immediate_flip_support); 72b04641a3SBhawanpreet Lakha 73b04641a3SBhawanpreet Lakha #endif 74