1 /* 2 * Copyright 2015 Advanced Micro Devices, Inc. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included in 12 * all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 * 22 * Authors: AMD 23 * 24 */ 25 26 /** 27 * This file defines external dependencies of Display Core. 28 */ 29 30 #ifndef __DM_SERVICES_H__ 31 32 #define __DM_SERVICES_H__ 33 34 #include "amdgpu_dm_trace.h" 35 36 /* TODO: remove when DC is complete. */ 37 #include "dm_services_types.h" 38 #include "logger_interface.h" 39 #include "link_service_types.h" 40 41 #undef DEPRECATED 42 43 irq_handler_idx dm_register_interrupt( 44 struct dc_context *ctx, 45 struct dc_interrupt_params *int_params, 46 interrupt_handler ih, 47 void *handler_args); 48 49 50 /* 51 * 52 * GPU registers access 53 * 54 */ 55 uint32_t dm_read_reg_func( 56 const struct dc_context *ctx, 57 uint32_t address, 58 const char *func_name); 59 /* enable for debugging new code, this adds 50k to the driver size. */ 60 /* #define DM_CHECK_ADDR_0 */ 61 62 #define dm_read_reg(ctx, address) \ 63 dm_read_reg_func(ctx, address, __func__) 64 65 66 67 #define dm_write_reg(ctx, address, value) \ 68 dm_write_reg_func(ctx, address, value, __func__) 69 70 static inline void dm_write_reg_func( 71 const struct dc_context *ctx, 72 uint32_t address, 73 uint32_t value, 74 const char *func_name) 75 { 76 #ifdef DM_CHECK_ADDR_0 77 if (address == 0) { 78 DC_ERR("invalid register write. address = 0"); 79 return; 80 } 81 #endif 82 cgs_write_register(ctx->cgs_device, address, value); 83 trace_amdgpu_dc_wreg(&ctx->perf_trace->write_count, address, value); 84 } 85 86 static inline uint32_t dm_read_index_reg( 87 const struct dc_context *ctx, 88 enum cgs_ind_reg addr_space, 89 uint32_t index) 90 { 91 return cgs_read_ind_register(ctx->cgs_device, addr_space, index); 92 } 93 94 static inline void dm_write_index_reg( 95 const struct dc_context *ctx, 96 enum cgs_ind_reg addr_space, 97 uint32_t index, 98 uint32_t value) 99 { 100 cgs_write_ind_register(ctx->cgs_device, addr_space, index, value); 101 } 102 103 static inline uint32_t get_reg_field_value_ex( 104 uint32_t reg_value, 105 uint32_t mask, 106 uint8_t shift) 107 { 108 return (mask & reg_value) >> shift; 109 } 110 111 #define get_reg_field_value(reg_value, reg_name, reg_field)\ 112 get_reg_field_value_ex(\ 113 (reg_value),\ 114 reg_name ## __ ## reg_field ## _MASK,\ 115 reg_name ## __ ## reg_field ## __SHIFT) 116 117 static inline uint32_t set_reg_field_value_ex( 118 uint32_t reg_value, 119 uint32_t value, 120 uint32_t mask, 121 uint8_t shift) 122 { 123 ASSERT(mask != 0); 124 return (reg_value & ~mask) | (mask & (value << shift)); 125 } 126 127 #define set_reg_field_value(reg_value, value, reg_name, reg_field)\ 128 (reg_value) = set_reg_field_value_ex(\ 129 (reg_value),\ 130 (value),\ 131 reg_name ## __ ## reg_field ## _MASK,\ 132 reg_name ## __ ## reg_field ## __SHIFT) 133 134 uint32_t generic_reg_set_ex(const struct dc_context *ctx, 135 uint32_t addr, uint32_t reg_val, int n, 136 uint8_t shift1, uint32_t mask1, uint32_t field_value1, ...); 137 138 uint32_t generic_reg_update_ex(const struct dc_context *ctx, 139 uint32_t addr, int n, 140 uint8_t shift1, uint32_t mask1, uint32_t field_value1, ...); 141 142 #define FD(reg_field) reg_field ## __SHIFT, \ 143 reg_field ## _MASK 144 145 /* 146 * return number of poll before condition is met 147 * return 0 if condition is not meet after specified time out tries 148 */ 149 void generic_reg_wait(const struct dc_context *ctx, 150 uint32_t addr, uint32_t mask, uint32_t shift, uint32_t condition_value, 151 unsigned int delay_between_poll_us, unsigned int time_out_num_tries, 152 const char *func_name, int line); 153 154 155 /* These macros need to be used with soc15 registers in order to retrieve 156 * the actual offset. 157 */ 158 #define dm_write_reg_soc15(ctx, reg, inst_offset, value) \ 159 dm_write_reg_func(ctx, reg + DCE_BASE.instance[0].segment[reg##_BASE_IDX] + inst_offset, value, __func__) 160 161 #define dm_read_reg_soc15(ctx, reg, inst_offset) \ 162 dm_read_reg_func(ctx, reg + DCE_BASE.instance[0].segment[reg##_BASE_IDX] + inst_offset, __func__) 163 164 #define generic_reg_update_soc15(ctx, inst_offset, reg_name, n, ...)\ 165 generic_reg_update_ex(ctx, DCE_BASE.instance[0].segment[mm##reg_name##_BASE_IDX] + mm##reg_name + inst_offset, \ 166 n, __VA_ARGS__) 167 168 #define generic_reg_set_soc15(ctx, inst_offset, reg_name, n, ...)\ 169 generic_reg_set_ex(ctx, DCE_BASE.instance[0].segment[mm##reg_name##_BASE_IDX] + mm##reg_name + inst_offset, 0, \ 170 n, __VA_ARGS__) 171 172 #define get_reg_field_value_soc15(reg_value, block, reg_num, reg_name, reg_field)\ 173 get_reg_field_value_ex(\ 174 (reg_value),\ 175 block ## reg_num ## _ ## reg_name ## __ ## reg_field ## _MASK,\ 176 block ## reg_num ## _ ## reg_name ## __ ## reg_field ## __SHIFT) 177 178 #define set_reg_field_value_soc15(reg_value, value, block, reg_num, reg_name, reg_field)\ 179 (reg_value) = set_reg_field_value_ex(\ 180 (reg_value),\ 181 (value),\ 182 block ## reg_num ## _ ## reg_name ## __ ## reg_field ## _MASK,\ 183 block ## reg_num ## _ ## reg_name ## __ ## reg_field ## __SHIFT) 184 185 /************************************** 186 * Power Play (PP) interfaces 187 **************************************/ 188 189 /* Gets valid clocks levels from pplib 190 * 191 * input: clk_type - display clk / sclk / mem clk 192 * 193 * output: array of valid clock levels for given type in ascending order, 194 * with invalid levels filtered out 195 * 196 */ 197 bool dm_pp_get_clock_levels_by_type( 198 const struct dc_context *ctx, 199 enum dm_pp_clock_type clk_type, 200 struct dm_pp_clock_levels *clk_level_info); 201 202 bool dm_pp_get_clock_levels_by_type_with_latency( 203 const struct dc_context *ctx, 204 enum dm_pp_clock_type clk_type, 205 struct dm_pp_clock_levels_with_latency *clk_level_info); 206 207 bool dm_pp_get_clock_levels_by_type_with_voltage( 208 const struct dc_context *ctx, 209 enum dm_pp_clock_type clk_type, 210 struct dm_pp_clock_levels_with_voltage *clk_level_info); 211 212 bool dm_pp_notify_wm_clock_changes( 213 const struct dc_context *ctx, 214 struct dm_pp_wm_sets_with_clock_ranges *wm_with_clock_ranges); 215 216 void dm_pp_get_funcs(struct dc_context *ctx, 217 struct pp_smu_funcs *funcs); 218 219 /* DAL calls this function to notify PP about completion of Mode Set. 220 * For PP it means that current DCE clocks are those which were returned 221 * by dc_service_pp_pre_dce_clock_change(), in the 'output' parameter. 222 * 223 * If the clocks are higher than before, then PP does nothing. 224 * 225 * If the clocks are lower than before, then PP reduces the voltage. 226 * 227 * \returns true - call is successful 228 * false - call failed 229 */ 230 bool dm_pp_apply_display_requirements( 231 const struct dc_context *ctx, 232 const struct dm_pp_display_configuration *pp_display_cfg); 233 234 bool dm_pp_apply_power_level_change_request( 235 const struct dc_context *ctx, 236 struct dm_pp_power_level_change_request *level_change_req); 237 238 bool dm_pp_apply_clock_for_voltage_request( 239 const struct dc_context *ctx, 240 struct dm_pp_clock_for_voltage_req *clock_for_voltage_req); 241 242 bool dm_pp_get_static_clocks( 243 const struct dc_context *ctx, 244 struct dm_pp_static_clock_info *static_clk_info); 245 246 /****** end of PP interfaces ******/ 247 248 struct persistent_data_flag { 249 bool save_per_link; 250 bool save_per_edid; 251 }; 252 253 /* Call to write data in registry editor for persistent data storage. 254 * 255 * \inputs sink - identify edid/link for registry folder creation 256 * module name - identify folders for registry 257 * key name - identify keys within folders for registry 258 * params - value to write in defined folder/key 259 * size - size of the input params 260 * flag - determine whether to save by link or edid 261 * 262 * \returns true - call is successful 263 * false - call failed 264 * 265 * sink module key 266 * ----------------------------------------------------------------------------- 267 * NULL NULL NULL - failure 268 * NULL NULL - - create key with param value 269 * under base folder 270 * NULL - NULL - create module folder under base folder 271 * - NULL NULL - failure 272 * NULL - - - create key under module folder 273 * with no edid/link identification 274 * - NULL - - create key with param value 275 * under base folder 276 * - - NULL - create module folder under base folder 277 * - - - - create key under module folder 278 * with edid/link identification 279 */ 280 bool dm_write_persistent_data(struct dc_context *ctx, 281 const struct dc_sink *sink, 282 const char *module_name, 283 const char *key_name, 284 void *params, 285 unsigned int size, 286 struct persistent_data_flag *flag); 287 288 289 /* Call to read data in registry editor for persistent data storage. 290 * 291 * \inputs sink - identify edid/link for registry folder creation 292 * module name - identify folders for registry 293 * key name - identify keys within folders for registry 294 * size - size of the output params 295 * flag - determine whether it was save by link or edid 296 * 297 * \returns params - value read from defined folder/key 298 * true - call is successful 299 * false - call failed 300 * 301 * sink module key 302 * ----------------------------------------------------------------------------- 303 * NULL NULL NULL - failure 304 * NULL NULL - - read key under base folder 305 * NULL - NULL - failure 306 * - NULL NULL - failure 307 * NULL - - - read key under module folder 308 * with no edid/link identification 309 * - NULL - - read key under base folder 310 * - - NULL - failure 311 * - - - - read key under module folder 312 * with edid/link identification 313 */ 314 bool dm_read_persistent_data(struct dc_context *ctx, 315 const struct dc_sink *sink, 316 const char *module_name, 317 const char *key_name, 318 void *params, 319 unsigned int size, 320 struct persistent_data_flag *flag); 321 322 bool dm_query_extended_brightness_caps 323 (struct dc_context *ctx, enum dm_acpi_display_type display, 324 struct dm_acpi_atif_backlight_caps *pCaps); 325 326 bool dm_dmcu_set_pipe(struct dc_context *ctx, unsigned int controller_id); 327 328 /* 329 * 330 * print-out services 331 * 332 */ 333 #define dm_log_to_buffer(buffer, size, fmt, args)\ 334 vsnprintf(buffer, size, fmt, args) 335 336 static inline unsigned long long dm_get_timestamp(struct dc_context *ctx) 337 { 338 return ktime_get_raw_ns(); 339 } 340 341 unsigned long long dm_get_elapse_time_in_ns(struct dc_context *ctx, 342 unsigned long long current_time_stamp, 343 unsigned long long last_time_stamp); 344 345 /* 346 * performance tracing 347 */ 348 #define PERF_TRACE() trace_amdgpu_dc_performance(CTX->perf_trace->read_count,\ 349 CTX->perf_trace->write_count, &CTX->perf_trace->last_entry_read,\ 350 &CTX->perf_trace->last_entry_write, __func__, __LINE__) 351 #define PERF_TRACE_CTX(__CTX) trace_amdgpu_dc_performance(__CTX->perf_trace->read_count,\ 352 __CTX->perf_trace->write_count, &__CTX->perf_trace->last_entry_read,\ 353 &__CTX->perf_trace->last_entry_write, __func__, __LINE__) 354 355 356 /* 357 * Debug and verification hooks 358 */ 359 360 void dm_dtn_log_begin(struct dc_context *ctx, 361 struct dc_log_buffer_ctx *log_ctx); 362 void dm_dtn_log_append_v(struct dc_context *ctx, 363 struct dc_log_buffer_ctx *log_ctx, 364 const char *msg, ...); 365 void dm_dtn_log_end(struct dc_context *ctx, 366 struct dc_log_buffer_ctx *log_ctx); 367 368 #endif /* __DM_SERVICES_H__ */ 369