1 /* 2 * Copyright 2012-15 Advanced Micro Devices, Inc. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included in 12 * all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 * 22 * Authors: AMD 23 * 24 */ 25 26 /** 27 * This file defines helper functions provided by the Display Manager to 28 * Display Core. 29 */ 30 #ifndef __DM_HELPERS__ 31 #define __DM_HELPERS__ 32 33 #include "dc_types.h" 34 #include "dc.h" 35 36 struct dp_mst_stream_allocation_table; 37 38 /* 39 * Allocate memory accessible by the GPU 40 * 41 * frame buffer allocations must be aligned to a 4096-byte boundary 42 * 43 * Returns virtual address, sets addr to physical address 44 */ 45 void *dm_helpers_allocate_gpu_mem( 46 struct dc_context *ctx, 47 enum dc_gpu_mem_alloc_type type, 48 size_t size, 49 long long *addr); 50 51 /* 52 * Free the GPU-accessible memory at the virtual address pvMem 53 */ 54 void dm_helpers_free_gpu_mem( 55 struct dc_context *ctx, 56 enum dc_gpu_mem_alloc_type type, 57 void *pvMem); 58 59 enum dc_edid_status dm_helpers_parse_edid_caps( 60 struct dc_context *ctx, 61 const struct dc_edid *edid, 62 struct dc_edid_caps *edid_caps); 63 64 65 /* 66 * Update DP branch info 67 */ 68 void dm_helpers_dp_update_branch_info( 69 struct dc_context *ctx, 70 const struct dc_link *link); 71 72 /* 73 * Writes payload allocation table in immediate downstream device. 74 */ 75 bool dm_helpers_dp_mst_write_payload_allocation_table( 76 struct dc_context *ctx, 77 const struct dc_stream_state *stream, 78 struct dp_mst_stream_allocation_table *proposed_table, 79 bool enable); 80 81 /* 82 * poll pending down reply 83 */ 84 void dm_helpers_dp_mst_poll_pending_down_reply( 85 struct dc_context *ctx, 86 const struct dc_link *link); 87 88 /* 89 * Clear payload allocation table before enable MST DP link. 90 */ 91 void dm_helpers_dp_mst_clear_payload_allocation_table( 92 struct dc_context *ctx, 93 const struct dc_link *link); 94 95 /* 96 * Polls for ACT (allocation change trigger) handled and 97 */ 98 enum act_return_status dm_helpers_dp_mst_poll_for_allocation_change_trigger( 99 struct dc_context *ctx, 100 const struct dc_stream_state *stream); 101 /* 102 * Sends ALLOCATE_PAYLOAD message. 103 */ 104 bool dm_helpers_dp_mst_send_payload_allocation( 105 struct dc_context *ctx, 106 const struct dc_stream_state *stream, 107 bool enable); 108 109 bool dm_helpers_dp_mst_start_top_mgr( 110 struct dc_context *ctx, 111 const struct dc_link *link, 112 bool boot); 113 114 void dm_helpers_dp_mst_stop_top_mgr( 115 struct dc_context *ctx, 116 struct dc_link *link); 117 /** 118 * OS specific aux read callback. 119 */ 120 bool dm_helpers_dp_read_dpcd( 121 struct dc_context *ctx, 122 const struct dc_link *link, 123 uint32_t address, 124 uint8_t *data, 125 uint32_t size); 126 127 /** 128 * OS specific aux write callback. 129 */ 130 bool dm_helpers_dp_write_dpcd( 131 struct dc_context *ctx, 132 const struct dc_link *link, 133 uint32_t address, 134 const uint8_t *data, 135 uint32_t size); 136 137 bool dm_helpers_submit_i2c( 138 struct dc_context *ctx, 139 const struct dc_link *link, 140 struct i2c_command *cmd); 141 142 bool dm_helpers_dp_write_dsc_enable( 143 struct dc_context *ctx, 144 const struct dc_stream_state *stream, 145 bool enable 146 ); 147 bool dm_helpers_is_dp_sink_present( 148 struct dc_link *link); 149 150 void dm_helpers_mst_enable_stream_features(const struct dc_stream_state *stream); 151 152 enum dc_edid_status dm_helpers_read_local_edid( 153 struct dc_context *ctx, 154 struct dc_link *link, 155 struct dc_sink *sink); 156 157 void dm_set_dcn_clocks( 158 struct dc_context *ctx, 159 struct dc_clocks *clks); 160 161 bool dm_helpers_dmub_outbox0_interrupt_control(struct dc_context *ctx, bool enable); 162 163 #endif /* __DM_HELPERS__ */ 164