1 /*
2  * Copyright 2020 Advanced Micro Devices, Inc.
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a
5  * copy of this software and associated documentation files (the "Software"),
6  * to deal in the Software without restriction, including without limitation
7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8  * and/or sell copies of the Software, and to permit persons to whom the
9  * Software is furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice shall be included in
12  * all copies or substantial portions of the Software.
13  *
14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20  * OTHER DEALINGS IN THE SOFTWARE.
21  *
22  * Authors: AMD
23  *
24  */
25 
26 #ifndef _DCN32_RESOURCE_H_
27 #define _DCN32_RESOURCE_H_
28 
29 #include "core_types.h"
30 
31 #define DCN3_2_DET_SEG_SIZE 64
32 #define DCN3_2_MALL_MBLK_SIZE_BYTES 65536 // 64 * 1024
33 
34 #define TO_DCN32_RES_POOL(pool)\
35 	container_of(pool, struct dcn32_resource_pool, base)
36 
37 extern struct _vcs_dpi_ip_params_st dcn3_2_ip;
38 extern struct _vcs_dpi_soc_bounding_box_st dcn3_2_soc;
39 
40 struct dcn32_resource_pool {
41 	struct resource_pool base;
42 };
43 
44 struct resource_pool *dcn32_create_resource_pool(
45 		const struct dc_init_data *init_data,
46 		struct dc *dc);
47 
48 struct panel_cntl *dcn32_panel_cntl_create(
49 		const struct panel_cntl_init_data *init_data);
50 
51 bool dcn32_acquire_post_bldn_3dlut(
52 		struct resource_context *res_ctx,
53 		const struct resource_pool *pool,
54 		int mpcc_id,
55 		struct dc_3dlut **lut,
56 		struct dc_transfer_func **shaper);
57 
58 bool dcn32_release_post_bldn_3dlut(
59 		struct resource_context *res_ctx,
60 		const struct resource_pool *pool,
61 		struct dc_3dlut **lut,
62 		struct dc_transfer_func **shaper);
63 
64 bool dcn32_remove_phantom_pipes(struct dc *dc,
65 		struct dc_state *context);
66 
67 void dcn32_add_phantom_pipes(struct dc *dc,
68 		struct dc_state *context,
69 		display_e2e_pipe_params_st *pipes,
70 		unsigned int pipe_cnt,
71 		unsigned int index);
72 
73 bool dcn32_validate_bandwidth(struct dc *dc,
74 		struct dc_state *context,
75 		bool fast_validate);
76 
77 int dcn32_populate_dml_pipes_from_context(
78 	struct dc *dc, struct dc_state *context,
79 	display_e2e_pipe_params_st *pipes,
80 	bool fast_validate);
81 
82 void dcn32_calculate_wm_and_dlg(
83 		struct dc *dc, struct dc_state *context,
84 		display_e2e_pipe_params_st *pipes,
85 		int pipe_cnt,
86 		int vlevel);
87 
88 uint32_t dcn32_helper_calculate_num_ways_for_subvp
89 		(struct dc *dc,
90 		struct dc_state *context);
91 
92 void dcn32_merge_pipes_for_subvp(struct dc *dc,
93 		struct dc_state *context);
94 
95 bool dcn32_all_pipes_have_stream_and_plane(struct dc *dc,
96 		struct dc_state *context);
97 
98 bool dcn32_subvp_in_use(struct dc *dc,
99 		struct dc_state *context);
100 
101 bool dcn32_mpo_in_use(struct dc_state *context);
102 
103 struct pipe_ctx *dcn32_acquire_idle_pipe_for_head_pipe_in_layer(
104 		struct dc_state *state,
105 		const struct resource_pool *pool,
106 		struct dc_stream_state *stream,
107 		struct pipe_ctx *head_pipe);
108 
109 void dcn32_determine_det_override(struct dc_state *context, display_e2e_pipe_params_st *pipes,
110 		bool *is_pipe_split_expected, int pipe_cnt);
111 
112 #endif /* _DCN32_RESOURCE_H_ */
113