1 /* 2 * Copyright 2020 Advanced Micro Devices, Inc. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included in 12 * all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 * 22 * Authors: AMD 23 * 24 */ 25 26 #ifndef _DCN32_RESOURCE_H_ 27 #define _DCN32_RESOURCE_H_ 28 29 #include "core_types.h" 30 31 #define DCN3_2_DET_SEG_SIZE 64 32 33 #define TO_DCN32_RES_POOL(pool)\ 34 container_of(pool, struct dcn32_resource_pool, base) 35 36 struct dcn32_resource_pool { 37 struct resource_pool base; 38 }; 39 40 struct resource_pool *dcn32_create_resource_pool( 41 const struct dc_init_data *init_data, 42 struct dc *dc); 43 44 void dcn32_calculate_dlg_params( 45 struct dc *dc, struct dc_state *context, 46 display_e2e_pipe_params_st *pipes, 47 int pipe_cnt, 48 int vlevel); 49 50 struct panel_cntl *dcn32_panel_cntl_create( 51 const struct panel_cntl_init_data *init_data); 52 53 bool dcn32_acquire_post_bldn_3dlut( 54 struct resource_context *res_ctx, 55 const struct resource_pool *pool, 56 int mpcc_id, 57 struct dc_3dlut **lut, 58 struct dc_transfer_func **shaper); 59 60 bool dcn32_release_post_bldn_3dlut( 61 struct resource_context *res_ctx, 62 const struct resource_pool *pool, 63 struct dc_3dlut **lut, 64 struct dc_transfer_func **shaper); 65 66 bool dcn32_remove_phantom_pipes(struct dc *dc, 67 struct dc_state *context); 68 69 void dcn32_add_phantom_pipes(struct dc *dc, 70 struct dc_state *context, 71 display_e2e_pipe_params_st *pipes, 72 unsigned int pipe_cnt, 73 unsigned int index); 74 75 bool dcn32_validate_bandwidth(struct dc *dc, 76 struct dc_state *context, 77 bool fast_validate); 78 79 int dcn32_populate_dml_pipes_from_context( 80 struct dc *dc, struct dc_state *context, 81 display_e2e_pipe_params_st *pipes, 82 bool fast_validate); 83 84 void dcn32_calculate_wm_and_dlg( 85 struct dc *dc, struct dc_state *context, 86 display_e2e_pipe_params_st *pipes, 87 int pipe_cnt, 88 int vlevel); 89 90 uint32_t dcn32_helper_calculate_num_ways_for_subvp 91 (struct dc *dc, 92 struct dc_state *context); 93 94 void dcn32_merge_pipes_for_subvp(struct dc *dc, 95 struct dc_state *context); 96 97 bool dcn32_all_pipes_have_stream_and_plane(struct dc *dc, 98 struct dc_state *context); 99 100 bool dcn32_subvp_in_use(struct dc *dc, 101 struct dc_state *context); 102 103 void dcn32_update_det_override_for_mpo(struct dc *dc, struct dc_state *context, 104 display_e2e_pipe_params_st *pipes); 105 106 #endif /* _DCN32_RESOURCE_H_ */ 107