1235c6763SAurabindo Pillai /* 2235c6763SAurabindo Pillai * Copyright 2016 Advanced Micro Devices, Inc. 3235c6763SAurabindo Pillai * 4235c6763SAurabindo Pillai * Permission is hereby granted, free of charge, to any person obtaining a 5235c6763SAurabindo Pillai * copy of this software and associated documentation files (the "Software"), 6235c6763SAurabindo Pillai * to deal in the Software without restriction, including without limitation 7235c6763SAurabindo Pillai * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8235c6763SAurabindo Pillai * and/or sell copies of the Software, and to permit persons to whom the 9235c6763SAurabindo Pillai * Software is furnished to do so, subject to the following conditions: 10235c6763SAurabindo Pillai * 11235c6763SAurabindo Pillai * The above copyright notice and this permission notice shall be included in 12235c6763SAurabindo Pillai * all copies or substantial portions of the Software. 13235c6763SAurabindo Pillai * 14235c6763SAurabindo Pillai * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15235c6763SAurabindo Pillai * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16235c6763SAurabindo Pillai * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17235c6763SAurabindo Pillai * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18235c6763SAurabindo Pillai * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19235c6763SAurabindo Pillai * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20235c6763SAurabindo Pillai * OTHER DEALINGS IN THE SOFTWARE. 21235c6763SAurabindo Pillai * 22235c6763SAurabindo Pillai * Authors: AMD 23235c6763SAurabindo Pillai * 24235c6763SAurabindo Pillai */ 25235c6763SAurabindo Pillai 26235c6763SAurabindo Pillai #ifndef __DC_HUBBUB_DCN32_H__ 27235c6763SAurabindo Pillai #define __DC_HUBBUB_DCN32_H__ 28235c6763SAurabindo Pillai 29235c6763SAurabindo Pillai #include "dcn21/dcn21_hubbub.h" 30235c6763SAurabindo Pillai 31235c6763SAurabindo Pillai #define HUBBUB_MASK_SH_LIST_DCN32(mask_sh)\ 32235c6763SAurabindo Pillai HUBBUB_SF(DCHUBBUB_GLOBAL_TIMER_CNTL, DCHUBBUB_GLOBAL_TIMER_ENABLE, mask_sh), \ 33235c6763SAurabindo Pillai HUBBUB_SF(DCHUBBUB_SOFT_RESET, DCHUBBUB_GLOBAL_SOFT_RESET, mask_sh), \ 34235c6763SAurabindo Pillai HUBBUB_SF(DCHUBBUB_ARB_WATERMARK_CHANGE_CNTL, DCHUBBUB_ARB_WATERMARK_CHANGE_REQUEST, mask_sh), \ 35235c6763SAurabindo Pillai HUBBUB_SF(DCHUBBUB_ARB_WATERMARK_CHANGE_CNTL, DCHUBBUB_ARB_WATERMARK_CHANGE_DONE_INTERRUPT_DISABLE, mask_sh), \ 36235c6763SAurabindo Pillai HUBBUB_SF(DCHUBBUB_ARB_DRAM_STATE_CNTL, DCHUBBUB_ARB_ALLOW_SELF_REFRESH_FORCE_VALUE, mask_sh), \ 37235c6763SAurabindo Pillai HUBBUB_SF(DCHUBBUB_ARB_DRAM_STATE_CNTL, DCHUBBUB_ARB_ALLOW_SELF_REFRESH_FORCE_ENABLE, mask_sh), \ 38235c6763SAurabindo Pillai HUBBUB_SF(DCHUBBUB_ARB_DRAM_STATE_CNTL, DCHUBBUB_ARB_ALLOW_PSTATE_CHANGE_FORCE_VALUE, mask_sh), \ 39235c6763SAurabindo Pillai HUBBUB_SF(DCHUBBUB_ARB_DRAM_STATE_CNTL, DCHUBBUB_ARB_ALLOW_PSTATE_CHANGE_FORCE_ENABLE, mask_sh), \ 40235c6763SAurabindo Pillai HUBBUB_SF(DCHUBBUB_ARB_SAT_LEVEL, DCHUBBUB_ARB_SAT_LEVEL, mask_sh), \ 41235c6763SAurabindo Pillai HUBBUB_SF(DCHUBBUB_ARB_DF_REQ_OUTSTAND, DCHUBBUB_ARB_MIN_REQ_OUTSTAND, mask_sh), \ 42dbc2309cSCharlene Liu HUBBUB_SF(DCHUBBUB_ARB_DF_REQ_OUTSTAND, DCHUBBUB_ARB_MAX_REQ_OUTSTAND, mask_sh), \ 43235c6763SAurabindo Pillai HUBBUB_SF(DCHUBBUB_ARB_DATA_URGENCY_WATERMARK_A, DCHUBBUB_ARB_DATA_URGENCY_WATERMARK_A, mask_sh), \ 44235c6763SAurabindo Pillai HUBBUB_SF(DCHUBBUB_ARB_DATA_URGENCY_WATERMARK_B, DCHUBBUB_ARB_DATA_URGENCY_WATERMARK_B, mask_sh), \ 45235c6763SAurabindo Pillai HUBBUB_SF(DCHUBBUB_ARB_DATA_URGENCY_WATERMARK_C, DCHUBBUB_ARB_DATA_URGENCY_WATERMARK_C, mask_sh), \ 46235c6763SAurabindo Pillai HUBBUB_SF(DCHUBBUB_ARB_DATA_URGENCY_WATERMARK_D, DCHUBBUB_ARB_DATA_URGENCY_WATERMARK_D, mask_sh), \ 47235c6763SAurabindo Pillai HUBBUB_MASK_SH_LIST_STUTTER(mask_sh), \ 48235c6763SAurabindo Pillai HUBBUB_SF(DCHUBBUB_GLOBAL_TIMER_CNTL, DCHUBBUB_GLOBAL_TIMER_REFDIV, mask_sh), \ 49235c6763SAurabindo Pillai HUBBUB_SF(DCN_VM_FB_LOCATION_BASE, FB_BASE, mask_sh), \ 50235c6763SAurabindo Pillai HUBBUB_SF(DCN_VM_FB_LOCATION_TOP, FB_TOP, mask_sh), \ 51235c6763SAurabindo Pillai HUBBUB_SF(DCN_VM_FB_OFFSET, FB_OFFSET, mask_sh), \ 52235c6763SAurabindo Pillai HUBBUB_SF(DCN_VM_AGP_BOT, AGP_BOT, mask_sh), \ 53235c6763SAurabindo Pillai HUBBUB_SF(DCN_VM_AGP_TOP, AGP_TOP, mask_sh), \ 54235c6763SAurabindo Pillai HUBBUB_SF(DCN_VM_AGP_BASE, AGP_BASE, mask_sh), \ 55235c6763SAurabindo Pillai HUBBUB_SF(DCHUBBUB_ARB_FRAC_URG_BW_FLIP_A, DCHUBBUB_ARB_FRAC_URG_BW_FLIP_A, mask_sh), \ 56235c6763SAurabindo Pillai HUBBUB_SF(DCHUBBUB_ARB_FRAC_URG_BW_FLIP_B, DCHUBBUB_ARB_FRAC_URG_BW_FLIP_B, mask_sh), \ 57235c6763SAurabindo Pillai HUBBUB_SF(DCHUBBUB_ARB_FRAC_URG_BW_FLIP_C, DCHUBBUB_ARB_FRAC_URG_BW_FLIP_C, mask_sh), \ 58235c6763SAurabindo Pillai HUBBUB_SF(DCHUBBUB_ARB_FRAC_URG_BW_FLIP_D, DCHUBBUB_ARB_FRAC_URG_BW_FLIP_D, mask_sh), \ 59235c6763SAurabindo Pillai HUBBUB_SF(DCHUBBUB_ARB_FRAC_URG_BW_NOM_A, DCHUBBUB_ARB_FRAC_URG_BW_NOM_A, mask_sh), \ 60235c6763SAurabindo Pillai HUBBUB_SF(DCHUBBUB_ARB_FRAC_URG_BW_NOM_B, DCHUBBUB_ARB_FRAC_URG_BW_NOM_B, mask_sh), \ 61235c6763SAurabindo Pillai HUBBUB_SF(DCHUBBUB_ARB_FRAC_URG_BW_NOM_C, DCHUBBUB_ARB_FRAC_URG_BW_NOM_C, mask_sh), \ 62235c6763SAurabindo Pillai HUBBUB_SF(DCHUBBUB_ARB_FRAC_URG_BW_NOM_D, DCHUBBUB_ARB_FRAC_URG_BW_NOM_D, mask_sh), \ 63235c6763SAurabindo Pillai HUBBUB_SF(DCHUBBUB_ARB_REFCYC_PER_TRIP_TO_MEMORY_A, DCHUBBUB_ARB_REFCYC_PER_TRIP_TO_MEMORY_A, mask_sh), \ 64235c6763SAurabindo Pillai HUBBUB_SF(DCHUBBUB_ARB_REFCYC_PER_TRIP_TO_MEMORY_B, DCHUBBUB_ARB_REFCYC_PER_TRIP_TO_MEMORY_B, mask_sh), \ 65235c6763SAurabindo Pillai HUBBUB_SF(DCHUBBUB_ARB_REFCYC_PER_TRIP_TO_MEMORY_C, DCHUBBUB_ARB_REFCYC_PER_TRIP_TO_MEMORY_C, mask_sh), \ 66235c6763SAurabindo Pillai HUBBUB_SF(DCHUBBUB_ARB_REFCYC_PER_TRIP_TO_MEMORY_D, DCHUBBUB_ARB_REFCYC_PER_TRIP_TO_MEMORY_D, mask_sh),\ 67262236b4SAurabindo Pillai HUBBUB_SF(DCHUBBUB_DEBUG_CTRL_0, DET_DEPTH, mask_sh),\ 68235c6763SAurabindo Pillai HUBBUB_SF(DCHUBBUB_DET0_CTRL, DET0_SIZE, mask_sh),\ 69235c6763SAurabindo Pillai HUBBUB_SF(DCHUBBUB_DET0_CTRL, DET0_SIZE_CURRENT, mask_sh),\ 70235c6763SAurabindo Pillai HUBBUB_SF(DCHUBBUB_DET1_CTRL, DET1_SIZE, mask_sh),\ 71235c6763SAurabindo Pillai HUBBUB_SF(DCHUBBUB_DET1_CTRL, DET1_SIZE_CURRENT, mask_sh),\ 72235c6763SAurabindo Pillai HUBBUB_SF(DCHUBBUB_DET2_CTRL, DET2_SIZE, mask_sh),\ 73235c6763SAurabindo Pillai HUBBUB_SF(DCHUBBUB_DET2_CTRL, DET2_SIZE_CURRENT, mask_sh),\ 74235c6763SAurabindo Pillai HUBBUB_SF(DCHUBBUB_DET3_CTRL, DET3_SIZE, mask_sh),\ 75235c6763SAurabindo Pillai HUBBUB_SF(DCHUBBUB_DET3_CTRL, DET3_SIZE_CURRENT, mask_sh),\ 76235c6763SAurabindo Pillai HUBBUB_SF(DCHUBBUB_COMPBUF_CTRL, COMPBUF_SIZE, mask_sh),\ 77235c6763SAurabindo Pillai HUBBUB_SF(DCHUBBUB_COMPBUF_CTRL, COMPBUF_SIZE_CURRENT, mask_sh),\ 78235c6763SAurabindo Pillai HUBBUB_SF(COMPBUF_RESERVED_SPACE, COMPBUF_RESERVED_SPACE_64B, mask_sh),\ 79235c6763SAurabindo Pillai HUBBUB_SF(COMPBUF_RESERVED_SPACE, COMPBUF_RESERVED_SPACE_ZS, mask_sh),\ 80235c6763SAurabindo Pillai HUBBUB_SF(DCHUBBUB_ARB_USR_RETRAINING_CNTL, DCHUBBUB_ARB_ALLOW_USR_RETRAINING_FORCE_VALUE, mask_sh),\ 81235c6763SAurabindo Pillai HUBBUB_SF(DCHUBBUB_ARB_USR_RETRAINING_CNTL, DCHUBBUB_ARB_ALLOW_USR_RETRAINING_FORCE_ENABLE, mask_sh),\ 82235c6763SAurabindo Pillai HUBBUB_SF(DCHUBBUB_ARB_USR_RETRAINING_CNTL, DCHUBBUB_ARB_DO_NOT_FORCE_ALLOW_USR_RETRAINING_DURING_PSTATE_CHANGE_REQUEST, mask_sh),\ 83235c6763SAurabindo Pillai HUBBUB_SF(DCHUBBUB_ARB_USR_RETRAINING_CNTL, DCHUBBUB_ARB_DO_NOT_FORCE_ALLOW_USR_RETRAINING_DURING_PRE_CSTATE, mask_sh),\ 84235c6763SAurabindo Pillai HUBBUB_SF(DCHUBBUB_ARB_USR_RETRAINING_WATERMARK_A, DCHUBBUB_ARB_USR_RETRAINING_WATERMARK_A, mask_sh), \ 85235c6763SAurabindo Pillai HUBBUB_SF(DCHUBBUB_ARB_USR_RETRAINING_WATERMARK_B, DCHUBBUB_ARB_USR_RETRAINING_WATERMARK_B, mask_sh), \ 86235c6763SAurabindo Pillai HUBBUB_SF(DCHUBBUB_ARB_USR_RETRAINING_WATERMARK_C, DCHUBBUB_ARB_USR_RETRAINING_WATERMARK_C, mask_sh), \ 87235c6763SAurabindo Pillai HUBBUB_SF(DCHUBBUB_ARB_USR_RETRAINING_WATERMARK_D, DCHUBBUB_ARB_USR_RETRAINING_WATERMARK_D, mask_sh),\ 88235c6763SAurabindo Pillai HUBBUB_SF(DCHUBBUB_ARB_UCLK_PSTATE_CHANGE_WATERMARK_A, DCHUBBUB_ARB_UCLK_PSTATE_CHANGE_WATERMARK_A, mask_sh),\ 89235c6763SAurabindo Pillai HUBBUB_SF(DCHUBBUB_ARB_UCLK_PSTATE_CHANGE_WATERMARK_B, DCHUBBUB_ARB_UCLK_PSTATE_CHANGE_WATERMARK_B, mask_sh),\ 90235c6763SAurabindo Pillai HUBBUB_SF(DCHUBBUB_ARB_UCLK_PSTATE_CHANGE_WATERMARK_C, DCHUBBUB_ARB_UCLK_PSTATE_CHANGE_WATERMARK_C, mask_sh),\ 91235c6763SAurabindo Pillai HUBBUB_SF(DCHUBBUB_ARB_UCLK_PSTATE_CHANGE_WATERMARK_D, DCHUBBUB_ARB_UCLK_PSTATE_CHANGE_WATERMARK_D, mask_sh),\ 92235c6763SAurabindo Pillai HUBBUB_SF(DCHUBBUB_ARB_FCLK_PSTATE_CHANGE_WATERMARK_A, DCHUBBUB_ARB_FCLK_PSTATE_CHANGE_WATERMARK_A, mask_sh),\ 93235c6763SAurabindo Pillai HUBBUB_SF(DCHUBBUB_ARB_FCLK_PSTATE_CHANGE_WATERMARK_B, DCHUBBUB_ARB_FCLK_PSTATE_CHANGE_WATERMARK_B, mask_sh),\ 94235c6763SAurabindo Pillai HUBBUB_SF(DCHUBBUB_ARB_FCLK_PSTATE_CHANGE_WATERMARK_C, DCHUBBUB_ARB_FCLK_PSTATE_CHANGE_WATERMARK_C, mask_sh),\ 95235c6763SAurabindo Pillai HUBBUB_SF(DCHUBBUB_ARB_FCLK_PSTATE_CHANGE_WATERMARK_D, DCHUBBUB_ARB_FCLK_PSTATE_CHANGE_WATERMARK_D, mask_sh), \ 96235c6763SAurabindo Pillai HUBBUB_SF(DCN_VM_FAULT_ADDR_MSB, DCN_VM_FAULT_ADDR_MSB, mask_sh), \ 97235c6763SAurabindo Pillai HUBBUB_SF(DCN_VM_FAULT_ADDR_LSB, DCN_VM_FAULT_ADDR_LSB, mask_sh), \ 98235c6763SAurabindo Pillai HUBBUB_SF(DCN_VM_FAULT_CNTL, DCN_VM_ERROR_STATUS_CLEAR, mask_sh), \ 99235c6763SAurabindo Pillai HUBBUB_SF(DCN_VM_FAULT_CNTL, DCN_VM_ERROR_STATUS_MODE, mask_sh), \ 100235c6763SAurabindo Pillai HUBBUB_SF(DCN_VM_FAULT_CNTL, DCN_VM_ERROR_INTERRUPT_ENABLE, mask_sh), \ 101235c6763SAurabindo Pillai HUBBUB_SF(DCN_VM_FAULT_CNTL, DCN_VM_RANGE_FAULT_DISABLE, mask_sh), \ 102235c6763SAurabindo Pillai HUBBUB_SF(DCN_VM_FAULT_CNTL, DCN_VM_PRQ_FAULT_DISABLE, mask_sh), \ 103235c6763SAurabindo Pillai HUBBUB_SF(DCN_VM_FAULT_STATUS, DCN_VM_ERROR_STATUS, mask_sh), \ 104235c6763SAurabindo Pillai HUBBUB_SF(DCN_VM_FAULT_STATUS, DCN_VM_ERROR_VMID, mask_sh), \ 105235c6763SAurabindo Pillai HUBBUB_SF(DCN_VM_FAULT_STATUS, DCN_VM_ERROR_TABLE_LEVEL, mask_sh), \ 106235c6763SAurabindo Pillai HUBBUB_SF(DCN_VM_FAULT_STATUS, DCN_VM_ERROR_PIPE, mask_sh), \ 107d97fd7a0SJun Lei HUBBUB_SF(DCN_VM_FAULT_STATUS, DCN_VM_ERROR_INTERRUPT_STATUS, mask_sh),\ 108dbc2309cSCharlene Liu HUBBUB_SF(SDPIF_REQUEST_RATE_LIMIT, SDPIF_REQUEST_RATE_LIMIT, mask_sh),\ 109dbc2309cSCharlene Liu HUBBUB_SF(DCHUBBUB_CLOCK_CNTL, DISPCLK_R_DCHUBBUB_GATE_DIS, mask_sh),\ 110dbc2309cSCharlene Liu HUBBUB_SF(DCHUBBUB_CLOCK_CNTL, DCFCLK_R_DCHUBBUB_GATE_DIS, mask_sh),\ 111dbc2309cSCharlene Liu HUBBUB_SF(DCHUBBUB_SDPIF_CFG0, SDPIF_PORT_CONTROL, mask_sh),\ 112dbc2309cSCharlene Liu HUBBUB_SF(DCHUBBUB_SDPIF_CFG1, SDPIF_MAX_NUM_OUTSTANDING, mask_sh),\ 113dbc2309cSCharlene Liu HUBBUB_SF(DCHUBBUB_MEM_PWR_MODE_CTRL, DET_MEM_PWR_LS_MODE, mask_sh) 114dbc2309cSCharlene Liu 115dbc2309cSCharlene Liu 116235c6763SAurabindo Pillai 1170c41021cSCharlene Liu bool hubbub32_program_urgent_watermarks( 1180c41021cSCharlene Liu struct hubbub *hubbub, 1190c41021cSCharlene Liu struct dcn_watermark_set *watermarks, 1200c41021cSCharlene Liu unsigned int refclk_mhz, 1210c41021cSCharlene Liu bool safe_to_lower); 1220c41021cSCharlene Liu 1230c41021cSCharlene Liu bool hubbub32_program_stutter_watermarks( 1240c41021cSCharlene Liu struct hubbub *hubbub, 1250c41021cSCharlene Liu struct dcn_watermark_set *watermarks, 1260c41021cSCharlene Liu unsigned int refclk_mhz, 1270c41021cSCharlene Liu bool safe_to_lower); 1280c41021cSCharlene Liu 1290c41021cSCharlene Liu bool hubbub32_program_pstate_watermarks( 1300c41021cSCharlene Liu struct hubbub *hubbub, 1310c41021cSCharlene Liu struct dcn_watermark_set *watermarks, 1320c41021cSCharlene Liu unsigned int refclk_mhz, 1330c41021cSCharlene Liu bool safe_to_lower); 1340c41021cSCharlene Liu 1350c41021cSCharlene Liu bool hubbub32_program_usr_watermarks( 1360c41021cSCharlene Liu struct hubbub *hubbub, 1370c41021cSCharlene Liu struct dcn_watermark_set *watermarks, 1380c41021cSCharlene Liu unsigned int refclk_mhz, 1390c41021cSCharlene Liu bool safe_to_lower); 1400c41021cSCharlene Liu 1410c41021cSCharlene Liu void hubbub32_force_usr_retraining_allow(struct hubbub *hubbub, bool allow); 1420c41021cSCharlene Liu 1430c41021cSCharlene Liu void hubbub32_force_wm_propagate_to_pipes(struct hubbub *hubbub); 1440c41021cSCharlene Liu 145*6884b0e4SArthur Grillo void hubbub32_init(struct hubbub *hubbub); 146*6884b0e4SArthur Grillo 1470c41021cSCharlene Liu void dcn32_program_det_size(struct hubbub *hubbub, int hubp_inst, unsigned int det_buffer_size_in_kbyte); 148235c6763SAurabindo Pillai 149235c6763SAurabindo Pillai void hubbub32_construct(struct dcn20_hubbub *hubbub2, 150235c6763SAurabindo Pillai struct dc_context *ctx, 151235c6763SAurabindo Pillai const struct dcn_hubbub_registers *hubbub_regs, 152235c6763SAurabindo Pillai const struct dcn_hubbub_shift *hubbub_shift, 153235c6763SAurabindo Pillai const struct dcn_hubbub_mask *hubbub_mask, 154235c6763SAurabindo Pillai int det_size_kb, 155235c6763SAurabindo Pillai int pixel_chunk_size_kb, 156235c6763SAurabindo Pillai int config_return_buffer_size_kb); 157235c6763SAurabindo Pillai 158d97fd7a0SJun Lei void hubbub32_set_request_limit(struct hubbub *hubbub, int umc_count, int words_per_umc); 159d97fd7a0SJun Lei 160235c6763SAurabindo Pillai #endif 161