1*110d3968SNicholas Kazlauskas /* 2*110d3968SNicholas Kazlauskas * Copyright 2012-15 Advanced Micro Devices, Inc. 3*110d3968SNicholas Kazlauskas * 4*110d3968SNicholas Kazlauskas * Permission is hereby granted, free of charge, to any person obtaining a 5*110d3968SNicholas Kazlauskas * copy of this software and associated documentation files (the "Software"), 6*110d3968SNicholas Kazlauskas * to deal in the Software without restriction, including without limitation 7*110d3968SNicholas Kazlauskas * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8*110d3968SNicholas Kazlauskas * and/or sell copies of the Software, and to permit persons to whom the 9*110d3968SNicholas Kazlauskas * Software is furnished to do so, subject to the following conditions: 10*110d3968SNicholas Kazlauskas * 11*110d3968SNicholas Kazlauskas * The above copyright notice and this permission notice shall be included in 12*110d3968SNicholas Kazlauskas * all copies or substantial portions of the Software. 13*110d3968SNicholas Kazlauskas * 14*110d3968SNicholas Kazlauskas * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15*110d3968SNicholas Kazlauskas * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16*110d3968SNicholas Kazlauskas * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17*110d3968SNicholas Kazlauskas * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18*110d3968SNicholas Kazlauskas * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19*110d3968SNicholas Kazlauskas * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20*110d3968SNicholas Kazlauskas * OTHER DEALINGS IN THE SOFTWARE. 21*110d3968SNicholas Kazlauskas * 22*110d3968SNicholas Kazlauskas * Authors: AMD 23*110d3968SNicholas Kazlauskas * 24*110d3968SNicholas Kazlauskas */ 25*110d3968SNicholas Kazlauskas 26*110d3968SNicholas Kazlauskas #ifndef __DC_OPTC_DCN31_H__ 27*110d3968SNicholas Kazlauskas #define __DC_OPTC_DCN31_H__ 28*110d3968SNicholas Kazlauskas 29*110d3968SNicholas Kazlauskas #include "dcn10/dcn10_optc.h" 30*110d3968SNicholas Kazlauskas 31*110d3968SNicholas Kazlauskas #define OPTC_COMMON_REG_LIST_DCN3_1(inst) \ 32*110d3968SNicholas Kazlauskas SRI(OTG_VSTARTUP_PARAM, OTG, inst),\ 33*110d3968SNicholas Kazlauskas SRI(OTG_VUPDATE_PARAM, OTG, inst),\ 34*110d3968SNicholas Kazlauskas SRI(OTG_VREADY_PARAM, OTG, inst),\ 35*110d3968SNicholas Kazlauskas SRI(OTG_MASTER_UPDATE_LOCK, OTG, inst),\ 36*110d3968SNicholas Kazlauskas SRI(OTG_GLOBAL_CONTROL0, OTG, inst),\ 37*110d3968SNicholas Kazlauskas SRI(OTG_GLOBAL_CONTROL1, OTG, inst),\ 38*110d3968SNicholas Kazlauskas SRI(OTG_GLOBAL_CONTROL2, OTG, inst),\ 39*110d3968SNicholas Kazlauskas SRI(OTG_GLOBAL_CONTROL4, OTG, inst),\ 40*110d3968SNicholas Kazlauskas SRI(OTG_DOUBLE_BUFFER_CONTROL, OTG, inst),\ 41*110d3968SNicholas Kazlauskas SRI(OTG_H_TOTAL, OTG, inst),\ 42*110d3968SNicholas Kazlauskas SRI(OTG_H_BLANK_START_END, OTG, inst),\ 43*110d3968SNicholas Kazlauskas SRI(OTG_H_SYNC_A, OTG, inst),\ 44*110d3968SNicholas Kazlauskas SRI(OTG_H_SYNC_A_CNTL, OTG, inst),\ 45*110d3968SNicholas Kazlauskas SRI(OTG_H_TIMING_CNTL, OTG, inst),\ 46*110d3968SNicholas Kazlauskas SRI(OTG_V_TOTAL, OTG, inst),\ 47*110d3968SNicholas Kazlauskas SRI(OTG_V_BLANK_START_END, OTG, inst),\ 48*110d3968SNicholas Kazlauskas SRI(OTG_V_SYNC_A, OTG, inst),\ 49*110d3968SNicholas Kazlauskas SRI(OTG_V_SYNC_A_CNTL, OTG, inst),\ 50*110d3968SNicholas Kazlauskas SRI(OTG_CONTROL, OTG, inst),\ 51*110d3968SNicholas Kazlauskas SRI(OTG_STEREO_CONTROL, OTG, inst),\ 52*110d3968SNicholas Kazlauskas SRI(OTG_3D_STRUCTURE_CONTROL, OTG, inst),\ 53*110d3968SNicholas Kazlauskas SRI(OTG_STEREO_STATUS, OTG, inst),\ 54*110d3968SNicholas Kazlauskas SRI(OTG_V_TOTAL_MAX, OTG, inst),\ 55*110d3968SNicholas Kazlauskas SRI(OTG_V_TOTAL_MIN, OTG, inst),\ 56*110d3968SNicholas Kazlauskas SRI(OTG_V_TOTAL_CONTROL, OTG, inst),\ 57*110d3968SNicholas Kazlauskas SRI(OTG_TRIGA_CNTL, OTG, inst),\ 58*110d3968SNicholas Kazlauskas SRI(OTG_FORCE_COUNT_NOW_CNTL, OTG, inst),\ 59*110d3968SNicholas Kazlauskas SRI(OTG_STATIC_SCREEN_CONTROL, OTG, inst),\ 60*110d3968SNicholas Kazlauskas SRI(OTG_STATUS_FRAME_COUNT, OTG, inst),\ 61*110d3968SNicholas Kazlauskas SRI(OTG_STATUS, OTG, inst),\ 62*110d3968SNicholas Kazlauskas SRI(OTG_STATUS_POSITION, OTG, inst),\ 63*110d3968SNicholas Kazlauskas SRI(OTG_NOM_VERT_POSITION, OTG, inst),\ 64*110d3968SNicholas Kazlauskas SRI(OTG_M_CONST_DTO0, OTG, inst),\ 65*110d3968SNicholas Kazlauskas SRI(OTG_M_CONST_DTO1, OTG, inst),\ 66*110d3968SNicholas Kazlauskas SRI(OTG_CLOCK_CONTROL, OTG, inst),\ 67*110d3968SNicholas Kazlauskas SRI(OTG_VERTICAL_INTERRUPT0_CONTROL, OTG, inst),\ 68*110d3968SNicholas Kazlauskas SRI(OTG_VERTICAL_INTERRUPT0_POSITION, OTG, inst),\ 69*110d3968SNicholas Kazlauskas SRI(OTG_VERTICAL_INTERRUPT1_CONTROL, OTG, inst),\ 70*110d3968SNicholas Kazlauskas SRI(OTG_VERTICAL_INTERRUPT1_POSITION, OTG, inst),\ 71*110d3968SNicholas Kazlauskas SRI(OTG_VERTICAL_INTERRUPT2_CONTROL, OTG, inst),\ 72*110d3968SNicholas Kazlauskas SRI(OTG_VERTICAL_INTERRUPT2_POSITION, OTG, inst),\ 73*110d3968SNicholas Kazlauskas SRI(OPTC_INPUT_CLOCK_CONTROL, ODM, inst),\ 74*110d3968SNicholas Kazlauskas SRI(OPTC_DATA_SOURCE_SELECT, ODM, inst),\ 75*110d3968SNicholas Kazlauskas SRI(OPTC_INPUT_GLOBAL_CONTROL, ODM, inst),\ 76*110d3968SNicholas Kazlauskas SRI(CONTROL, VTG, inst),\ 77*110d3968SNicholas Kazlauskas SRI(OTG_VERT_SYNC_CONTROL, OTG, inst),\ 78*110d3968SNicholas Kazlauskas SRI(OTG_GSL_CONTROL, OTG, inst),\ 79*110d3968SNicholas Kazlauskas SRI(OTG_CRC_CNTL, OTG, inst),\ 80*110d3968SNicholas Kazlauskas SRI(OTG_CRC0_DATA_RG, OTG, inst),\ 81*110d3968SNicholas Kazlauskas SRI(OTG_CRC0_DATA_B, OTG, inst),\ 82*110d3968SNicholas Kazlauskas SRI(OTG_CRC0_WINDOWA_X_CONTROL, OTG, inst),\ 83*110d3968SNicholas Kazlauskas SRI(OTG_CRC0_WINDOWA_Y_CONTROL, OTG, inst),\ 84*110d3968SNicholas Kazlauskas SRI(OTG_CRC0_WINDOWB_X_CONTROL, OTG, inst),\ 85*110d3968SNicholas Kazlauskas SRI(OTG_CRC0_WINDOWB_Y_CONTROL, OTG, inst),\ 86*110d3968SNicholas Kazlauskas SR(GSL_SOURCE_SELECT),\ 87*110d3968SNicholas Kazlauskas SRI(OTG_TRIGA_MANUAL_TRIG, OTG, inst),\ 88*110d3968SNicholas Kazlauskas SRI(OTG_GLOBAL_CONTROL1, OTG, inst),\ 89*110d3968SNicholas Kazlauskas SRI(OTG_GLOBAL_CONTROL2, OTG, inst),\ 90*110d3968SNicholas Kazlauskas SRI(OTG_GSL_WINDOW_X, OTG, inst),\ 91*110d3968SNicholas Kazlauskas SRI(OTG_GSL_WINDOW_Y, OTG, inst),\ 92*110d3968SNicholas Kazlauskas SRI(OTG_VUPDATE_KEEPOUT, OTG, inst),\ 93*110d3968SNicholas Kazlauskas SRI(OTG_DSC_START_POSITION, OTG, inst),\ 94*110d3968SNicholas Kazlauskas SRI(OTG_DRR_TRIGGER_WINDOW, OTG, inst),\ 95*110d3968SNicholas Kazlauskas SRI(OTG_DRR_V_TOTAL_CHANGE, OTG, inst),\ 96*110d3968SNicholas Kazlauskas SRI(OPTC_DATA_FORMAT_CONTROL, ODM, inst),\ 97*110d3968SNicholas Kazlauskas SRI(OPTC_BYTES_PER_PIXEL, ODM, inst),\ 98*110d3968SNicholas Kazlauskas SRI(OPTC_WIDTH_CONTROL, ODM, inst),\ 99*110d3968SNicholas Kazlauskas SRI(OPTC_MEMORY_CONFIG, ODM, inst),\ 100*110d3968SNicholas Kazlauskas SRI(OTG_CRC_CNTL2, OTG, inst),\ 101*110d3968SNicholas Kazlauskas SR(DWB_SOURCE_SELECT) 102*110d3968SNicholas Kazlauskas 103*110d3968SNicholas Kazlauskas #define OPTC_COMMON_MASK_SH_LIST_DCN3_1(mask_sh)\ 104*110d3968SNicholas Kazlauskas SF(OTG0_OTG_VSTARTUP_PARAM, VSTARTUP_START, mask_sh),\ 105*110d3968SNicholas Kazlauskas SF(OTG0_OTG_VUPDATE_PARAM, VUPDATE_OFFSET, mask_sh),\ 106*110d3968SNicholas Kazlauskas SF(OTG0_OTG_VUPDATE_PARAM, VUPDATE_WIDTH, mask_sh),\ 107*110d3968SNicholas Kazlauskas SF(OTG0_OTG_VREADY_PARAM, VREADY_OFFSET, mask_sh),\ 108*110d3968SNicholas Kazlauskas SF(OTG0_OTG_MASTER_UPDATE_LOCK, OTG_MASTER_UPDATE_LOCK, mask_sh),\ 109*110d3968SNicholas Kazlauskas SF(OTG0_OTG_MASTER_UPDATE_LOCK, UPDATE_LOCK_STATUS, mask_sh),\ 110*110d3968SNicholas Kazlauskas SF(OTG0_OTG_GLOBAL_CONTROL0, MASTER_UPDATE_LOCK_DB_START_X, mask_sh),\ 111*110d3968SNicholas Kazlauskas SF(OTG0_OTG_GLOBAL_CONTROL0, MASTER_UPDATE_LOCK_DB_END_X, mask_sh),\ 112*110d3968SNicholas Kazlauskas SF(OTG0_OTG_GLOBAL_CONTROL0, MASTER_UPDATE_LOCK_DB_EN, mask_sh),\ 113*110d3968SNicholas Kazlauskas SF(OTG0_OTG_GLOBAL_CONTROL1, MASTER_UPDATE_LOCK_DB_START_Y, mask_sh),\ 114*110d3968SNicholas Kazlauskas SF(OTG0_OTG_GLOBAL_CONTROL1, MASTER_UPDATE_LOCK_DB_END_Y, mask_sh),\ 115*110d3968SNicholas Kazlauskas SF(OTG0_OTG_GLOBAL_CONTROL2, OTG_MASTER_UPDATE_LOCK_SEL, mask_sh),\ 116*110d3968SNicholas Kazlauskas SF(OTG0_OTG_GLOBAL_CONTROL4, DIG_UPDATE_POSITION_X, mask_sh),\ 117*110d3968SNicholas Kazlauskas SF(OTG0_OTG_GLOBAL_CONTROL4, DIG_UPDATE_POSITION_Y, mask_sh),\ 118*110d3968SNicholas Kazlauskas SF(OTG0_OTG_DOUBLE_BUFFER_CONTROL, OTG_UPDATE_PENDING, mask_sh),\ 119*110d3968SNicholas Kazlauskas SF(OTG0_OTG_H_TOTAL, OTG_H_TOTAL, mask_sh),\ 120*110d3968SNicholas Kazlauskas SF(OTG0_OTG_H_BLANK_START_END, OTG_H_BLANK_START, mask_sh),\ 121*110d3968SNicholas Kazlauskas SF(OTG0_OTG_H_BLANK_START_END, OTG_H_BLANK_END, mask_sh),\ 122*110d3968SNicholas Kazlauskas SF(OTG0_OTG_H_SYNC_A, OTG_H_SYNC_A_START, mask_sh),\ 123*110d3968SNicholas Kazlauskas SF(OTG0_OTG_H_SYNC_A, OTG_H_SYNC_A_END, mask_sh),\ 124*110d3968SNicholas Kazlauskas SF(OTG0_OTG_H_SYNC_A_CNTL, OTG_H_SYNC_A_POL, mask_sh),\ 125*110d3968SNicholas Kazlauskas SF(OTG0_OTG_V_TOTAL, OTG_V_TOTAL, mask_sh),\ 126*110d3968SNicholas Kazlauskas SF(OTG0_OTG_V_BLANK_START_END, OTG_V_BLANK_START, mask_sh),\ 127*110d3968SNicholas Kazlauskas SF(OTG0_OTG_V_BLANK_START_END, OTG_V_BLANK_END, mask_sh),\ 128*110d3968SNicholas Kazlauskas SF(OTG0_OTG_V_SYNC_A, OTG_V_SYNC_A_START, mask_sh),\ 129*110d3968SNicholas Kazlauskas SF(OTG0_OTG_V_SYNC_A, OTG_V_SYNC_A_END, mask_sh),\ 130*110d3968SNicholas Kazlauskas SF(OTG0_OTG_V_SYNC_A_CNTL, OTG_V_SYNC_A_POL, mask_sh),\ 131*110d3968SNicholas Kazlauskas SF(OTG0_OTG_V_SYNC_A_CNTL, OTG_V_SYNC_MODE, mask_sh),\ 132*110d3968SNicholas Kazlauskas SF(OTG0_OTG_CONTROL, OTG_MASTER_EN, mask_sh),\ 133*110d3968SNicholas Kazlauskas SF(OTG0_OTG_CONTROL, OTG_START_POINT_CNTL, mask_sh),\ 134*110d3968SNicholas Kazlauskas SF(OTG0_OTG_CONTROL, OTG_DISABLE_POINT_CNTL, mask_sh),\ 135*110d3968SNicholas Kazlauskas SF(OTG0_OTG_CONTROL, OTG_FIELD_NUMBER_CNTL, mask_sh),\ 136*110d3968SNicholas Kazlauskas SF(OTG0_OTG_CONTROL, OTG_OUT_MUX, mask_sh),\ 137*110d3968SNicholas Kazlauskas SF(OTG0_OTG_STEREO_CONTROL, OTG_STEREO_EN, mask_sh),\ 138*110d3968SNicholas Kazlauskas SF(OTG0_OTG_STEREO_CONTROL, OTG_STEREO_SYNC_OUTPUT_LINE_NUM, mask_sh),\ 139*110d3968SNicholas Kazlauskas SF(OTG0_OTG_STEREO_CONTROL, OTG_STEREO_SYNC_OUTPUT_POLARITY, mask_sh),\ 140*110d3968SNicholas Kazlauskas SF(OTG0_OTG_STEREO_CONTROL, OTG_STEREO_EYE_FLAG_POLARITY, mask_sh),\ 141*110d3968SNicholas Kazlauskas SF(OTG0_OTG_STEREO_CONTROL, OTG_DISABLE_STEREOSYNC_OUTPUT_FOR_DP, mask_sh),\ 142*110d3968SNicholas Kazlauskas SF(OTG0_OTG_STEREO_STATUS, OTG_STEREO_CURRENT_EYE, mask_sh),\ 143*110d3968SNicholas Kazlauskas SF(OTG0_OTG_3D_STRUCTURE_CONTROL, OTG_3D_STRUCTURE_EN, mask_sh),\ 144*110d3968SNicholas Kazlauskas SF(OTG0_OTG_3D_STRUCTURE_CONTROL, OTG_3D_STRUCTURE_V_UPDATE_MODE, mask_sh),\ 145*110d3968SNicholas Kazlauskas SF(OTG0_OTG_3D_STRUCTURE_CONTROL, OTG_3D_STRUCTURE_STEREO_SEL_OVR, mask_sh),\ 146*110d3968SNicholas Kazlauskas SF(OTG0_OTG_V_TOTAL_MAX, OTG_V_TOTAL_MAX, mask_sh),\ 147*110d3968SNicholas Kazlauskas SF(OTG0_OTG_V_TOTAL_MIN, OTG_V_TOTAL_MIN, mask_sh),\ 148*110d3968SNicholas Kazlauskas SF(OTG0_OTG_V_TOTAL_CONTROL, OTG_V_TOTAL_MIN_SEL, mask_sh),\ 149*110d3968SNicholas Kazlauskas SF(OTG0_OTG_V_TOTAL_CONTROL, OTG_V_TOTAL_MAX_SEL, mask_sh),\ 150*110d3968SNicholas Kazlauskas SF(OTG0_OTG_V_TOTAL_CONTROL, OTG_FORCE_LOCK_ON_EVENT, mask_sh),\ 151*110d3968SNicholas Kazlauskas SF(OTG0_OTG_V_TOTAL_CONTROL, OTG_SET_V_TOTAL_MIN_MASK, mask_sh),\ 152*110d3968SNicholas Kazlauskas SF(OTG0_OTG_V_TOTAL_CONTROL, OTG_VTOTAL_MID_REPLACING_MIN_EN, mask_sh),\ 153*110d3968SNicholas Kazlauskas SF(OTG0_OTG_V_TOTAL_CONTROL, OTG_VTOTAL_MID_REPLACING_MAX_EN, mask_sh),\ 154*110d3968SNicholas Kazlauskas SF(OTG0_OTG_FORCE_COUNT_NOW_CNTL, OTG_FORCE_COUNT_NOW_CLEAR, mask_sh),\ 155*110d3968SNicholas Kazlauskas SF(OTG0_OTG_FORCE_COUNT_NOW_CNTL, OTG_FORCE_COUNT_NOW_MODE, mask_sh),\ 156*110d3968SNicholas Kazlauskas SF(OTG0_OTG_FORCE_COUNT_NOW_CNTL, OTG_FORCE_COUNT_NOW_OCCURRED, mask_sh),\ 157*110d3968SNicholas Kazlauskas SF(OTG0_OTG_TRIGA_CNTL, OTG_TRIGA_SOURCE_SELECT, mask_sh),\ 158*110d3968SNicholas Kazlauskas SF(OTG0_OTG_TRIGA_CNTL, OTG_TRIGA_SOURCE_PIPE_SELECT, mask_sh),\ 159*110d3968SNicholas Kazlauskas SF(OTG0_OTG_TRIGA_CNTL, OTG_TRIGA_RISING_EDGE_DETECT_CNTL, mask_sh),\ 160*110d3968SNicholas Kazlauskas SF(OTG0_OTG_TRIGA_CNTL, OTG_TRIGA_FALLING_EDGE_DETECT_CNTL, mask_sh),\ 161*110d3968SNicholas Kazlauskas SF(OTG0_OTG_TRIGA_CNTL, OTG_TRIGA_POLARITY_SELECT, mask_sh),\ 162*110d3968SNicholas Kazlauskas SF(OTG0_OTG_TRIGA_CNTL, OTG_TRIGA_FREQUENCY_SELECT, mask_sh),\ 163*110d3968SNicholas Kazlauskas SF(OTG0_OTG_TRIGA_CNTL, OTG_TRIGA_DELAY, mask_sh),\ 164*110d3968SNicholas Kazlauskas SF(OTG0_OTG_TRIGA_CNTL, OTG_TRIGA_CLEAR, mask_sh),\ 165*110d3968SNicholas Kazlauskas SF(OTG0_OTG_STATIC_SCREEN_CONTROL, OTG_STATIC_SCREEN_EVENT_MASK, mask_sh),\ 166*110d3968SNicholas Kazlauskas SF(OTG0_OTG_STATIC_SCREEN_CONTROL, OTG_STATIC_SCREEN_FRAME_COUNT, mask_sh),\ 167*110d3968SNicholas Kazlauskas SF(OTG0_OTG_STATUS_FRAME_COUNT, OTG_FRAME_COUNT, mask_sh),\ 168*110d3968SNicholas Kazlauskas SF(OTG0_OTG_STATUS, OTG_V_BLANK, mask_sh),\ 169*110d3968SNicholas Kazlauskas SF(OTG0_OTG_STATUS, OTG_V_ACTIVE_DISP, mask_sh),\ 170*110d3968SNicholas Kazlauskas SF(OTG0_OTG_STATUS_POSITION, OTG_HORZ_COUNT, mask_sh),\ 171*110d3968SNicholas Kazlauskas SF(OTG0_OTG_STATUS_POSITION, OTG_VERT_COUNT, mask_sh),\ 172*110d3968SNicholas Kazlauskas SF(OTG0_OTG_NOM_VERT_POSITION, OTG_VERT_COUNT_NOM, mask_sh),\ 173*110d3968SNicholas Kazlauskas SF(OTG0_OTG_M_CONST_DTO0, OTG_M_CONST_DTO_PHASE, mask_sh),\ 174*110d3968SNicholas Kazlauskas SF(OTG0_OTG_M_CONST_DTO1, OTG_M_CONST_DTO_MODULO, mask_sh),\ 175*110d3968SNicholas Kazlauskas SF(OTG0_OTG_CLOCK_CONTROL, OTG_BUSY, mask_sh),\ 176*110d3968SNicholas Kazlauskas SF(OTG0_OTG_CLOCK_CONTROL, OTG_CLOCK_EN, mask_sh),\ 177*110d3968SNicholas Kazlauskas SF(OTG0_OTG_CLOCK_CONTROL, OTG_CLOCK_ON, mask_sh),\ 178*110d3968SNicholas Kazlauskas SF(OTG0_OTG_CLOCK_CONTROL, OTG_CLOCK_GATE_DIS, mask_sh),\ 179*110d3968SNicholas Kazlauskas SF(OTG0_OTG_VERTICAL_INTERRUPT0_CONTROL, OTG_VERTICAL_INTERRUPT0_INT_ENABLE, mask_sh),\ 180*110d3968SNicholas Kazlauskas SF(OTG0_OTG_VERTICAL_INTERRUPT0_POSITION, OTG_VERTICAL_INTERRUPT0_LINE_START, mask_sh),\ 181*110d3968SNicholas Kazlauskas SF(OTG0_OTG_VERTICAL_INTERRUPT0_POSITION, OTG_VERTICAL_INTERRUPT0_LINE_END, mask_sh),\ 182*110d3968SNicholas Kazlauskas SF(OTG0_OTG_VERTICAL_INTERRUPT1_CONTROL, OTG_VERTICAL_INTERRUPT1_INT_ENABLE, mask_sh),\ 183*110d3968SNicholas Kazlauskas SF(OTG0_OTG_VERTICAL_INTERRUPT1_POSITION, OTG_VERTICAL_INTERRUPT1_LINE_START, mask_sh),\ 184*110d3968SNicholas Kazlauskas SF(OTG0_OTG_VERTICAL_INTERRUPT2_CONTROL, OTG_VERTICAL_INTERRUPT2_INT_ENABLE, mask_sh),\ 185*110d3968SNicholas Kazlauskas SF(OTG0_OTG_VERTICAL_INTERRUPT2_POSITION, OTG_VERTICAL_INTERRUPT2_LINE_START, mask_sh),\ 186*110d3968SNicholas Kazlauskas SF(ODM0_OPTC_INPUT_CLOCK_CONTROL, OPTC_INPUT_CLK_EN, mask_sh),\ 187*110d3968SNicholas Kazlauskas SF(ODM0_OPTC_INPUT_CLOCK_CONTROL, OPTC_INPUT_CLK_ON, mask_sh),\ 188*110d3968SNicholas Kazlauskas SF(ODM0_OPTC_INPUT_CLOCK_CONTROL, OPTC_INPUT_CLK_GATE_DIS, mask_sh),\ 189*110d3968SNicholas Kazlauskas SF(ODM0_OPTC_INPUT_GLOBAL_CONTROL, OPTC_UNDERFLOW_OCCURRED_STATUS, mask_sh),\ 190*110d3968SNicholas Kazlauskas SF(ODM0_OPTC_INPUT_GLOBAL_CONTROL, OPTC_UNDERFLOW_CLEAR, mask_sh),\ 191*110d3968SNicholas Kazlauskas SF(VTG0_CONTROL, VTG0_ENABLE, mask_sh),\ 192*110d3968SNicholas Kazlauskas SF(VTG0_CONTROL, VTG0_FP2, mask_sh),\ 193*110d3968SNicholas Kazlauskas SF(VTG0_CONTROL, VTG0_VCOUNT_INIT, mask_sh),\ 194*110d3968SNicholas Kazlauskas SF(OTG0_OTG_VERT_SYNC_CONTROL, OTG_FORCE_VSYNC_NEXT_LINE_OCCURRED, mask_sh),\ 195*110d3968SNicholas Kazlauskas SF(OTG0_OTG_VERT_SYNC_CONTROL, OTG_FORCE_VSYNC_NEXT_LINE_CLEAR, mask_sh),\ 196*110d3968SNicholas Kazlauskas SF(OTG0_OTG_VERT_SYNC_CONTROL, OTG_AUTO_FORCE_VSYNC_MODE, mask_sh),\ 197*110d3968SNicholas Kazlauskas SF(OTG0_OTG_GSL_CONTROL, OTG_GSL0_EN, mask_sh),\ 198*110d3968SNicholas Kazlauskas SF(OTG0_OTG_GSL_CONTROL, OTG_GSL1_EN, mask_sh),\ 199*110d3968SNicholas Kazlauskas SF(OTG0_OTG_GSL_CONTROL, OTG_GSL2_EN, mask_sh),\ 200*110d3968SNicholas Kazlauskas SF(OTG0_OTG_GSL_CONTROL, OTG_GSL_MASTER_EN, mask_sh),\ 201*110d3968SNicholas Kazlauskas SF(OTG0_OTG_GSL_CONTROL, OTG_GSL_FORCE_DELAY, mask_sh),\ 202*110d3968SNicholas Kazlauskas SF(OTG0_OTG_GSL_CONTROL, OTG_GSL_CHECK_ALL_FIELDS, mask_sh),\ 203*110d3968SNicholas Kazlauskas SF(OTG0_OTG_CRC_CNTL, OTG_CRC_CONT_EN, mask_sh),\ 204*110d3968SNicholas Kazlauskas SF(OTG0_OTG_CRC_CNTL, OTG_CRC0_SELECT, mask_sh),\ 205*110d3968SNicholas Kazlauskas SF(OTG0_OTG_CRC_CNTL, OTG_CRC_EN, mask_sh),\ 206*110d3968SNicholas Kazlauskas SF(OTG0_OTG_CRC0_DATA_RG, CRC0_R_CR, mask_sh),\ 207*110d3968SNicholas Kazlauskas SF(OTG0_OTG_CRC0_DATA_RG, CRC0_G_Y, mask_sh),\ 208*110d3968SNicholas Kazlauskas SF(OTG0_OTG_CRC0_DATA_B, CRC0_B_CB, mask_sh),\ 209*110d3968SNicholas Kazlauskas SF(OTG0_OTG_CRC0_WINDOWA_X_CONTROL, OTG_CRC0_WINDOWA_X_START, mask_sh),\ 210*110d3968SNicholas Kazlauskas SF(OTG0_OTG_CRC0_WINDOWA_X_CONTROL, OTG_CRC0_WINDOWA_X_END, mask_sh),\ 211*110d3968SNicholas Kazlauskas SF(OTG0_OTG_CRC0_WINDOWA_Y_CONTROL, OTG_CRC0_WINDOWA_Y_START, mask_sh),\ 212*110d3968SNicholas Kazlauskas SF(OTG0_OTG_CRC0_WINDOWA_Y_CONTROL, OTG_CRC0_WINDOWA_Y_END, mask_sh),\ 213*110d3968SNicholas Kazlauskas SF(OTG0_OTG_CRC0_WINDOWB_X_CONTROL, OTG_CRC0_WINDOWB_X_START, mask_sh),\ 214*110d3968SNicholas Kazlauskas SF(OTG0_OTG_CRC0_WINDOWB_X_CONTROL, OTG_CRC0_WINDOWB_X_END, mask_sh),\ 215*110d3968SNicholas Kazlauskas SF(OTG0_OTG_CRC0_WINDOWB_Y_CONTROL, OTG_CRC0_WINDOWB_Y_START, mask_sh),\ 216*110d3968SNicholas Kazlauskas SF(OTG0_OTG_CRC0_WINDOWB_Y_CONTROL, OTG_CRC0_WINDOWB_Y_END, mask_sh),\ 217*110d3968SNicholas Kazlauskas SF(OTG0_OTG_TRIGA_MANUAL_TRIG, OTG_TRIGA_MANUAL_TRIG, mask_sh),\ 218*110d3968SNicholas Kazlauskas SF(GSL_SOURCE_SELECT, GSL0_READY_SOURCE_SEL, mask_sh),\ 219*110d3968SNicholas Kazlauskas SF(GSL_SOURCE_SELECT, GSL1_READY_SOURCE_SEL, mask_sh),\ 220*110d3968SNicholas Kazlauskas SF(GSL_SOURCE_SELECT, GSL2_READY_SOURCE_SEL, mask_sh),\ 221*110d3968SNicholas Kazlauskas SF(OTG0_OTG_GLOBAL_CONTROL2, MANUAL_FLOW_CONTROL_SEL, mask_sh),\ 222*110d3968SNicholas Kazlauskas SF(OTG0_OTG_GLOBAL_CONTROL2, GLOBAL_UPDATE_LOCK_EN, mask_sh),\ 223*110d3968SNicholas Kazlauskas SF(OTG0_OTG_GSL_WINDOW_X, OTG_GSL_WINDOW_START_X, mask_sh),\ 224*110d3968SNicholas Kazlauskas SF(OTG0_OTG_GSL_WINDOW_X, OTG_GSL_WINDOW_END_X, mask_sh), \ 225*110d3968SNicholas Kazlauskas SF(OTG0_OTG_GSL_WINDOW_Y, OTG_GSL_WINDOW_START_Y, mask_sh),\ 226*110d3968SNicholas Kazlauskas SF(OTG0_OTG_GSL_WINDOW_Y, OTG_GSL_WINDOW_END_Y, mask_sh),\ 227*110d3968SNicholas Kazlauskas SF(OTG0_OTG_VUPDATE_KEEPOUT, OTG_MASTER_UPDATE_LOCK_VUPDATE_KEEPOUT_EN, mask_sh), \ 228*110d3968SNicholas Kazlauskas SF(OTG0_OTG_VUPDATE_KEEPOUT, MASTER_UPDATE_LOCK_VUPDATE_KEEPOUT_START_OFFSET, mask_sh), \ 229*110d3968SNicholas Kazlauskas SF(OTG0_OTG_VUPDATE_KEEPOUT, MASTER_UPDATE_LOCK_VUPDATE_KEEPOUT_END_OFFSET, mask_sh), \ 230*110d3968SNicholas Kazlauskas SF(OTG0_OTG_GSL_CONTROL, OTG_GSL_MASTER_MODE, mask_sh), \ 231*110d3968SNicholas Kazlauskas SF(OTG0_OTG_GSL_CONTROL, OTG_MASTER_UPDATE_LOCK_GSL_EN, mask_sh), \ 232*110d3968SNicholas Kazlauskas SF(OTG0_OTG_DSC_START_POSITION, OTG_DSC_START_POSITION_X, mask_sh), \ 233*110d3968SNicholas Kazlauskas SF(OTG0_OTG_DSC_START_POSITION, OTG_DSC_START_POSITION_LINE_NUM, mask_sh),\ 234*110d3968SNicholas Kazlauskas SF(ODM0_OPTC_DATA_SOURCE_SELECT, OPTC_SEG0_SRC_SEL, mask_sh),\ 235*110d3968SNicholas Kazlauskas SF(ODM0_OPTC_DATA_SOURCE_SELECT, OPTC_SEG1_SRC_SEL, mask_sh),\ 236*110d3968SNicholas Kazlauskas SF(ODM0_OPTC_DATA_SOURCE_SELECT, OPTC_SEG2_SRC_SEL, mask_sh),\ 237*110d3968SNicholas Kazlauskas SF(ODM0_OPTC_DATA_SOURCE_SELECT, OPTC_SEG3_SRC_SEL, mask_sh),\ 238*110d3968SNicholas Kazlauskas SF(ODM0_OPTC_DATA_SOURCE_SELECT, OPTC_NUM_OF_INPUT_SEGMENT, mask_sh),\ 239*110d3968SNicholas Kazlauskas SF(ODM0_OPTC_MEMORY_CONFIG, OPTC_MEM_SEL, mask_sh),\ 240*110d3968SNicholas Kazlauskas SF(ODM0_OPTC_DATA_FORMAT_CONTROL, OPTC_DATA_FORMAT, mask_sh),\ 241*110d3968SNicholas Kazlauskas SF(ODM0_OPTC_DATA_FORMAT_CONTROL, OPTC_DSC_MODE, mask_sh),\ 242*110d3968SNicholas Kazlauskas SF(ODM0_OPTC_BYTES_PER_PIXEL, OPTC_DSC_BYTES_PER_PIXEL, mask_sh),\ 243*110d3968SNicholas Kazlauskas SF(ODM0_OPTC_WIDTH_CONTROL, OPTC_DSC_SLICE_WIDTH, mask_sh),\ 244*110d3968SNicholas Kazlauskas SF(ODM0_OPTC_WIDTH_CONTROL, OPTC_SEGMENT_WIDTH, mask_sh),\ 245*110d3968SNicholas Kazlauskas SF(DWB_SOURCE_SELECT, OPTC_DWB0_SOURCE_SELECT, mask_sh),\ 246*110d3968SNicholas Kazlauskas SF(DWB_SOURCE_SELECT, OPTC_DWB1_SOURCE_SELECT, mask_sh),\ 247*110d3968SNicholas Kazlauskas SF(OTG0_OTG_DRR_TRIGGER_WINDOW, OTG_DRR_TRIGGER_WINDOW_START_X, mask_sh),\ 248*110d3968SNicholas Kazlauskas SF(OTG0_OTG_DRR_TRIGGER_WINDOW, OTG_DRR_TRIGGER_WINDOW_END_X, mask_sh),\ 249*110d3968SNicholas Kazlauskas SF(OTG0_OTG_DRR_V_TOTAL_CHANGE, OTG_DRR_V_TOTAL_CHANGE_LIMIT, mask_sh),\ 250*110d3968SNicholas Kazlauskas SF(OTG0_OTG_H_TIMING_CNTL, OTG_H_TIMING_DIV_MODE, mask_sh),\ 251*110d3968SNicholas Kazlauskas SF(OTG0_OTG_DOUBLE_BUFFER_CONTROL, OTG_DRR_TIMING_DBUF_UPDATE_MODE, mask_sh),\ 252*110d3968SNicholas Kazlauskas SF(OTG0_OTG_CRC_CNTL2, OTG_CRC_DSC_MODE, mask_sh),\ 253*110d3968SNicholas Kazlauskas SF(OTG0_OTG_CRC_CNTL2, OTG_CRC_DATA_STREAM_COMBINE_MODE, mask_sh),\ 254*110d3968SNicholas Kazlauskas SF(OTG0_OTG_CRC_CNTL2, OTG_CRC_DATA_STREAM_SPLIT_MODE, mask_sh),\ 255*110d3968SNicholas Kazlauskas SF(OTG0_OTG_CRC_CNTL2, OTG_CRC_DATA_FORMAT, mask_sh) 256*110d3968SNicholas Kazlauskas 257*110d3968SNicholas Kazlauskas void dcn31_timing_generator_init(struct optc *optc1); 258*110d3968SNicholas Kazlauskas 259*110d3968SNicholas Kazlauskas #endif /* __DC_OPTC_DCN31_H__ */ 260