1c0fb59a4SBhawanpreet Lakha /* 2c0fb59a4SBhawanpreet Lakha * Copyright 2016 Advanced Micro Devices, Inc. 3c0fb59a4SBhawanpreet Lakha * 4c0fb59a4SBhawanpreet Lakha * Permission is hereby granted, free of charge, to any person obtaining a 5c0fb59a4SBhawanpreet Lakha * copy of this software and associated documentation files (the "Software"), 6c0fb59a4SBhawanpreet Lakha * to deal in the Software without restriction, including without limitation 7c0fb59a4SBhawanpreet Lakha * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8c0fb59a4SBhawanpreet Lakha * and/or sell copies of the Software, and to permit persons to whom the 9c0fb59a4SBhawanpreet Lakha * Software is furnished to do so, subject to the following conditions: 10c0fb59a4SBhawanpreet Lakha * 11c0fb59a4SBhawanpreet Lakha * The above copyright notice and this permission notice shall be included in 12c0fb59a4SBhawanpreet Lakha * all copies or substantial portions of the Software. 13c0fb59a4SBhawanpreet Lakha * 14c0fb59a4SBhawanpreet Lakha * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15c0fb59a4SBhawanpreet Lakha * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16c0fb59a4SBhawanpreet Lakha * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17c0fb59a4SBhawanpreet Lakha * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18c0fb59a4SBhawanpreet Lakha * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19c0fb59a4SBhawanpreet Lakha * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20c0fb59a4SBhawanpreet Lakha * OTHER DEALINGS IN THE SOFTWARE. 21c0fb59a4SBhawanpreet Lakha * 22c0fb59a4SBhawanpreet Lakha * Authors: AMD 23c0fb59a4SBhawanpreet Lakha * 24c0fb59a4SBhawanpreet Lakha */ 25c0fb59a4SBhawanpreet Lakha 26c0fb59a4SBhawanpreet Lakha #include "dm_services.h" 27c0fb59a4SBhawanpreet Lakha #include "dm_helpers.h" 28c0fb59a4SBhawanpreet Lakha #include "core_types.h" 29c0fb59a4SBhawanpreet Lakha #include "resource.h" 30c0fb59a4SBhawanpreet Lakha #include "dce/dce_hwseq.h" 31f42ea55bSAnthony Koo #include "dcn21_hwseq.h" 32c0fb59a4SBhawanpreet Lakha #include "vmid.h" 33c0fb59a4SBhawanpreet Lakha #include "reg_helper.h" 34c0fb59a4SBhawanpreet Lakha #include "hw/clk_mgr.h" 35c0fb59a4SBhawanpreet Lakha 36c0fb59a4SBhawanpreet Lakha 37c0fb59a4SBhawanpreet Lakha #define DC_LOGGER_INIT(logger) 38c0fb59a4SBhawanpreet Lakha 39c0fb59a4SBhawanpreet Lakha #define CTX \ 40c0fb59a4SBhawanpreet Lakha hws->ctx 41c0fb59a4SBhawanpreet Lakha #define REG(reg)\ 42c0fb59a4SBhawanpreet Lakha hws->regs->reg 43c0fb59a4SBhawanpreet Lakha 44c0fb59a4SBhawanpreet Lakha #undef FN 45c0fb59a4SBhawanpreet Lakha #define FN(reg_name, field_name) \ 46c0fb59a4SBhawanpreet Lakha hws->shifts->field_name, hws->masks->field_name 47c0fb59a4SBhawanpreet Lakha 48c0fb59a4SBhawanpreet Lakha /* Temporary read settings, future will get values from kmd directly */ 49c0fb59a4SBhawanpreet Lakha static void mmhub_update_page_table_config(struct dcn_hubbub_phys_addr_config *config, 50c0fb59a4SBhawanpreet Lakha struct dce_hwseq *hws) 51c0fb59a4SBhawanpreet Lakha { 52c0fb59a4SBhawanpreet Lakha uint32_t page_table_base_hi; 53c0fb59a4SBhawanpreet Lakha uint32_t page_table_base_lo; 54c0fb59a4SBhawanpreet Lakha 55c0fb59a4SBhawanpreet Lakha REG_GET(VM_CONTEXT0_PAGE_TABLE_BASE_ADDR_HI32, 56c0fb59a4SBhawanpreet Lakha PAGE_DIRECTORY_ENTRY_HI32, &page_table_base_hi); 57c0fb59a4SBhawanpreet Lakha REG_GET(VM_CONTEXT0_PAGE_TABLE_BASE_ADDR_LO32, 58c0fb59a4SBhawanpreet Lakha PAGE_DIRECTORY_ENTRY_LO32, &page_table_base_lo); 59c0fb59a4SBhawanpreet Lakha 60c0fb59a4SBhawanpreet Lakha config->gart_config.page_table_base_addr = ((uint64_t)page_table_base_hi << 32) | page_table_base_lo; 61c0fb59a4SBhawanpreet Lakha 62c0fb59a4SBhawanpreet Lakha } 63c0fb59a4SBhawanpreet Lakha 6478c77382SAnthony Koo int dcn21_init_sys_ctx(struct dce_hwseq *hws, struct dc *dc, struct dc_phy_addr_space_config *pa_config) 65c0fb59a4SBhawanpreet Lakha { 66c0fb59a4SBhawanpreet Lakha struct dcn_hubbub_phys_addr_config config; 67c0fb59a4SBhawanpreet Lakha 68c0fb59a4SBhawanpreet Lakha config.system_aperture.fb_top = pa_config->system_aperture.fb_top; 69c0fb59a4SBhawanpreet Lakha config.system_aperture.fb_offset = pa_config->system_aperture.fb_offset; 70c0fb59a4SBhawanpreet Lakha config.system_aperture.fb_base = pa_config->system_aperture.fb_base; 71c0fb59a4SBhawanpreet Lakha config.system_aperture.agp_top = pa_config->system_aperture.agp_top; 72c0fb59a4SBhawanpreet Lakha config.system_aperture.agp_bot = pa_config->system_aperture.agp_bot; 73c0fb59a4SBhawanpreet Lakha config.system_aperture.agp_base = pa_config->system_aperture.agp_base; 74c0fb59a4SBhawanpreet Lakha config.gart_config.page_table_start_addr = pa_config->gart_config.page_table_start_addr; 75c0fb59a4SBhawanpreet Lakha config.gart_config.page_table_end_addr = pa_config->gart_config.page_table_end_addr; 76c0fb59a4SBhawanpreet Lakha config.gart_config.page_table_base_addr = pa_config->gart_config.page_table_base_addr; 77c0fb59a4SBhawanpreet Lakha 78c0fb59a4SBhawanpreet Lakha mmhub_update_page_table_config(&config, hws); 79c0fb59a4SBhawanpreet Lakha 80c0fb59a4SBhawanpreet Lakha return dc->res_pool->hubbub->funcs->init_dchub_sys_ctx(dc->res_pool->hubbub, &config); 81c0fb59a4SBhawanpreet Lakha } 82c0fb59a4SBhawanpreet Lakha 83c0fb59a4SBhawanpreet Lakha // work around for Renoir s0i3, if register is programmed, bypass golden init. 84c0fb59a4SBhawanpreet Lakha 8578c77382SAnthony Koo bool dcn21_s0i3_golden_init_wa(struct dc *dc) 86c0fb59a4SBhawanpreet Lakha { 87c0fb59a4SBhawanpreet Lakha struct dce_hwseq *hws = dc->hwseq; 88c0fb59a4SBhawanpreet Lakha uint32_t value = 0; 89c0fb59a4SBhawanpreet Lakha 90c0fb59a4SBhawanpreet Lakha value = REG_READ(MICROSECOND_TIME_BASE_DIV); 91c0fb59a4SBhawanpreet Lakha 92c0fb59a4SBhawanpreet Lakha return value != 0x00120464; 93c0fb59a4SBhawanpreet Lakha } 94c0fb59a4SBhawanpreet Lakha 95c0fb59a4SBhawanpreet Lakha void dcn21_exit_optimized_pwr_state( 96c0fb59a4SBhawanpreet Lakha const struct dc *dc, 97c0fb59a4SBhawanpreet Lakha struct dc_state *context) 98c0fb59a4SBhawanpreet Lakha { 99c0fb59a4SBhawanpreet Lakha dc->clk_mgr->funcs->update_clocks( 100c0fb59a4SBhawanpreet Lakha dc->clk_mgr, 101c0fb59a4SBhawanpreet Lakha context, 102c0fb59a4SBhawanpreet Lakha false); 103c0fb59a4SBhawanpreet Lakha } 104c0fb59a4SBhawanpreet Lakha 105c0fb59a4SBhawanpreet Lakha void dcn21_optimize_pwr_state( 106c0fb59a4SBhawanpreet Lakha const struct dc *dc, 107c0fb59a4SBhawanpreet Lakha struct dc_state *context) 108c0fb59a4SBhawanpreet Lakha { 109c0fb59a4SBhawanpreet Lakha dc->clk_mgr->funcs->update_clocks( 110c0fb59a4SBhawanpreet Lakha dc->clk_mgr, 111c0fb59a4SBhawanpreet Lakha context, 112c0fb59a4SBhawanpreet Lakha true); 113c0fb59a4SBhawanpreet Lakha } 114c0fb59a4SBhawanpreet Lakha 115