1 /* 2 * Copyright 2016 Advanced Micro Devices, Inc. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included in 12 * all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 * 22 * Authors: AMD 23 * 24 */ 25 26 #include "dm_services.h" 27 28 #include "core_types.h" 29 30 #include "reg_helper.h" 31 #include "dcn201_dpp.h" 32 #include "basics/conversion.h" 33 34 #define REG(reg)\ 35 dpp->tf_regs->reg 36 37 #define CTX \ 38 dpp->base.ctx 39 40 #undef FN 41 #define FN(reg_name, field_name) \ 42 dpp->tf_shift->field_name, dpp->tf_mask->field_name 43 44 static void dpp201_cnv_setup( 45 struct dpp *dpp_base, 46 enum surface_pixel_format format, 47 enum expansion_mode mode, 48 struct dc_csc_transform input_csc_color_matrix, 49 enum dc_color_space input_color_space, 50 struct cnv_alpha_2bit_lut *alpha_2bit_lut) 51 { 52 struct dcn201_dpp *dpp = TO_DCN201_DPP(dpp_base); 53 uint32_t pixel_format = 0; 54 uint32_t alpha_en = 1; 55 enum dc_color_space color_space = COLOR_SPACE_SRGB; 56 enum dcn10_input_csc_select select = INPUT_CSC_SELECT_BYPASS; 57 bool force_disable_cursor = false; 58 uint32_t is_2bit = 0; 59 60 REG_SET_2(FORMAT_CONTROL, 0, 61 CNVC_BYPASS, 0, 62 FORMAT_EXPANSION_MODE, mode); 63 64 REG_UPDATE(FORMAT_CONTROL, FORMAT_CNV16, 0); 65 REG_UPDATE(FORMAT_CONTROL, CNVC_BYPASS_MSB_ALIGN, 0); 66 REG_UPDATE(FORMAT_CONTROL, CLAMP_POSITIVE, 0); 67 REG_UPDATE(FORMAT_CONTROL, CLAMP_POSITIVE_C, 0); 68 69 switch (format) { 70 case SURFACE_PIXEL_FORMAT_GRPH_ARGB1555: 71 pixel_format = 1; 72 break; 73 case SURFACE_PIXEL_FORMAT_GRPH_RGB565: 74 pixel_format = 3; 75 alpha_en = 0; 76 break; 77 case SURFACE_PIXEL_FORMAT_GRPH_ARGB8888: 78 case SURFACE_PIXEL_FORMAT_GRPH_ABGR8888: 79 pixel_format = 8; 80 break; 81 case SURFACE_PIXEL_FORMAT_GRPH_ARGB2101010: 82 case SURFACE_PIXEL_FORMAT_GRPH_ABGR2101010: 83 pixel_format = 10; 84 is_2bit = 1; 85 break; 86 case SURFACE_PIXEL_FORMAT_VIDEO_420_YCbCr: 87 force_disable_cursor = false; 88 pixel_format = 65; 89 color_space = COLOR_SPACE_YCBCR709; 90 select = INPUT_CSC_SELECT_ICSC; 91 break; 92 case SURFACE_PIXEL_FORMAT_VIDEO_420_YCrCb: 93 force_disable_cursor = true; 94 pixel_format = 64; 95 color_space = COLOR_SPACE_YCBCR709; 96 select = INPUT_CSC_SELECT_ICSC; 97 break; 98 case SURFACE_PIXEL_FORMAT_VIDEO_420_10bpc_YCbCr: 99 force_disable_cursor = true; 100 pixel_format = 67; 101 color_space = COLOR_SPACE_YCBCR709; 102 select = INPUT_CSC_SELECT_ICSC; 103 break; 104 case SURFACE_PIXEL_FORMAT_VIDEO_420_10bpc_YCrCb: 105 force_disable_cursor = true; 106 pixel_format = 66; 107 color_space = COLOR_SPACE_YCBCR709; 108 select = INPUT_CSC_SELECT_ICSC; 109 break; 110 case SURFACE_PIXEL_FORMAT_GRPH_ARGB16161616: 111 pixel_format = 22; 112 break; 113 case SURFACE_PIXEL_FORMAT_GRPH_ARGB16161616F: 114 pixel_format = 24; 115 break; 116 case SURFACE_PIXEL_FORMAT_GRPH_ABGR16161616F: 117 pixel_format = 25; 118 break; 119 case SURFACE_PIXEL_FORMAT_VIDEO_AYCrCb8888: 120 pixel_format = 12; 121 color_space = COLOR_SPACE_YCBCR709; 122 select = INPUT_CSC_SELECT_ICSC; 123 break; 124 case SURFACE_PIXEL_FORMAT_GRPH_RGB111110_FIX: 125 pixel_format = 112; 126 alpha_en = 0; 127 break; 128 case SURFACE_PIXEL_FORMAT_GRPH_BGR101111_FIX: 129 pixel_format = 113; 130 alpha_en = 0; 131 break; 132 case SURFACE_PIXEL_FORMAT_VIDEO_ACrYCb2101010: 133 pixel_format = 114; 134 color_space = COLOR_SPACE_YCBCR709; 135 select = INPUT_CSC_SELECT_ICSC; 136 is_2bit = 1; 137 break; 138 case SURFACE_PIXEL_FORMAT_VIDEO_CrYCbA1010102: 139 pixel_format = 115; 140 color_space = COLOR_SPACE_YCBCR709; 141 select = INPUT_CSC_SELECT_ICSC; 142 is_2bit = 1; 143 break; 144 case SURFACE_PIXEL_FORMAT_GRPH_RGB111110_FLOAT: 145 pixel_format = 118; 146 alpha_en = 0; 147 break; 148 case SURFACE_PIXEL_FORMAT_GRPH_BGR101111_FLOAT: 149 pixel_format = 119; 150 alpha_en = 0; 151 break; 152 default: 153 break; 154 } 155 156 /* Set default color space based on format if none is given. */ 157 color_space = input_color_space ? input_color_space : color_space; 158 159 if (is_2bit == 1 && alpha_2bit_lut != NULL) { 160 REG_UPDATE(ALPHA_2BIT_LUT, ALPHA_2BIT_LUT0, alpha_2bit_lut->lut0); 161 REG_UPDATE(ALPHA_2BIT_LUT, ALPHA_2BIT_LUT1, alpha_2bit_lut->lut1); 162 REG_UPDATE(ALPHA_2BIT_LUT, ALPHA_2BIT_LUT2, alpha_2bit_lut->lut2); 163 REG_UPDATE(ALPHA_2BIT_LUT, ALPHA_2BIT_LUT3, alpha_2bit_lut->lut3); 164 } 165 166 REG_SET(CNVC_SURFACE_PIXEL_FORMAT, 0, 167 CNVC_SURFACE_PIXEL_FORMAT, pixel_format); 168 REG_UPDATE(FORMAT_CONTROL, FORMAT_CONTROL__ALPHA_EN, alpha_en); 169 170 dpp1_program_input_csc(dpp_base, color_space, select, NULL); 171 172 if (force_disable_cursor) { 173 REG_UPDATE(CURSOR_CONTROL, 174 CURSOR_ENABLE, 0); 175 REG_UPDATE(CURSOR0_CONTROL, 176 CUR0_ENABLE, 0); 177 } 178 dpp2_power_on_obuf(dpp_base, true); 179 } 180 181 #define IDENTITY_RATIO(ratio) (dc_fixpt_u3d19(ratio) == (1 << 19)) 182 183 static bool dpp201_get_optimal_number_of_taps( 184 struct dpp *dpp, 185 struct scaler_data *scl_data, 186 const struct scaling_taps *in_taps) 187 { 188 uint32_t pixel_width; 189 190 if (scl_data->viewport.width > scl_data->recout.width) 191 pixel_width = scl_data->recout.width; 192 else 193 pixel_width = scl_data->viewport.width; 194 195 if (scl_data->viewport.width != scl_data->h_active && 196 scl_data->viewport.height != scl_data->v_active && 197 dpp->caps->dscl_data_proc_format == DSCL_DATA_PRCESSING_FIXED_FORMAT && 198 scl_data->format == PIXEL_FORMAT_FP16) 199 return false; 200 201 if (scl_data->viewport.width > scl_data->h_active && 202 dpp->ctx->dc->debug.max_downscale_src_width != 0 && 203 scl_data->viewport.width > dpp->ctx->dc->debug.max_downscale_src_width) 204 return false; 205 206 if (scl_data->ratios.horz.value == (8ll << 32)) 207 scl_data->ratios.horz.value--; 208 if (scl_data->ratios.vert.value == (8ll << 32)) 209 scl_data->ratios.vert.value--; 210 if (scl_data->ratios.horz_c.value == (8ll << 32)) 211 scl_data->ratios.horz_c.value--; 212 if (scl_data->ratios.vert_c.value == (8ll << 32)) 213 scl_data->ratios.vert_c.value--; 214 215 if (in_taps->h_taps == 0) { 216 if (dc_fixpt_ceil(scl_data->ratios.horz) > 4) 217 scl_data->taps.h_taps = 8; 218 else 219 scl_data->taps.h_taps = 4; 220 } else 221 scl_data->taps.h_taps = in_taps->h_taps; 222 223 if (in_taps->v_taps == 0) { 224 if (dc_fixpt_ceil(scl_data->ratios.vert) > 4) 225 scl_data->taps.v_taps = 8; 226 else 227 scl_data->taps.v_taps = 4; 228 } else 229 scl_data->taps.v_taps = in_taps->v_taps; 230 if (in_taps->v_taps_c == 0) { 231 if (dc_fixpt_ceil(scl_data->ratios.vert_c) > 4) 232 scl_data->taps.v_taps_c = 4; 233 else 234 scl_data->taps.v_taps_c = 2; 235 } else 236 scl_data->taps.v_taps_c = in_taps->v_taps_c; 237 if (in_taps->h_taps_c == 0) { 238 if (dc_fixpt_ceil(scl_data->ratios.horz_c) > 4) 239 scl_data->taps.h_taps_c = 4; 240 else 241 scl_data->taps.h_taps_c = 2; 242 } else if ((in_taps->h_taps_c % 2) != 0 && in_taps->h_taps_c != 1) 243 scl_data->taps.h_taps_c = in_taps->h_taps_c - 1; 244 else 245 scl_data->taps.h_taps_c = in_taps->h_taps_c; 246 247 if (!dpp->ctx->dc->debug.always_scale) { 248 if (IDENTITY_RATIO(scl_data->ratios.horz)) 249 scl_data->taps.h_taps = 1; 250 if (IDENTITY_RATIO(scl_data->ratios.vert)) 251 scl_data->taps.v_taps = 1; 252 if (IDENTITY_RATIO(scl_data->ratios.horz_c)) 253 scl_data->taps.h_taps_c = 1; 254 if (IDENTITY_RATIO(scl_data->ratios.vert_c)) 255 scl_data->taps.v_taps_c = 1; 256 } 257 258 return true; 259 } 260 261 static struct dpp_funcs dcn201_dpp_funcs = { 262 .dpp_read_state = dpp20_read_state, 263 .dpp_reset = dpp_reset, 264 .dpp_set_scaler = dpp1_dscl_set_scaler_manual_scale, 265 .dpp_get_optimal_number_of_taps = dpp201_get_optimal_number_of_taps, 266 .dpp_set_gamut_remap = dpp1_cm_set_gamut_remap, 267 .dpp_set_csc_adjustment = NULL, 268 .dpp_set_csc_default = NULL, 269 .dpp_program_regamma_pwl = oppn20_dummy_program_regamma_pwl, 270 .dpp_set_degamma = dpp2_set_degamma, 271 .dpp_program_input_lut = dpp2_dummy_program_input_lut, 272 .dpp_full_bypass = dpp1_full_bypass, 273 .dpp_setup = dpp201_cnv_setup, 274 .dpp_program_degamma_pwl = dpp2_set_degamma_pwl, 275 .dpp_program_blnd_lut = dpp20_program_blnd_lut, 276 .dpp_program_shaper_lut = dpp20_program_shaper, 277 .dpp_program_3dlut = dpp20_program_3dlut, 278 .dpp_program_bias_and_scale = NULL, 279 .dpp_cnv_set_alpha_keyer = dpp2_cnv_set_alpha_keyer, 280 .set_cursor_attributes = dpp2_set_cursor_attributes, 281 .set_cursor_position = dpp1_set_cursor_position, 282 .set_optional_cursor_attributes = dpp1_cnv_set_optional_cursor_attributes, 283 .dpp_dppclk_control = dpp1_dppclk_control, 284 .dpp_set_hdr_multiplier = dpp2_set_hdr_multiplier, 285 }; 286 287 static struct dpp_caps dcn201_dpp_cap = { 288 .dscl_data_proc_format = DSCL_DATA_PRCESSING_FLOAT_FORMAT, 289 .dscl_calc_lb_num_partitions = dscl2_calc_lb_num_partitions, 290 }; 291 292 bool dpp201_construct( 293 struct dcn201_dpp *dpp, 294 struct dc_context *ctx, 295 uint32_t inst, 296 const struct dcn201_dpp_registers *tf_regs, 297 const struct dcn201_dpp_shift *tf_shift, 298 const struct dcn201_dpp_mask *tf_mask) 299 { 300 dpp->base.ctx = ctx; 301 302 dpp->base.inst = inst; 303 dpp->base.funcs = &dcn201_dpp_funcs; 304 dpp->base.caps = &dcn201_dpp_cap; 305 306 dpp->tf_regs = tf_regs; 307 dpp->tf_shift = tf_shift; 308 dpp->tf_mask = tf_mask; 309 310 dpp->lb_pixel_depth_supported = 311 LB_PIXEL_DEPTH_18BPP | 312 LB_PIXEL_DEPTH_24BPP | 313 LB_PIXEL_DEPTH_30BPP; 314 315 dpp->lb_bits_per_entry = LB_BITS_PER_ENTRY; 316 dpp->lb_memory_size = LB_TOTAL_NUMBER_OF_ENTRIES; 317 318 return true; 319 } 320