1 /* 2 * Copyright 2018 Advanced Micro Devices, Inc. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included in 12 * all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 * 22 * Authors: AMD 23 * 24 */ 25 26 #include "dcn20_vmid.h" 27 #include "reg_helper.h" 28 29 #define REG(reg)\ 30 vmid->regs->reg 31 32 #define CTX \ 33 vmid->ctx 34 35 #undef FN 36 #define FN(reg_name, field_name) \ 37 vmid->shifts->field_name, vmid->masks->field_name 38 39 void dcn20_vmid_setup(struct dcn20_vmid *vmid, const struct dcn_vmid_page_table_config *config) 40 { 41 REG_SET(PAGE_TABLE_START_ADDR_HI32, 0, 42 VM_CONTEXT0_START_LOGICAL_PAGE_NUMBER_HI4, (config->page_table_start_addr >> 32) & 0xF); 43 REG_SET(PAGE_TABLE_START_ADDR_LO32, 0, 44 VM_CONTEXT0_START_LOGICAL_PAGE_NUMBER_LO32, config->page_table_start_addr & 0xFFFFFFFF); 45 46 REG_SET(PAGE_TABLE_END_ADDR_HI32, 0, 47 VM_CONTEXT0_END_LOGICAL_PAGE_NUMBER_HI4, (config->page_table_end_addr >> 32) & 0xF); 48 REG_SET(PAGE_TABLE_END_ADDR_LO32, 0, 49 VM_CONTEXT0_END_LOGICAL_PAGE_NUMBER_LO32, config->page_table_end_addr & 0xFFFFFFFF); 50 51 REG_SET_2(CNTL, 0, 52 VM_CONTEXT0_PAGE_TABLE_DEPTH, config->depth, 53 VM_CONTEXT0_PAGE_TABLE_BLOCK_SIZE, config->block_size); 54 55 REG_SET(PAGE_TABLE_BASE_ADDR_HI32, 0, 56 VM_CONTEXT0_PAGE_DIRECTORY_ENTRY_HI32, (config->page_table_base_addr >> 32) & 0xFFFFFFFF); 57 REG_SET(PAGE_TABLE_BASE_ADDR_LO32, 0, 58 VM_CONTEXT0_PAGE_DIRECTORY_ENTRY_LO32, config->page_table_base_addr & 0xFFFFFFFF); 59 } 60