1 /* 2 * Copyright 2016 Advanced Micro Devices, Inc. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included in 12 * all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 * 22 * Authors: AMD 23 * 24 */ 25 26 #ifndef __DC_HWSS_DCN20_H__ 27 #define __DC_HWSS_DCN20_H__ 28 29 struct dc; 30 31 void dcn20_hw_sequencer_construct(struct dc *dc); 32 33 enum dc_status dcn20_enable_stream_timing( 34 struct pipe_ctx *pipe_ctx, 35 struct dc_state *context, 36 struct dc *dc); 37 38 void dcn20_blank_pixel_data( 39 struct dc *dc, 40 struct pipe_ctx *pipe_ctx, 41 bool blank); 42 43 void dcn20_program_output_csc(struct dc *dc, 44 struct pipe_ctx *pipe_ctx, 45 enum dc_color_space colorspace, 46 uint16_t *matrix, 47 int opp_id); 48 49 void dcn20_prepare_bandwidth( 50 struct dc *dc, 51 struct dc_state *context); 52 53 void dcn20_optimize_bandwidth( 54 struct dc *dc, 55 struct dc_state *context); 56 57 bool dcn20_update_bandwidth( 58 struct dc *dc, 59 struct dc_state *context); 60 61 void dcn20_disable_writeback( 62 struct dc *dc, 63 unsigned int dwb_pipe_inst); 64 65 bool dcn20_hwss_wait_for_blank_complete( 66 struct output_pixel_processor *opp); 67 68 bool dcn20_set_output_transfer_func(struct pipe_ctx *pipe_ctx, 69 const struct dc_stream_state *stream); 70 71 bool dcn20_set_input_transfer_func(struct pipe_ctx *pipe_ctx, 72 const struct dc_plane_state *plane_state); 73 74 bool dcn20_dmdata_status_done(struct pipe_ctx *pipe_ctx); 75 76 void dcn20_set_dmdata_attributes(struct pipe_ctx *pipe_ctx); 77 78 void dcn20_disable_stream(struct pipe_ctx *pipe_ctx); 79 80 void dcn20_program_tripleBuffer( 81 const struct dc *dc, 82 struct pipe_ctx *pipe_ctx, 83 bool enableTripleBuffer); 84 85 void dcn20_setup_vupdate_interrupt(struct pipe_ctx *pipe_ctx); 86 87 void dcn20_pipe_control_lock_global( 88 struct dc *dc, 89 struct pipe_ctx *pipe, 90 bool lock); 91 void dcn20_setup_gsl_group_as_lock(const struct dc *dc, 92 struct pipe_ctx *pipe_ctx, 93 bool enable); 94 void dcn20_dccg_init(struct dce_hwseq *hws); 95 void dcn20_init_blank( 96 struct dc *dc, 97 struct timing_generator *tg); 98 void dcn20_display_init(struct dc *dc); 99 void dcn20_pipe_control_lock( 100 struct dc *dc, 101 struct pipe_ctx *pipe, 102 bool lock); 103 void dcn20_disable_plane(struct dc *dc, struct pipe_ctx *pipe_ctx); 104 void dcn20_enable_plane( 105 struct dc *dc, 106 struct pipe_ctx *pipe_ctx, 107 struct dc_state *context); 108 bool dcn20_set_blend_lut( 109 struct pipe_ctx *pipe_ctx, const struct dc_plane_state *plane_state); 110 bool dcn20_set_shaper_3dlut( 111 struct pipe_ctx *pipe_ctx, const struct dc_plane_state *plane_state); 112 void dcn20_get_mpctree_visual_confirm_color( 113 struct pipe_ctx *pipe_ctx, 114 struct tg_color *color); 115 #endif /* __DC_HWSS_DCN20_H__ */ 116