1bbeb64d0SHarry Wentland /* 2bbeb64d0SHarry Wentland * Copyright 2016 Advanced Micro Devices, Inc. 3bbeb64d0SHarry Wentland * 4bbeb64d0SHarry Wentland * Permission is hereby granted, free of charge, to any person obtaining a 5bbeb64d0SHarry Wentland * copy of this software and associated documentation files (the "Software"), 6bbeb64d0SHarry Wentland * to deal in the Software without restriction, including without limitation 7bbeb64d0SHarry Wentland * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8bbeb64d0SHarry Wentland * and/or sell copies of the Software, and to permit persons to whom the 9bbeb64d0SHarry Wentland * Software is furnished to do so, subject to the following conditions: 10bbeb64d0SHarry Wentland * 11bbeb64d0SHarry Wentland * The above copyright notice and this permission notice shall be included in 12bbeb64d0SHarry Wentland * all copies or substantial portions of the Software. 13bbeb64d0SHarry Wentland * 14bbeb64d0SHarry Wentland * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15bbeb64d0SHarry Wentland * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16bbeb64d0SHarry Wentland * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17bbeb64d0SHarry Wentland * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18bbeb64d0SHarry Wentland * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19bbeb64d0SHarry Wentland * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20bbeb64d0SHarry Wentland * OTHER DEALINGS IN THE SOFTWARE. 21bbeb64d0SHarry Wentland * 22bbeb64d0SHarry Wentland * Authors: AMD 23bbeb64d0SHarry Wentland * 24bbeb64d0SHarry Wentland */ 25bbeb64d0SHarry Wentland 26bbeb64d0SHarry Wentland 27bbeb64d0SHarry Wentland #include "dcn20_hubbub.h" 28bbeb64d0SHarry Wentland #include "reg_helper.h" 29bbeb64d0SHarry Wentland 30bbeb64d0SHarry Wentland #define REG(reg)\ 31bbeb64d0SHarry Wentland hubbub1->regs->reg 32bbeb64d0SHarry Wentland 33bbeb64d0SHarry Wentland #define CTX \ 34bbeb64d0SHarry Wentland hubbub1->base.ctx 35bbeb64d0SHarry Wentland 36bbeb64d0SHarry Wentland #undef FN 37bbeb64d0SHarry Wentland #define FN(reg_name, field_name) \ 38bbeb64d0SHarry Wentland hubbub1->shifts->field_name, hubbub1->masks->field_name 39bbeb64d0SHarry Wentland 40bbeb64d0SHarry Wentland #define REG(reg)\ 41bbeb64d0SHarry Wentland hubbub1->regs->reg 42bbeb64d0SHarry Wentland 43bbeb64d0SHarry Wentland #define CTX \ 44bbeb64d0SHarry Wentland hubbub1->base.ctx 45bbeb64d0SHarry Wentland 46bbeb64d0SHarry Wentland #undef FN 47bbeb64d0SHarry Wentland #define FN(reg_name, field_name) \ 48bbeb64d0SHarry Wentland hubbub1->shifts->field_name, hubbub1->masks->field_name 49bbeb64d0SHarry Wentland 50bbeb64d0SHarry Wentland bool hubbub2_dcc_support_swizzle( 51bbeb64d0SHarry Wentland enum swizzle_mode_values swizzle, 52bbeb64d0SHarry Wentland unsigned int bytes_per_element, 53bbeb64d0SHarry Wentland enum segment_order *segment_order_horz, 54bbeb64d0SHarry Wentland enum segment_order *segment_order_vert) 55bbeb64d0SHarry Wentland { 56bbeb64d0SHarry Wentland bool standard_swizzle = false; 57bbeb64d0SHarry Wentland bool display_swizzle = false; 58bbeb64d0SHarry Wentland bool render_swizzle = false; 59bbeb64d0SHarry Wentland 60bbeb64d0SHarry Wentland switch (swizzle) { 61bbeb64d0SHarry Wentland case DC_SW_4KB_S: 62bbeb64d0SHarry Wentland case DC_SW_64KB_S: 63bbeb64d0SHarry Wentland case DC_SW_VAR_S: 64bbeb64d0SHarry Wentland case DC_SW_4KB_S_X: 65bbeb64d0SHarry Wentland case DC_SW_64KB_S_X: 66bbeb64d0SHarry Wentland case DC_SW_VAR_S_X: 67bbeb64d0SHarry Wentland standard_swizzle = true; 68bbeb64d0SHarry Wentland break; 69bbeb64d0SHarry Wentland case DC_SW_64KB_R_X: 70bbeb64d0SHarry Wentland render_swizzle = true; 71bbeb64d0SHarry Wentland break; 72bbeb64d0SHarry Wentland case DC_SW_4KB_D: 73bbeb64d0SHarry Wentland case DC_SW_64KB_D: 74bbeb64d0SHarry Wentland case DC_SW_VAR_D: 75bbeb64d0SHarry Wentland case DC_SW_4KB_D_X: 76bbeb64d0SHarry Wentland case DC_SW_64KB_D_X: 77bbeb64d0SHarry Wentland case DC_SW_VAR_D_X: 78bbeb64d0SHarry Wentland display_swizzle = true; 79bbeb64d0SHarry Wentland break; 80bbeb64d0SHarry Wentland default: 81bbeb64d0SHarry Wentland break; 82bbeb64d0SHarry Wentland } 83bbeb64d0SHarry Wentland 84bbeb64d0SHarry Wentland if (standard_swizzle) { 85bbeb64d0SHarry Wentland if (bytes_per_element == 1) { 86bbeb64d0SHarry Wentland *segment_order_horz = segment_order__contiguous; 87bbeb64d0SHarry Wentland *segment_order_vert = segment_order__na; 88bbeb64d0SHarry Wentland return true; 89bbeb64d0SHarry Wentland } 90bbeb64d0SHarry Wentland if (bytes_per_element == 2) { 91bbeb64d0SHarry Wentland *segment_order_horz = segment_order__non_contiguous; 92bbeb64d0SHarry Wentland *segment_order_vert = segment_order__contiguous; 93bbeb64d0SHarry Wentland return true; 94bbeb64d0SHarry Wentland } 95bbeb64d0SHarry Wentland if (bytes_per_element == 4) { 96bbeb64d0SHarry Wentland *segment_order_horz = segment_order__non_contiguous; 97bbeb64d0SHarry Wentland *segment_order_vert = segment_order__contiguous; 98bbeb64d0SHarry Wentland return true; 99bbeb64d0SHarry Wentland } 100bbeb64d0SHarry Wentland if (bytes_per_element == 8) { 101bbeb64d0SHarry Wentland *segment_order_horz = segment_order__na; 102bbeb64d0SHarry Wentland *segment_order_vert = segment_order__contiguous; 103bbeb64d0SHarry Wentland return true; 104bbeb64d0SHarry Wentland } 105bbeb64d0SHarry Wentland } 106bbeb64d0SHarry Wentland if (render_swizzle) { 107bbeb64d0SHarry Wentland if (bytes_per_element == 2) { 108bbeb64d0SHarry Wentland *segment_order_horz = segment_order__contiguous; 109bbeb64d0SHarry Wentland *segment_order_vert = segment_order__contiguous; 110bbeb64d0SHarry Wentland return true; 111bbeb64d0SHarry Wentland } 112bbeb64d0SHarry Wentland if (bytes_per_element == 4) { 113bbeb64d0SHarry Wentland *segment_order_horz = segment_order__non_contiguous; 114bbeb64d0SHarry Wentland *segment_order_vert = segment_order__contiguous; 115bbeb64d0SHarry Wentland return true; 116bbeb64d0SHarry Wentland } 117bbeb64d0SHarry Wentland if (bytes_per_element == 8) { 118bbeb64d0SHarry Wentland *segment_order_horz = segment_order__contiguous; 119bbeb64d0SHarry Wentland *segment_order_vert = segment_order__non_contiguous; 120bbeb64d0SHarry Wentland return true; 121bbeb64d0SHarry Wentland } 122bbeb64d0SHarry Wentland } 123bbeb64d0SHarry Wentland if (display_swizzle && bytes_per_element == 8) { 124bbeb64d0SHarry Wentland *segment_order_horz = segment_order__contiguous; 125bbeb64d0SHarry Wentland *segment_order_vert = segment_order__non_contiguous; 126bbeb64d0SHarry Wentland return true; 127bbeb64d0SHarry Wentland } 128bbeb64d0SHarry Wentland 129bbeb64d0SHarry Wentland return false; 130bbeb64d0SHarry Wentland } 131bbeb64d0SHarry Wentland 132bbeb64d0SHarry Wentland bool hubbub2_dcc_support_pixel_format( 133bbeb64d0SHarry Wentland enum surface_pixel_format format, 134bbeb64d0SHarry Wentland unsigned int *bytes_per_element) 135bbeb64d0SHarry Wentland { 136bbeb64d0SHarry Wentland /* DML: get_bytes_per_element */ 137bbeb64d0SHarry Wentland switch (format) { 138bbeb64d0SHarry Wentland case SURFACE_PIXEL_FORMAT_GRPH_ARGB1555: 139bbeb64d0SHarry Wentland case SURFACE_PIXEL_FORMAT_GRPH_RGB565: 140bbeb64d0SHarry Wentland *bytes_per_element = 2; 141bbeb64d0SHarry Wentland return true; 142bbeb64d0SHarry Wentland case SURFACE_PIXEL_FORMAT_GRPH_ARGB8888: 143bbeb64d0SHarry Wentland case SURFACE_PIXEL_FORMAT_GRPH_ABGR8888: 144bbeb64d0SHarry Wentland case SURFACE_PIXEL_FORMAT_GRPH_ARGB2101010: 145bbeb64d0SHarry Wentland case SURFACE_PIXEL_FORMAT_GRPH_ABGR2101010: 146bbeb64d0SHarry Wentland case SURFACE_PIXEL_FORMAT_GRPH_RGB111110_FIX: 147bbeb64d0SHarry Wentland case SURFACE_PIXEL_FORMAT_GRPH_BGR101111_FIX: 148bbeb64d0SHarry Wentland case SURFACE_PIXEL_FORMAT_GRPH_RGB111110_FLOAT: 149bbeb64d0SHarry Wentland case SURFACE_PIXEL_FORMAT_GRPH_BGR101111_FLOAT: 150bbeb64d0SHarry Wentland *bytes_per_element = 4; 151bbeb64d0SHarry Wentland return true; 152bbeb64d0SHarry Wentland case SURFACE_PIXEL_FORMAT_GRPH_ARGB16161616: 153bbeb64d0SHarry Wentland case SURFACE_PIXEL_FORMAT_GRPH_ARGB16161616F: 154bbeb64d0SHarry Wentland case SURFACE_PIXEL_FORMAT_GRPH_ABGR16161616F: 155bbeb64d0SHarry Wentland *bytes_per_element = 8; 156bbeb64d0SHarry Wentland return true; 157bbeb64d0SHarry Wentland default: 158bbeb64d0SHarry Wentland return false; 159bbeb64d0SHarry Wentland } 160bbeb64d0SHarry Wentland } 161bbeb64d0SHarry Wentland 162bbeb64d0SHarry Wentland static void hubbub2_get_blk256_size(unsigned int *blk256_width, unsigned int *blk256_height, 163bbeb64d0SHarry Wentland unsigned int bytes_per_element) 164bbeb64d0SHarry Wentland { 165bbeb64d0SHarry Wentland /* copied from DML. might want to refactor DML to leverage from DML */ 166bbeb64d0SHarry Wentland /* DML : get_blk256_size */ 167bbeb64d0SHarry Wentland if (bytes_per_element == 1) { 168bbeb64d0SHarry Wentland *blk256_width = 16; 169bbeb64d0SHarry Wentland *blk256_height = 16; 170bbeb64d0SHarry Wentland } else if (bytes_per_element == 2) { 171bbeb64d0SHarry Wentland *blk256_width = 16; 172bbeb64d0SHarry Wentland *blk256_height = 8; 173bbeb64d0SHarry Wentland } else if (bytes_per_element == 4) { 174bbeb64d0SHarry Wentland *blk256_width = 8; 175bbeb64d0SHarry Wentland *blk256_height = 8; 176bbeb64d0SHarry Wentland } else if (bytes_per_element == 8) { 177bbeb64d0SHarry Wentland *blk256_width = 8; 178bbeb64d0SHarry Wentland *blk256_height = 4; 179bbeb64d0SHarry Wentland } 180bbeb64d0SHarry Wentland } 181bbeb64d0SHarry Wentland 182bbeb64d0SHarry Wentland static void hubbub2_det_request_size( 183bbeb64d0SHarry Wentland unsigned int height, 184bbeb64d0SHarry Wentland unsigned int width, 185bbeb64d0SHarry Wentland unsigned int bpe, 186bbeb64d0SHarry Wentland bool *req128_horz_wc, 187bbeb64d0SHarry Wentland bool *req128_vert_wc) 188bbeb64d0SHarry Wentland { 189bbeb64d0SHarry Wentland unsigned int detile_buf_size = 164 * 1024; /* 164KB for DCN1.0 */ 190bbeb64d0SHarry Wentland 191bbeb64d0SHarry Wentland unsigned int blk256_height = 0; 192bbeb64d0SHarry Wentland unsigned int blk256_width = 0; 193bbeb64d0SHarry Wentland unsigned int swath_bytes_horz_wc, swath_bytes_vert_wc; 194bbeb64d0SHarry Wentland 195bbeb64d0SHarry Wentland hubbub2_get_blk256_size(&blk256_width, &blk256_height, bpe); 196bbeb64d0SHarry Wentland 1970cd32625SBob Yang swath_bytes_horz_wc = width * blk256_height * bpe; 1980cd32625SBob Yang swath_bytes_vert_wc = height * blk256_width * bpe; 199bbeb64d0SHarry Wentland 200bbeb64d0SHarry Wentland *req128_horz_wc = (2 * swath_bytes_horz_wc <= detile_buf_size) ? 201bbeb64d0SHarry Wentland false : /* full 256B request */ 202bbeb64d0SHarry Wentland true; /* half 128b request */ 203bbeb64d0SHarry Wentland 204bbeb64d0SHarry Wentland *req128_vert_wc = (2 * swath_bytes_vert_wc <= detile_buf_size) ? 205bbeb64d0SHarry Wentland false : /* full 256B request */ 206bbeb64d0SHarry Wentland true; /* half 128b request */ 207bbeb64d0SHarry Wentland } 208bbeb64d0SHarry Wentland 209bbeb64d0SHarry Wentland bool hubbub2_get_dcc_compression_cap(struct hubbub *hubbub, 210bbeb64d0SHarry Wentland const struct dc_dcc_surface_param *input, 211bbeb64d0SHarry Wentland struct dc_surface_dcc_cap *output) 212bbeb64d0SHarry Wentland { 213bbeb64d0SHarry Wentland struct dc *dc = hubbub->ctx->dc; 214bbeb64d0SHarry Wentland /* implement section 1.6.2.1 of DCN1_Programming_Guide.docx */ 215bbeb64d0SHarry Wentland enum dcc_control dcc_control; 216bbeb64d0SHarry Wentland unsigned int bpe; 217bbeb64d0SHarry Wentland enum segment_order segment_order_horz, segment_order_vert; 218bbeb64d0SHarry Wentland bool req128_horz_wc, req128_vert_wc; 219bbeb64d0SHarry Wentland 220bbeb64d0SHarry Wentland memset(output, 0, sizeof(*output)); 221bbeb64d0SHarry Wentland 222bbeb64d0SHarry Wentland if (dc->debug.disable_dcc == DCC_DISABLE) 223bbeb64d0SHarry Wentland return false; 224bbeb64d0SHarry Wentland 225bbeb64d0SHarry Wentland if (!hubbub->funcs->dcc_support_pixel_format(input->format, 226bbeb64d0SHarry Wentland &bpe)) 227bbeb64d0SHarry Wentland return false; 228bbeb64d0SHarry Wentland 229bbeb64d0SHarry Wentland if (!hubbub->funcs->dcc_support_swizzle(input->swizzle_mode, bpe, 230bbeb64d0SHarry Wentland &segment_order_horz, &segment_order_vert)) 231bbeb64d0SHarry Wentland return false; 232bbeb64d0SHarry Wentland 233bbeb64d0SHarry Wentland hubbub2_det_request_size(input->surface_size.height, input->surface_size.width, 234bbeb64d0SHarry Wentland bpe, &req128_horz_wc, &req128_vert_wc); 235bbeb64d0SHarry Wentland 236bbeb64d0SHarry Wentland if (!req128_horz_wc && !req128_vert_wc) { 237bbeb64d0SHarry Wentland dcc_control = dcc_control__256_256_xxx; 238bbeb64d0SHarry Wentland } else if (input->scan == SCAN_DIRECTION_HORIZONTAL) { 239bbeb64d0SHarry Wentland if (!req128_horz_wc) 240bbeb64d0SHarry Wentland dcc_control = dcc_control__256_256_xxx; 241bbeb64d0SHarry Wentland else if (segment_order_horz == segment_order__contiguous) 242bbeb64d0SHarry Wentland dcc_control = dcc_control__128_128_xxx; 243bbeb64d0SHarry Wentland else 244bbeb64d0SHarry Wentland dcc_control = dcc_control__256_64_64; 245bbeb64d0SHarry Wentland } else if (input->scan == SCAN_DIRECTION_VERTICAL) { 246bbeb64d0SHarry Wentland if (!req128_vert_wc) 247bbeb64d0SHarry Wentland dcc_control = dcc_control__256_256_xxx; 248bbeb64d0SHarry Wentland else if (segment_order_vert == segment_order__contiguous) 249bbeb64d0SHarry Wentland dcc_control = dcc_control__128_128_xxx; 250bbeb64d0SHarry Wentland else 251bbeb64d0SHarry Wentland dcc_control = dcc_control__256_64_64; 252bbeb64d0SHarry Wentland } else { 253bbeb64d0SHarry Wentland if ((req128_horz_wc && 254bbeb64d0SHarry Wentland segment_order_horz == segment_order__non_contiguous) || 255bbeb64d0SHarry Wentland (req128_vert_wc && 256bbeb64d0SHarry Wentland segment_order_vert == segment_order__non_contiguous)) 257bbeb64d0SHarry Wentland /* access_dir not known, must use most constraining */ 258bbeb64d0SHarry Wentland dcc_control = dcc_control__256_64_64; 259bbeb64d0SHarry Wentland else 260bbeb64d0SHarry Wentland /* reg128 is true for either horz and vert 261bbeb64d0SHarry Wentland * but segment_order is contiguous 262bbeb64d0SHarry Wentland */ 263bbeb64d0SHarry Wentland dcc_control = dcc_control__128_128_xxx; 264bbeb64d0SHarry Wentland } 265bbeb64d0SHarry Wentland 266bbeb64d0SHarry Wentland /* Exception for 64KB_R_X */ 267bbeb64d0SHarry Wentland if ((bpe == 2) && (input->swizzle_mode == DC_SW_64KB_R_X)) 268bbeb64d0SHarry Wentland dcc_control = dcc_control__128_128_xxx; 269bbeb64d0SHarry Wentland 270bbeb64d0SHarry Wentland if (dc->debug.disable_dcc == DCC_HALF_REQ_DISALBE && 271bbeb64d0SHarry Wentland dcc_control != dcc_control__256_256_xxx) 272bbeb64d0SHarry Wentland return false; 273bbeb64d0SHarry Wentland 274bbeb64d0SHarry Wentland switch (dcc_control) { 275bbeb64d0SHarry Wentland case dcc_control__256_256_xxx: 276bbeb64d0SHarry Wentland output->grph.rgb.max_uncompressed_blk_size = 256; 277bbeb64d0SHarry Wentland output->grph.rgb.max_compressed_blk_size = 256; 278bbeb64d0SHarry Wentland output->grph.rgb.independent_64b_blks = false; 279bbeb64d0SHarry Wentland break; 280bbeb64d0SHarry Wentland case dcc_control__128_128_xxx: 281bbeb64d0SHarry Wentland output->grph.rgb.max_uncompressed_blk_size = 128; 282bbeb64d0SHarry Wentland output->grph.rgb.max_compressed_blk_size = 128; 283bbeb64d0SHarry Wentland output->grph.rgb.independent_64b_blks = false; 284bbeb64d0SHarry Wentland break; 285bbeb64d0SHarry Wentland case dcc_control__256_64_64: 286bbeb64d0SHarry Wentland output->grph.rgb.max_uncompressed_blk_size = 256; 287bbeb64d0SHarry Wentland output->grph.rgb.max_compressed_blk_size = 64; 288bbeb64d0SHarry Wentland output->grph.rgb.independent_64b_blks = true; 289bbeb64d0SHarry Wentland break; 290bbeb64d0SHarry Wentland } 291bbeb64d0SHarry Wentland output->capable = true; 292bbeb64d0SHarry Wentland output->const_color_support = true; 293bbeb64d0SHarry Wentland 294bbeb64d0SHarry Wentland return true; 295bbeb64d0SHarry Wentland } 296bbeb64d0SHarry Wentland 29778b67457SYongqiang Sun void hubbub2_setup_vmid_ptb(struct hubbub *hubbub, 298bbeb64d0SHarry Wentland uint64_t ptb, 299bbeb64d0SHarry Wentland uint8_t vmid) 300bbeb64d0SHarry Wentland { 301bbeb64d0SHarry Wentland struct dcn20_hubbub *hubbub1 = TO_DCN20_HUBBUB(hubbub); 302bbeb64d0SHarry Wentland 303bbeb64d0SHarry Wentland dcn20_vmid_set_ptb(&hubbub1->vmid[vmid], ptb); 304bbeb64d0SHarry Wentland } 305bbeb64d0SHarry Wentland 3063979efceSJun Lei static enum dcn_hubbub_page_table_depth page_table_depth_to_hw(unsigned int page_table_depth) 3073979efceSJun Lei { 3083979efceSJun Lei enum dcn_hubbub_page_table_depth depth = 0; 3093979efceSJun Lei 3103979efceSJun Lei switch (page_table_depth) { 3113979efceSJun Lei case 1: 3123979efceSJun Lei depth = DCN_PAGE_TABLE_DEPTH_1_LEVEL; 3133979efceSJun Lei break; 3143979efceSJun Lei case 2: 3153979efceSJun Lei depth = DCN_PAGE_TABLE_DEPTH_2_LEVEL; 3163979efceSJun Lei break; 3173979efceSJun Lei case 3: 3183979efceSJun Lei depth = DCN_PAGE_TABLE_DEPTH_3_LEVEL; 3193979efceSJun Lei break; 3203979efceSJun Lei case 4: 3213979efceSJun Lei depth = DCN_PAGE_TABLE_DEPTH_4_LEVEL; 3223979efceSJun Lei break; 3233979efceSJun Lei default: 3243979efceSJun Lei ASSERT(false); 3253979efceSJun Lei break; 3263979efceSJun Lei } 3273979efceSJun Lei 3283979efceSJun Lei return depth; 3293979efceSJun Lei } 3303979efceSJun Lei 3313979efceSJun Lei static enum dcn_hubbub_page_table_block_size page_table_block_size_to_hw(unsigned int page_table_block_size) 3323979efceSJun Lei { 3333979efceSJun Lei enum dcn_hubbub_page_table_block_size block_size = 0; 3343979efceSJun Lei 3353979efceSJun Lei switch (page_table_block_size) { 3363979efceSJun Lei case 4096: 3373979efceSJun Lei block_size = DCN_PAGE_TABLE_BLOCK_SIZE_4KB; 3383979efceSJun Lei break; 3393979efceSJun Lei case 65536: 3403979efceSJun Lei block_size = DCN_PAGE_TABLE_BLOCK_SIZE_64KB; 3413979efceSJun Lei break; 3423979efceSJun Lei default: 3433979efceSJun Lei ASSERT(false); 3443979efceSJun Lei break; 3453979efceSJun Lei } 3463979efceSJun Lei 3473979efceSJun Lei return block_size; 3483979efceSJun Lei } 349bbeb64d0SHarry Wentland 350bbeb64d0SHarry Wentland void hubbub2_init_dchub(struct hubbub *hubbub, 351bbeb64d0SHarry Wentland struct hubbub_addr_config *config) 352bbeb64d0SHarry Wentland { 353bbeb64d0SHarry Wentland int i; 354bbeb64d0SHarry Wentland struct dcn20_hubbub *hubbub1 = TO_DCN20_HUBBUB(hubbub); 355bbeb64d0SHarry Wentland struct dcn_vmid_page_table_config phys_config; 356bbeb64d0SHarry Wentland struct dcn_vmid_page_table_config virt_config; 357bbeb64d0SHarry Wentland 358bbeb64d0SHarry Wentland REG_SET(DCN_VM_FB_LOCATION_BASE, 0, 359bbeb64d0SHarry Wentland FB_BASE, config->pa_config.system_aperture.fb_base); 360bbeb64d0SHarry Wentland REG_SET(DCN_VM_FB_LOCATION_TOP, 0, 361bbeb64d0SHarry Wentland FB_TOP, config->pa_config.system_aperture.fb_top); 362bbeb64d0SHarry Wentland REG_SET(DCN_VM_FB_OFFSET, 0, 363bbeb64d0SHarry Wentland FB_OFFSET, config->pa_config.system_aperture.fb_offset); 364bbeb64d0SHarry Wentland REG_SET(DCN_VM_AGP_BOT, 0, 365bbeb64d0SHarry Wentland AGP_BOT, config->pa_config.system_aperture.agp_bot); 366bbeb64d0SHarry Wentland REG_SET(DCN_VM_AGP_TOP, 0, 367bbeb64d0SHarry Wentland AGP_TOP, config->pa_config.system_aperture.agp_top); 368bbeb64d0SHarry Wentland REG_SET(DCN_VM_AGP_BASE, 0, 369bbeb64d0SHarry Wentland AGP_BASE, config->pa_config.system_aperture.agp_base); 370bbeb64d0SHarry Wentland 3713979efceSJun Lei if (config->pa_config.gart_config.page_table_start_addr != config->pa_config.gart_config.page_table_end_addr) { 3723979efceSJun Lei phys_config.depth = 1; 3733979efceSJun Lei phys_config.block_size = 4096; 3743979efceSJun Lei phys_config.page_table_start_addr = config->pa_config.gart_config.page_table_start_addr >> 12; 3753979efceSJun Lei phys_config.page_table_end_addr = config->pa_config.gart_config.page_table_end_addr >> 12; 3763979efceSJun Lei 377bbeb64d0SHarry Wentland // Init VMID 0 based on PA config 378bbeb64d0SHarry Wentland dcn20_vmid_setup(&hubbub1->vmid[0], &phys_config); 379bbeb64d0SHarry Wentland dcn20_vmid_set_ptb(&hubbub1->vmid[0], config->pa_config.gart_config.page_table_base_addr); 3803979efceSJun Lei } 381bbeb64d0SHarry Wentland 3823979efceSJun Lei if (config->va_config.page_table_start_addr != config->va_config.page_table_end_addr) { 383bbeb64d0SHarry Wentland // Init VMID 1-15 based on VA config 384bbeb64d0SHarry Wentland for (i = 1; i < 16; i++) { 3853979efceSJun Lei virt_config.page_table_start_addr = config->va_config.page_table_start_addr >> 12; 3863979efceSJun Lei virt_config.page_table_end_addr = config->va_config.page_table_end_addr >> 12; 3873979efceSJun Lei virt_config.depth = page_table_depth_to_hw(config->va_config.page_table_depth); 3883979efceSJun Lei virt_config.block_size = page_table_block_size_to_hw(config->va_config.page_table_block_size); 389bbeb64d0SHarry Wentland 390bbeb64d0SHarry Wentland dcn20_vmid_setup(&hubbub1->vmid[i], &virt_config); 391bbeb64d0SHarry Wentland } 392bbeb64d0SHarry Wentland } 3933979efceSJun Lei } 394bbeb64d0SHarry Wentland 395bbeb64d0SHarry Wentland void hubbub2_update_dchub(struct hubbub *hubbub, 396bbeb64d0SHarry Wentland struct dchub_init_data *dh_data) 397bbeb64d0SHarry Wentland { 398bbeb64d0SHarry Wentland struct dcn20_hubbub *hubbub1 = TO_DCN20_HUBBUB(hubbub); 399bbeb64d0SHarry Wentland 400bbeb64d0SHarry Wentland if (REG(DCHUBBUB_SDPIF_FB_TOP) == 0) { 401bbeb64d0SHarry Wentland ASSERT(false); 402bbeb64d0SHarry Wentland /*should not come here*/ 403bbeb64d0SHarry Wentland return; 404bbeb64d0SHarry Wentland } 405bbeb64d0SHarry Wentland /* TODO: port code from dal2 */ 406bbeb64d0SHarry Wentland switch (dh_data->fb_mode) { 407bbeb64d0SHarry Wentland case FRAME_BUFFER_MODE_ZFB_ONLY: 408bbeb64d0SHarry Wentland /*For ZFB case need to put DCHUB FB BASE and TOP upside down to indicate ZFB mode*/ 409bbeb64d0SHarry Wentland REG_UPDATE(DCHUBBUB_SDPIF_FB_TOP, 410bbeb64d0SHarry Wentland SDPIF_FB_TOP, 0); 411bbeb64d0SHarry Wentland 412bbeb64d0SHarry Wentland REG_UPDATE(DCHUBBUB_SDPIF_FB_BASE, 413bbeb64d0SHarry Wentland SDPIF_FB_BASE, 0x0FFFF); 414bbeb64d0SHarry Wentland 415bbeb64d0SHarry Wentland REG_UPDATE(DCHUBBUB_SDPIF_AGP_BASE, 416bbeb64d0SHarry Wentland SDPIF_AGP_BASE, dh_data->zfb_phys_addr_base >> 22); 417bbeb64d0SHarry Wentland 418bbeb64d0SHarry Wentland REG_UPDATE(DCHUBBUB_SDPIF_AGP_BOT, 419bbeb64d0SHarry Wentland SDPIF_AGP_BOT, dh_data->zfb_mc_base_addr >> 22); 420bbeb64d0SHarry Wentland 421bbeb64d0SHarry Wentland REG_UPDATE(DCHUBBUB_SDPIF_AGP_TOP, 422bbeb64d0SHarry Wentland SDPIF_AGP_TOP, (dh_data->zfb_mc_base_addr + 423bbeb64d0SHarry Wentland dh_data->zfb_size_in_byte - 1) >> 22); 424bbeb64d0SHarry Wentland break; 425bbeb64d0SHarry Wentland case FRAME_BUFFER_MODE_MIXED_ZFB_AND_LOCAL: 426bbeb64d0SHarry Wentland /*Should not touch FB LOCATION (done by VBIOS on AsicInit table)*/ 427bbeb64d0SHarry Wentland 428bbeb64d0SHarry Wentland REG_UPDATE(DCHUBBUB_SDPIF_AGP_BASE, 429bbeb64d0SHarry Wentland SDPIF_AGP_BASE, dh_data->zfb_phys_addr_base >> 22); 430bbeb64d0SHarry Wentland 431bbeb64d0SHarry Wentland REG_UPDATE(DCHUBBUB_SDPIF_AGP_BOT, 432bbeb64d0SHarry Wentland SDPIF_AGP_BOT, dh_data->zfb_mc_base_addr >> 22); 433bbeb64d0SHarry Wentland 434bbeb64d0SHarry Wentland REG_UPDATE(DCHUBBUB_SDPIF_AGP_TOP, 435bbeb64d0SHarry Wentland SDPIF_AGP_TOP, (dh_data->zfb_mc_base_addr + 436bbeb64d0SHarry Wentland dh_data->zfb_size_in_byte - 1) >> 22); 437bbeb64d0SHarry Wentland break; 438bbeb64d0SHarry Wentland case FRAME_BUFFER_MODE_LOCAL_ONLY: 439bbeb64d0SHarry Wentland /*Should not touch FB LOCATION (done by VBIOS on AsicInit table)*/ 440bbeb64d0SHarry Wentland REG_UPDATE(DCHUBBUB_SDPIF_AGP_BASE, 441bbeb64d0SHarry Wentland SDPIF_AGP_BASE, 0); 442bbeb64d0SHarry Wentland 443bbeb64d0SHarry Wentland REG_UPDATE(DCHUBBUB_SDPIF_AGP_BOT, 444bbeb64d0SHarry Wentland SDPIF_AGP_BOT, 0X03FFFF); 445bbeb64d0SHarry Wentland 446bbeb64d0SHarry Wentland REG_UPDATE(DCHUBBUB_SDPIF_AGP_TOP, 447bbeb64d0SHarry Wentland SDPIF_AGP_TOP, 0); 448bbeb64d0SHarry Wentland break; 449bbeb64d0SHarry Wentland default: 450bbeb64d0SHarry Wentland break; 451bbeb64d0SHarry Wentland } 452bbeb64d0SHarry Wentland 453bbeb64d0SHarry Wentland dh_data->dchub_initialzied = true; 454bbeb64d0SHarry Wentland dh_data->dchub_info_valid = false; 455bbeb64d0SHarry Wentland } 456bbeb64d0SHarry Wentland 457bbeb64d0SHarry Wentland void hubbub2_wm_read_state(struct hubbub *hubbub, 458bbeb64d0SHarry Wentland struct dcn_hubbub_wm *wm) 459bbeb64d0SHarry Wentland { 460bbeb64d0SHarry Wentland struct dcn20_hubbub *hubbub1 = TO_DCN20_HUBBUB(hubbub); 461bbeb64d0SHarry Wentland 462bbeb64d0SHarry Wentland struct dcn_hubbub_wm_set *s; 463bbeb64d0SHarry Wentland 464bbeb64d0SHarry Wentland memset(wm, 0, sizeof(struct dcn_hubbub_wm)); 465bbeb64d0SHarry Wentland 466bbeb64d0SHarry Wentland s = &wm->sets[0]; 467bbeb64d0SHarry Wentland s->wm_set = 0; 468bbeb64d0SHarry Wentland s->data_urgent = REG_READ(DCHUBBUB_ARB_DATA_URGENCY_WATERMARK_A); 469bbeb64d0SHarry Wentland if (REG(DCHUBBUB_ARB_PTE_META_URGENCY_WATERMARK_A)) 470bbeb64d0SHarry Wentland s->pte_meta_urgent = REG_READ(DCHUBBUB_ARB_PTE_META_URGENCY_WATERMARK_A); 471bbeb64d0SHarry Wentland if (REG(DCHUBBUB_ARB_ALLOW_SR_ENTER_WATERMARK_A)) { 472bbeb64d0SHarry Wentland s->sr_enter = REG_READ(DCHUBBUB_ARB_ALLOW_SR_ENTER_WATERMARK_A); 473bbeb64d0SHarry Wentland s->sr_exit = REG_READ(DCHUBBUB_ARB_ALLOW_SR_EXIT_WATERMARK_A); 474bbeb64d0SHarry Wentland } 475bbeb64d0SHarry Wentland s->dram_clk_chanage = REG_READ(DCHUBBUB_ARB_ALLOW_DRAM_CLK_CHANGE_WATERMARK_A); 476bbeb64d0SHarry Wentland 477bbeb64d0SHarry Wentland s = &wm->sets[1]; 478bbeb64d0SHarry Wentland s->wm_set = 1; 479bbeb64d0SHarry Wentland s->data_urgent = REG_READ(DCHUBBUB_ARB_DATA_URGENCY_WATERMARK_B); 480bbeb64d0SHarry Wentland if (REG(DCHUBBUB_ARB_PTE_META_URGENCY_WATERMARK_B)) 481bbeb64d0SHarry Wentland s->pte_meta_urgent = REG_READ(DCHUBBUB_ARB_PTE_META_URGENCY_WATERMARK_B); 482bbeb64d0SHarry Wentland if (REG(DCHUBBUB_ARB_ALLOW_SR_ENTER_WATERMARK_B)) { 483bbeb64d0SHarry Wentland s->sr_enter = REG_READ(DCHUBBUB_ARB_ALLOW_SR_ENTER_WATERMARK_B); 484bbeb64d0SHarry Wentland s->sr_exit = REG_READ(DCHUBBUB_ARB_ALLOW_SR_EXIT_WATERMARK_B); 485bbeb64d0SHarry Wentland } 486bbeb64d0SHarry Wentland s->dram_clk_chanage = REG_READ(DCHUBBUB_ARB_ALLOW_DRAM_CLK_CHANGE_WATERMARK_B); 487bbeb64d0SHarry Wentland 488bbeb64d0SHarry Wentland s = &wm->sets[2]; 489bbeb64d0SHarry Wentland s->wm_set = 2; 490bbeb64d0SHarry Wentland s->data_urgent = REG_READ(DCHUBBUB_ARB_DATA_URGENCY_WATERMARK_C); 491bbeb64d0SHarry Wentland if (REG(DCHUBBUB_ARB_PTE_META_URGENCY_WATERMARK_C)) 492bbeb64d0SHarry Wentland s->pte_meta_urgent = REG_READ(DCHUBBUB_ARB_PTE_META_URGENCY_WATERMARK_C); 493bbeb64d0SHarry Wentland if (REG(DCHUBBUB_ARB_ALLOW_SR_ENTER_WATERMARK_C)) { 494bbeb64d0SHarry Wentland s->sr_enter = REG_READ(DCHUBBUB_ARB_ALLOW_SR_ENTER_WATERMARK_C); 495bbeb64d0SHarry Wentland s->sr_exit = REG_READ(DCHUBBUB_ARB_ALLOW_SR_EXIT_WATERMARK_C); 496bbeb64d0SHarry Wentland } 497bbeb64d0SHarry Wentland s->dram_clk_chanage = REG_READ(DCHUBBUB_ARB_ALLOW_DRAM_CLK_CHANGE_WATERMARK_C); 498bbeb64d0SHarry Wentland 499bbeb64d0SHarry Wentland s = &wm->sets[3]; 500bbeb64d0SHarry Wentland s->wm_set = 3; 501bbeb64d0SHarry Wentland s->data_urgent = REG_READ(DCHUBBUB_ARB_DATA_URGENCY_WATERMARK_D); 502bbeb64d0SHarry Wentland if (REG(DCHUBBUB_ARB_PTE_META_URGENCY_WATERMARK_D)) 503bbeb64d0SHarry Wentland s->pte_meta_urgent = REG_READ(DCHUBBUB_ARB_PTE_META_URGENCY_WATERMARK_D); 504bbeb64d0SHarry Wentland if (REG(DCHUBBUB_ARB_ALLOW_SR_ENTER_WATERMARK_D)) { 505bbeb64d0SHarry Wentland s->sr_enter = REG_READ(DCHUBBUB_ARB_ALLOW_SR_ENTER_WATERMARK_D); 506bbeb64d0SHarry Wentland s->sr_exit = REG_READ(DCHUBBUB_ARB_ALLOW_SR_EXIT_WATERMARK_D); 507bbeb64d0SHarry Wentland } 508bbeb64d0SHarry Wentland s->dram_clk_chanage = REG_READ(DCHUBBUB_ARB_ALLOW_DRAM_CLK_CHANGE_WATERMARK_D); 509bbeb64d0SHarry Wentland } 510bbeb64d0SHarry Wentland 511bbeb64d0SHarry Wentland void hubbub2_get_dchub_ref_freq(struct hubbub *hubbub, 512bbeb64d0SHarry Wentland unsigned int dccg_ref_freq_inKhz, 513bbeb64d0SHarry Wentland unsigned int *dchub_ref_freq_inKhz) 514bbeb64d0SHarry Wentland { 515bbeb64d0SHarry Wentland struct dcn20_hubbub *hubbub1 = TO_DCN20_HUBBUB(hubbub); 516bbeb64d0SHarry Wentland uint32_t ref_div = 0; 517bbeb64d0SHarry Wentland uint32_t ref_en = 0; 518bbeb64d0SHarry Wentland 519bbeb64d0SHarry Wentland REG_GET_2(DCHUBBUB_GLOBAL_TIMER_CNTL, DCHUBBUB_GLOBAL_TIMER_REFDIV, &ref_div, 520bbeb64d0SHarry Wentland DCHUBBUB_GLOBAL_TIMER_ENABLE, &ref_en); 521bbeb64d0SHarry Wentland 522bbeb64d0SHarry Wentland if (ref_en) { 523bbeb64d0SHarry Wentland if (ref_div == 2) 524bbeb64d0SHarry Wentland *dchub_ref_freq_inKhz = dccg_ref_freq_inKhz / 2; 525bbeb64d0SHarry Wentland else 526bbeb64d0SHarry Wentland *dchub_ref_freq_inKhz = dccg_ref_freq_inKhz; 527bbeb64d0SHarry Wentland 528bbeb64d0SHarry Wentland // DC hub reference frequency must be around 50Mhz, otherwise there may be 529bbeb64d0SHarry Wentland // overflow/underflow issues when doing HUBBUB programming 530bbeb64d0SHarry Wentland if (*dchub_ref_freq_inKhz < 40000 || *dchub_ref_freq_inKhz > 60000) 531bbeb64d0SHarry Wentland ASSERT_CRITICAL(false); 532bbeb64d0SHarry Wentland 533bbeb64d0SHarry Wentland return; 534bbeb64d0SHarry Wentland } else { 535bbeb64d0SHarry Wentland *dchub_ref_freq_inKhz = dccg_ref_freq_inKhz; 536bbeb64d0SHarry Wentland 537bbeb64d0SHarry Wentland // HUBBUB global timer must be enabled. 538bbeb64d0SHarry Wentland ASSERT_CRITICAL(false); 539bbeb64d0SHarry Wentland return; 540bbeb64d0SHarry Wentland } 541bbeb64d0SHarry Wentland } 542bbeb64d0SHarry Wentland 543040a4d63SYongqiang Sun static void hubbub2_program_watermarks( 544040a4d63SYongqiang Sun struct hubbub *hubbub, 545040a4d63SYongqiang Sun struct dcn_watermark_set *watermarks, 546040a4d63SYongqiang Sun unsigned int refclk_mhz, 547040a4d63SYongqiang Sun bool safe_to_lower) 548040a4d63SYongqiang Sun { 549040a4d63SYongqiang Sun struct dcn20_hubbub *hubbub1 = TO_DCN20_HUBBUB(hubbub); 550040a4d63SYongqiang Sun /* 551040a4d63SYongqiang Sun * Need to clamp to max of the register values (i.e. no wrap) 552040a4d63SYongqiang Sun * for dcn1, all wm registers are 21-bit wide 553040a4d63SYongqiang Sun */ 554040a4d63SYongqiang Sun hubbub1_program_urgent_watermarks(hubbub, watermarks, refclk_mhz, safe_to_lower); 555040a4d63SYongqiang Sun hubbub1_program_stutter_watermarks(hubbub, watermarks, refclk_mhz, safe_to_lower); 556040a4d63SYongqiang Sun hubbub1_program_pstate_watermarks(hubbub, watermarks, refclk_mhz, safe_to_lower); 557040a4d63SYongqiang Sun 558040a4d63SYongqiang Sun REG_SET(DCHUBBUB_ARB_SAT_LEVEL, 0, 559040a4d63SYongqiang Sun DCHUBBUB_ARB_SAT_LEVEL, 60 * refclk_mhz); 560040a4d63SYongqiang Sun REG_UPDATE(DCHUBBUB_ARB_DF_REQ_OUTSTAND, DCHUBBUB_ARB_MIN_REQ_OUTSTAND, 180); 561040a4d63SYongqiang Sun 562040a4d63SYongqiang Sun hubbub1_allow_self_refresh_control(hubbub, !hubbub->ctx->dc->debug.disable_stutter); 563040a4d63SYongqiang Sun } 564040a4d63SYongqiang Sun 565bbeb64d0SHarry Wentland static const struct hubbub_funcs hubbub2_funcs = { 566bbeb64d0SHarry Wentland .update_dchub = hubbub2_update_dchub, 567bbeb64d0SHarry Wentland .init_dchub = hubbub2_init_dchub, 568bbeb64d0SHarry Wentland .setup_vmid_ptb = hubbub2_setup_vmid_ptb, 569bbeb64d0SHarry Wentland .dcc_support_swizzle = hubbub2_dcc_support_swizzle, 570bbeb64d0SHarry Wentland .dcc_support_pixel_format = hubbub2_dcc_support_pixel_format, 571bbeb64d0SHarry Wentland .get_dcc_compression_cap = hubbub2_get_dcc_compression_cap, 572bbeb64d0SHarry Wentland .wm_read_state = hubbub2_wm_read_state, 573bbeb64d0SHarry Wentland .get_dchub_ref_freq = hubbub2_get_dchub_ref_freq, 574040a4d63SYongqiang Sun .program_watermarks = hubbub2_program_watermarks, 575bbeb64d0SHarry Wentland }; 576bbeb64d0SHarry Wentland 577bbeb64d0SHarry Wentland void hubbub2_construct(struct dcn20_hubbub *hubbub, 578bbeb64d0SHarry Wentland struct dc_context *ctx, 579bbeb64d0SHarry Wentland const struct dcn_hubbub_registers *hubbub_regs, 580bbeb64d0SHarry Wentland const struct dcn_hubbub_shift *hubbub_shift, 581bbeb64d0SHarry Wentland const struct dcn_hubbub_mask *hubbub_mask) 582bbeb64d0SHarry Wentland { 583bbeb64d0SHarry Wentland hubbub->base.ctx = ctx; 584bbeb64d0SHarry Wentland 585bbeb64d0SHarry Wentland hubbub->base.funcs = &hubbub2_funcs; 586bbeb64d0SHarry Wentland 587bbeb64d0SHarry Wentland hubbub->regs = hubbub_regs; 588bbeb64d0SHarry Wentland hubbub->shifts = hubbub_shift; 589bbeb64d0SHarry Wentland hubbub->masks = hubbub_mask; 590bbeb64d0SHarry Wentland 591bbeb64d0SHarry Wentland hubbub->debug_test_index_pstate = 0xB; 592bbeb64d0SHarry Wentland } 593