1 /* 2 * Copyright 2012-17 Advanced Micro Devices, Inc. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included in 12 * all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 * 22 * Authors: AMD 23 * 24 */ 25 26 27 #include "reg_helper.h" 28 #include "resource.h" 29 #include "dwb.h" 30 #include "dcn20_dwb.h" 31 32 33 #define REG(reg)\ 34 dwbc20->dwbc_regs->reg 35 36 #define CTX \ 37 dwbc20->base.ctx 38 39 #undef FN 40 #define FN(reg_name, field_name) \ 41 dwbc20->dwbc_shift->field_name, dwbc20->dwbc_mask->field_name 42 43 enum dwb_outside_pix_strategy { 44 DWB_OUTSIDE_PIX_STRATEGY_BLACK = 0, 45 DWB_OUTSIDE_PIX_STRATEGY_EDGE = 1 46 }; 47 48 static bool dwb2_get_caps(struct dwbc *dwbc, struct dwb_caps *caps) 49 { 50 if (caps) { 51 caps->adapter_id = 0; /* we only support 1 adapter currently */ 52 caps->hw_version = DCN_VERSION_2_0; 53 caps->num_pipes = 1; 54 memset(&caps->reserved, 0, sizeof(caps->reserved)); 55 memset(&caps->reserved2, 0, sizeof(caps->reserved2)); 56 caps->sw_version = dwb_ver_1_0; 57 caps->caps.support_dwb = true; 58 caps->caps.support_ogam = false; 59 caps->caps.support_wbscl = false; 60 caps->caps.support_ocsc = false; 61 return true; 62 } else { 63 return false; 64 } 65 } 66 67 void dwb2_config_dwb_cnv(struct dwbc *dwbc, struct dc_dwb_params *params) 68 { 69 struct dcn20_dwbc *dwbc20 = TO_DCN20_DWBC(dwbc); 70 71 /* Set DWB source size */ 72 REG_UPDATE_2(CNV_SOURCE_SIZE, CNV_SOURCE_WIDTH, params->cnv_params.src_width, 73 CNV_SOURCE_HEIGHT, params->cnv_params.src_height); 74 75 /* source size is not equal the source size, then enable cropping. */ 76 if (params->cnv_params.crop_en) { 77 REG_UPDATE(CNV_MODE, CNV_WINDOW_CROP_EN, 1); 78 REG_UPDATE(CNV_WINDOW_START, CNV_WINDOW_START_X, params->cnv_params.crop_x); 79 REG_UPDATE(CNV_WINDOW_START, CNV_WINDOW_START_Y, params->cnv_params.crop_y); 80 REG_UPDATE(CNV_WINDOW_SIZE, CNV_WINDOW_WIDTH, params->cnv_params.crop_width); 81 REG_UPDATE(CNV_WINDOW_SIZE, CNV_WINDOW_HEIGHT, params->cnv_params.crop_height); 82 } else { 83 REG_UPDATE(CNV_MODE, CNV_WINDOW_CROP_EN, 0); 84 } 85 86 /* Set CAPTURE_RATE */ 87 REG_UPDATE(CNV_MODE, CNV_FRAME_CAPTURE_RATE, params->capture_rate); 88 89 /* Set CNV output pixel depth */ 90 REG_UPDATE(CNV_MODE, CNV_OUT_BPC, params->cnv_params.cnv_out_bpc); 91 } 92 93 static bool dwb2_enable(struct dwbc *dwbc, struct dc_dwb_params *params) 94 { 95 struct dcn20_dwbc *dwbc20 = TO_DCN20_DWBC(dwbc); 96 97 /* Only chroma scaling (sub-sampling) is supported in DCN2 */ 98 if ((params->cnv_params.src_width != params->dest_width) 99 || (params->cnv_params.src_height != params->dest_height)) { 100 return false; 101 } 102 103 /* disable power gating */ 104 //REG_UPDATE_5(WB_EC_CONFIG, DISPCLK_R_WB_GATE_DIS, 1, 105 // DISPCLK_G_WB_GATE_DIS, 1, DISPCLK_G_WBSCL_GATE_DIS, 1, 106 // WB_LB_LS_DIS, 1, WB_LUT_LS_DIS, 1); 107 108 /* Set WB_ENABLE (not double buffered; capture not enabled) */ 109 REG_UPDATE(WB_ENABLE, WB_ENABLE, 1); 110 111 /* Set CNV parameters */ 112 dwb2_config_dwb_cnv(dwbc, params); 113 114 /* Set scaling parameters */ 115 dwb2_set_scaler(dwbc, params); 116 117 /* Enable DWB capture enable (double buffered) */ 118 REG_UPDATE(CNV_MODE, CNV_FRAME_CAPTURE_EN, DWB_FRAME_CAPTURE_ENABLE); 119 120 // disable warmup 121 REG_UPDATE(WB_WARM_UP_MODE_CTL1, GMC_WARM_UP_ENABLE, 0); 122 123 return true; 124 } 125 126 bool dwb2_disable(struct dwbc *dwbc) 127 { 128 struct dcn20_dwbc *dwbc20 = TO_DCN20_DWBC(dwbc); 129 130 /* disable CNV */ 131 REG_UPDATE(CNV_MODE, CNV_FRAME_CAPTURE_EN, DWB_FRAME_CAPTURE_DISABLE); 132 133 /* disable WB */ 134 REG_UPDATE(WB_ENABLE, WB_ENABLE, 0); 135 136 /* soft reset */ 137 REG_UPDATE(WB_SOFT_RESET, WB_SOFT_RESET, 1); 138 REG_UPDATE(WB_SOFT_RESET, WB_SOFT_RESET, 0); 139 140 /* enable power gating */ 141 //REG_UPDATE_5(WB_EC_CONFIG, DISPCLK_R_WB_GATE_DIS, 0, 142 // DISPCLK_G_WB_GATE_DIS, 0, DISPCLK_G_WBSCL_GATE_DIS, 0, 143 // WB_LB_LS_DIS, 0, WB_LUT_LS_DIS, 0); 144 145 return true; 146 } 147 148 static bool dwb2_update(struct dwbc *dwbc, struct dc_dwb_params *params) 149 { 150 struct dcn20_dwbc *dwbc20 = TO_DCN20_DWBC(dwbc); 151 unsigned int pre_locked; 152 153 /* Only chroma scaling (sub-sampling) is supported in DCN2 */ 154 if ((params->cnv_params.src_width != params->dest_width) 155 || (params->cnv_params.src_height != params->dest_height)) { 156 return false; 157 } 158 159 /* 160 * Check if the caller has already locked CNV registers. 161 * If so: assume the caller will unlock, so don't touch the lock. 162 * If not: lock them for this update, then unlock after the 163 * update is complete. 164 */ 165 REG_GET(CNV_UPDATE, CNV_UPDATE_LOCK, &pre_locked); 166 167 if (pre_locked == 0) { 168 /* Lock DWB registers */ 169 REG_UPDATE(CNV_UPDATE, CNV_UPDATE_LOCK, 1); 170 } 171 172 /* Set CNV parameters */ 173 dwb2_config_dwb_cnv(dwbc, params); 174 175 /* Set scaling parameters */ 176 dwb2_set_scaler(dwbc, params); 177 178 if (pre_locked == 0) { 179 /* Unlock DWB registers */ 180 REG_UPDATE(CNV_UPDATE, CNV_UPDATE_LOCK, 0); 181 } 182 183 return true; 184 } 185 186 bool dwb2_is_enabled(struct dwbc *dwbc) 187 { 188 struct dcn20_dwbc *dwbc20 = TO_DCN20_DWBC(dwbc); 189 unsigned int wb_enabled = 0; 190 unsigned int cnv_frame_capture_en = 0; 191 192 REG_GET(WB_ENABLE, WB_ENABLE, &wb_enabled); 193 REG_GET(CNV_MODE, CNV_FRAME_CAPTURE_EN, &cnv_frame_capture_en); 194 195 return ((wb_enabled != 0) && (cnv_frame_capture_en != 0)); 196 } 197 198 void dwb2_set_stereo(struct dwbc *dwbc, 199 struct dwb_stereo_params *stereo_params) 200 { 201 struct dcn20_dwbc *dwbc20 = TO_DCN20_DWBC(dwbc); 202 203 if (stereo_params->stereo_enabled) { 204 REG_UPDATE(CNV_MODE, CNV_STEREO_TYPE, stereo_params->stereo_type); 205 REG_UPDATE(CNV_MODE, CNV_EYE_SELECTION, stereo_params->stereo_eye_select); 206 REG_UPDATE(CNV_MODE, CNV_STEREO_POLARITY, stereo_params->stereo_polarity); 207 } else { 208 REG_UPDATE(CNV_MODE, CNV_EYE_SELECTION, 0); 209 } 210 } 211 212 void dwb2_set_new_content(struct dwbc *dwbc, 213 bool is_new_content) 214 { 215 struct dcn20_dwbc *dwbc20 = TO_DCN20_DWBC(dwbc); 216 217 REG_UPDATE(CNV_MODE, CNV_NEW_CONTENT, is_new_content); 218 } 219 220 static void dwb2_set_warmup(struct dwbc *dwbc, 221 struct dwb_warmup_params *warmup_params) 222 { 223 struct dcn20_dwbc *dwbc20 = TO_DCN20_DWBC(dwbc); 224 225 REG_UPDATE(WB_WARM_UP_MODE_CTL1, GMC_WARM_UP_ENABLE, warmup_params->warmup_en); 226 REG_UPDATE(WB_WARM_UP_MODE_CTL1, WIDTH_WARMUP, warmup_params->warmup_width); 227 REG_UPDATE(WB_WARM_UP_MODE_CTL1, HEIGHT_WARMUP, warmup_params->warmup_height); 228 229 REG_UPDATE(WB_WARM_UP_MODE_CTL2, DATA_VALUE_WARMUP, warmup_params->warmup_data); 230 REG_UPDATE(WB_WARM_UP_MODE_CTL2, MODE_WARMUP, warmup_params->warmup_mode); 231 REG_UPDATE(WB_WARM_UP_MODE_CTL2, DATA_DEPTH_WARMUP, warmup_params->warmup_depth); 232 } 233 234 void dwb2_set_scaler(struct dwbc *dwbc, struct dc_dwb_params *params) 235 { 236 struct dcn20_dwbc *dwbc20 = TO_DCN20_DWBC(dwbc); 237 238 /* Program scaling mode */ 239 REG_UPDATE_2(WBSCL_MODE, WBSCL_MODE, params->out_format, 240 WBSCL_OUT_BIT_DEPTH, params->output_depth); 241 242 if (params->out_format != dwb_scaler_mode_bypass444) { 243 /* Program output size */ 244 REG_UPDATE(WBSCL_DEST_SIZE, WBSCL_DEST_WIDTH, params->dest_width); 245 REG_UPDATE(WBSCL_DEST_SIZE, WBSCL_DEST_HEIGHT, params->dest_height); 246 247 /* Program round offsets */ 248 REG_UPDATE(WBSCL_ROUND_OFFSET, WBSCL_ROUND_OFFSET_Y_RGB, 0x40); 249 REG_UPDATE(WBSCL_ROUND_OFFSET, WBSCL_ROUND_OFFSET_CBCR, 0x200); 250 251 /* Program clamp values */ 252 REG_UPDATE(WBSCL_CLAMP_Y_RGB, WBSCL_CLAMP_UPPER_Y_RGB, 0x3fe); 253 REG_UPDATE(WBSCL_CLAMP_Y_RGB, WBSCL_CLAMP_LOWER_Y_RGB, 0x1); 254 REG_UPDATE(WBSCL_CLAMP_CBCR, WBSCL_CLAMP_UPPER_CBCR, 0x3fe); 255 REG_UPDATE(WBSCL_CLAMP_CBCR, WBSCL_CLAMP_LOWER_CBCR, 0x1); 256 257 /* Program outside pixel strategy to use edge pixels */ 258 REG_UPDATE(WBSCL_OUTSIDE_PIX_STRATEGY, WBSCL_OUTSIDE_PIX_STRATEGY, DWB_OUTSIDE_PIX_STRATEGY_EDGE); 259 260 if (params->cnv_params.crop_en) { 261 /* horizontal scale */ 262 dwb_program_horz_scalar(dwbc20, params->cnv_params.crop_width, 263 params->dest_width, 264 params->scaler_taps); 265 266 /* vertical scale */ 267 dwb_program_vert_scalar(dwbc20, params->cnv_params.crop_height, 268 params->dest_height, 269 params->scaler_taps, 270 params->subsample_position); 271 } else { 272 /* horizontal scale */ 273 dwb_program_horz_scalar(dwbc20, params->cnv_params.src_width, 274 params->dest_width, 275 params->scaler_taps); 276 277 /* vertical scale */ 278 dwb_program_vert_scalar(dwbc20, params->cnv_params.src_height, 279 params->dest_height, 280 params->scaler_taps, 281 params->subsample_position); 282 } 283 } 284 285 } 286 287 const struct dwbc_funcs dcn20_dwbc_funcs = { 288 .get_caps = dwb2_get_caps, 289 .enable = dwb2_enable, 290 .disable = dwb2_disable, 291 .update = dwb2_update, 292 .is_enabled = dwb2_is_enabled, 293 .set_stereo = dwb2_set_stereo, 294 .set_new_content = dwb2_set_new_content, 295 .set_warmup = dwb2_set_warmup, 296 .dwb_set_scaler = dwb2_set_scaler, 297 }; 298 299 void dcn20_dwbc_construct(struct dcn20_dwbc *dwbc20, 300 struct dc_context *ctx, 301 const struct dcn20_dwbc_registers *dwbc_regs, 302 const struct dcn20_dwbc_shift *dwbc_shift, 303 const struct dcn20_dwbc_mask *dwbc_mask, 304 int inst) 305 { 306 dwbc20->base.ctx = ctx; 307 308 dwbc20->base.inst = inst; 309 dwbc20->base.funcs = &dcn20_dwbc_funcs; 310 311 dwbc20->dwbc_regs = dwbc_regs; 312 dwbc20->dwbc_shift = dwbc_shift; 313 dwbc20->dwbc_mask = dwbc_mask; 314 } 315 316