1 /*
2  * Copyright 2018 Advanced Micro Devices, Inc.
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a
5  * copy of this software and associated documentation files (the "Software"),
6  * to deal in the Software without restriction, including without limitation
7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8  * and/or sell copies of the Software, and to permit persons to whom the
9  * Software is furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice shall be included in
12  * all copies or substantial portions of the Software.
13  *
14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20  * OTHER DEALINGS IN THE SOFTWARE.
21  *
22  * Authors: AMD
23  *
24  */
25 
26 #ifndef __DCN20_DCCG_H__
27 #define __DCN20_DCCG_H__
28 
29 #include "dccg.h"
30 
31 #define DCCG_COMMON_REG_LIST_DCN_BASE() \
32 	SR(DPPCLK_DTO_CTRL),\
33 	DCCG_SRII(DTO_PARAM, DPPCLK, 0),\
34 	DCCG_SRII(DTO_PARAM, DPPCLK, 1),\
35 	DCCG_SRII(DTO_PARAM, DPPCLK, 2),\
36 	DCCG_SRII(DTO_PARAM, DPPCLK, 3),\
37 	SR(REFCLK_CNTL)
38 
39 #define DCCG_REG_LIST_DCN2() \
40 	DCCG_COMMON_REG_LIST_DCN_BASE(),\
41 	DCCG_SRII(DTO_PARAM, DPPCLK, 4),\
42 	DCCG_SRII(DTO_PARAM, DPPCLK, 5)
43 
44 #define DCCG_SF(reg_name, field_name, post_fix)\
45 	.field_name = reg_name ## __ ## field_name ## post_fix
46 
47 #define DCCG_SFI(reg_name, field_name, field_prefix, inst, post_fix)\
48 	.field_prefix ## _ ## field_name[inst] = reg_name ## __ ## field_prefix ## inst ## _ ## field_name ## post_fix
49 
50 #define DCCG_COMMON_MASK_SH_LIST_DCN_COMMON_BASE(mask_sh) \
51 	DCCG_SFI(DPPCLK_DTO_CTRL, DTO_ENABLE, DPPCLK, 0, mask_sh),\
52 	DCCG_SFI(DPPCLK_DTO_CTRL, DTO_DB_EN, DPPCLK, 0, mask_sh),\
53 	DCCG_SFI(DPPCLK_DTO_CTRL, DTO_ENABLE, DPPCLK, 1, mask_sh),\
54 	DCCG_SFI(DPPCLK_DTO_CTRL, DTO_DB_EN, DPPCLK, 1, mask_sh),\
55 	DCCG_SFI(DPPCLK_DTO_CTRL, DTO_ENABLE, DPPCLK, 2, mask_sh),\
56 	DCCG_SFI(DPPCLK_DTO_CTRL, DTO_DB_EN, DPPCLK, 2, mask_sh),\
57 	DCCG_SFI(DPPCLK_DTO_CTRL, DTO_ENABLE, DPPCLK, 3, mask_sh),\
58 	DCCG_SFI(DPPCLK_DTO_CTRL, DTO_DB_EN, DPPCLK, 3, mask_sh),\
59 	DCCG_SF(DPPCLK0_DTO_PARAM, DPPCLK0_DTO_PHASE, mask_sh),\
60 	DCCG_SF(DPPCLK0_DTO_PARAM, DPPCLK0_DTO_MODULO, mask_sh),\
61 	DCCG_SF(REFCLK_CNTL, REFCLK_CLOCK_EN, mask_sh),\
62 	DCCG_SF(REFCLK_CNTL, REFCLK_SRC_SEL, mask_sh)
63 
64 #define DCCG_MASK_SH_LIST_DCN2(mask_sh) \
65 	DCCG_COMMON_MASK_SH_LIST_DCN_COMMON_BASE(mask_sh),\
66 	DCCG_SFI(DPPCLK_DTO_CTRL, DTO_ENABLE, DPPCLK, 4, mask_sh),\
67 	DCCG_SFI(DPPCLK_DTO_CTRL, DTO_DB_EN, DPPCLK, 4, mask_sh),\
68 	DCCG_SFI(DPPCLK_DTO_CTRL, DTO_ENABLE, DPPCLK, 5, mask_sh),\
69 	DCCG_SFI(DPPCLK_DTO_CTRL, DTO_DB_EN, DPPCLK, 5, mask_sh)
70 
71 #define DCCG_REG_FIELD_LIST(type) \
72 	type DPPCLK0_DTO_PHASE;\
73 	type DPPCLK0_DTO_MODULO;\
74 	type DPPCLK_DTO_ENABLE[6];\
75 	type DPPCLK_DTO_DB_EN[6];\
76 	type REFCLK_CLOCK_EN;\
77 	type REFCLK_SRC_SEL;
78 
79 struct dccg_shift {
80 	DCCG_REG_FIELD_LIST(uint8_t)
81 };
82 
83 struct dccg_mask {
84 	DCCG_REG_FIELD_LIST(uint32_t)
85 };
86 
87 struct dccg_registers {
88 	uint32_t DPPCLK_DTO_CTRL;
89 	uint32_t DPPCLK_DTO_PARAM[6];
90 	uint32_t REFCLK_CNTL;
91 };
92 
93 struct dcn_dccg {
94 	struct dccg base;
95 	const struct dccg_registers *regs;
96 	const struct dccg_shift *dccg_shift;
97 	const struct dccg_mask *dccg_mask;
98 };
99 
100 void dccg2_update_dpp_dto(struct dccg *dccg, int dpp_inst, int req_dppclk);
101 
102 void dccg2_get_dccg_ref_freq(struct dccg *dccg,
103 		unsigned int xtalin_freq_inKhz,
104 		unsigned int *dccg_ref_freq_inKhz);
105 
106 void dccg2_init(struct dccg *dccg);
107 
108 struct dccg *dccg2_create(
109 	struct dc_context *ctx,
110 	const struct dccg_registers *regs,
111 	const struct dccg_shift *dccg_shift,
112 	const struct dccg_mask *dccg_mask);
113 
114 void dcn_dccg_destroy(struct dccg **dccg);
115 
116 #endif //__DCN20_DCCG_H__
117