1 /*
2  * Copyright 2018 Advanced Micro Devices, Inc.
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a
5  * copy of this software and associated documentation files (the "Software"),
6  * to deal in the Software without restriction, including without limitation
7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8  * and/or sell copies of the Software, and to permit persons to whom the
9  * Software is furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice shall be included in
12  * all copies or substantial portions of the Software.
13  *
14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20  * OTHER DEALINGS IN THE SOFTWARE.
21  *
22  * Authors: AMD
23  *
24  */
25 
26 #include <linux/slab.h>
27 
28 #include "reg_helper.h"
29 #include "core_types.h"
30 #include "dcn20_dccg.h"
31 
32 #define TO_DCN_DCCG(dccg)\
33 	container_of(dccg, struct dcn_dccg, base)
34 
35 #define REG(reg) \
36 	(dccg_dcn->regs->reg)
37 
38 #undef FN
39 #define FN(reg_name, field_name) \
40 	dccg_dcn->dccg_shift->field_name, dccg_dcn->dccg_mask->field_name
41 
42 #define CTX \
43 	dccg_dcn->base.ctx
44 #define DC_LOGGER \
45 	dccg->ctx->logger
46 
47 void dccg2_update_dpp_dto(struct dccg *dccg, int dpp_inst, int req_dppclk)
48 {
49 	struct dcn_dccg *dccg_dcn = TO_DCN_DCCG(dccg);
50 
51 	if (dccg->ref_dppclk && req_dppclk) {
52 		int ref_dppclk = dccg->ref_dppclk;
53 		int modulo, phase;
54 
55 		// phase / modulo = dpp pipe clk / dpp global clk
56 		modulo = 0xff;   // use FF at the end
57 		phase = ((modulo * req_dppclk) + ref_dppclk - 1) / ref_dppclk;
58 
59 		if (phase > 0xff) {
60 			ASSERT(false);
61 			phase = 0xff;
62 		}
63 
64 		REG_SET_2(DPPCLK_DTO_PARAM[dpp_inst], 0,
65 				DPPCLK0_DTO_PHASE, phase,
66 				DPPCLK0_DTO_MODULO, modulo);
67 		REG_UPDATE(DPPCLK_DTO_CTRL,
68 				DPPCLK_DTO_ENABLE[dpp_inst], 1);
69 	} else {
70 		REG_UPDATE(DPPCLK_DTO_CTRL,
71 				DPPCLK_DTO_ENABLE[dpp_inst], 0);
72 	}
73 
74 	dccg->pipe_dppclk_khz[dpp_inst] = req_dppclk;
75 }
76 
77 void dccg2_get_dccg_ref_freq(struct dccg *dccg,
78 		unsigned int xtalin_freq_inKhz,
79 		unsigned int *dccg_ref_freq_inKhz)
80 {
81 	struct dcn_dccg *dccg_dcn = TO_DCN_DCCG(dccg);
82 	uint32_t clk_en = 0;
83 	uint32_t clk_sel = 0;
84 
85 	REG_GET_2(REFCLK_CNTL, REFCLK_CLOCK_EN, &clk_en, REFCLK_SRC_SEL, &clk_sel);
86 
87 	if (clk_en != 0) {
88 		// DCN20 has never been validated for non-xtalin as reference
89 		// frequency.  There's actually no way for DC to determine what
90 		// frequency a non-xtalin source is.
91 		ASSERT_CRITICAL(false);
92 	}
93 
94 	*dccg_ref_freq_inKhz = xtalin_freq_inKhz;
95 
96 	return;
97 }
98 
99 void dccg2_init(struct dccg *dccg)
100 {
101 }
102 
103 static const struct dccg_funcs dccg2_funcs = {
104 	.update_dpp_dto = dccg2_update_dpp_dto,
105 	.get_dccg_ref_freq = dccg2_get_dccg_ref_freq,
106 	.dccg_init = dccg2_init
107 };
108 
109 struct dccg *dccg2_create(
110 	struct dc_context *ctx,
111 	const struct dccg_registers *regs,
112 	const struct dccg_shift *dccg_shift,
113 	const struct dccg_mask *dccg_mask)
114 {
115 	struct dcn_dccg *dccg_dcn = kzalloc(sizeof(*dccg_dcn), GFP_KERNEL);
116 	struct dccg *base;
117 
118 	if (dccg_dcn == NULL) {
119 		BREAK_TO_DEBUGGER();
120 		return NULL;
121 	}
122 
123 	base = &dccg_dcn->base;
124 	base->ctx = ctx;
125 	base->funcs = &dccg2_funcs;
126 
127 	dccg_dcn->regs = regs;
128 	dccg_dcn->dccg_shift = dccg_shift;
129 	dccg_dcn->dccg_mask = dccg_mask;
130 
131 	return &dccg_dcn->base;
132 }
133 
134 void dcn_dccg_destroy(struct dccg **dccg)
135 {
136 	struct dcn_dccg *dccg_dcn = TO_DCN_DCCG(*dccg);
137 
138 	kfree(dccg_dcn);
139 	*dccg = NULL;
140 }
141