1 /* Copyright 2012-15 Advanced Micro Devices, Inc. 2 * 3 * Permission is hereby granted, free of charge, to any person obtaining a 4 * copy of this software and associated documentation files (the "Software"), 5 * to deal in the Software without restriction, including without limitation 6 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 7 * and/or sell copies of the Software, and to permit persons to whom the 8 * Software is furnished to do so, subject to the following conditions: 9 * 10 * The above copyright notice and this permission notice shall be included in 11 * all copies or substantial portions of the Software. 12 * 13 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 14 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 15 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 16 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 17 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 18 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 19 * OTHER DEALINGS IN THE SOFTWARE. 20 * 21 * Authors: AMD 22 * 23 */ 24 25 #ifndef __DC_MPCC_DCN10_H__ 26 #define __DC_MPCC_DCN10_H__ 27 28 #include "mpc.h" 29 30 #define TO_DCN10_MPC(mpc_base) \ 31 container_of(mpc_base, struct dcn10_mpc, base) 32 33 #define MAX_MPCC 6 34 #define MAX_OPP 6 35 36 #define MPC_COMMON_REG_LIST_DCN1_0(inst) \ 37 SRII(MPCC_TOP_SEL, MPCC, inst),\ 38 SRII(MPCC_BOT_SEL, MPCC, inst),\ 39 SRII(MPCC_CONTROL, MPCC, inst),\ 40 SRII(MPCC_STATUS, MPCC, inst),\ 41 SRII(MPCC_OPP_ID, MPCC, inst),\ 42 SRII(MPCC_BG_G_Y, MPCC, inst),\ 43 SRII(MPCC_BG_R_CR, MPCC, inst),\ 44 SRII(MPCC_BG_B_CB, MPCC, inst),\ 45 SRII(MPCC_BG_B_CB, MPCC, inst) 46 47 #define MPC_OUT_MUX_COMMON_REG_LIST_DCN1_0(inst) \ 48 SRII(MUX, MPC_OUT, inst) 49 50 #define MPC_COMMON_REG_VARIABLE_LIST \ 51 uint32_t MPCC_TOP_SEL[MAX_MPCC]; \ 52 uint32_t MPCC_BOT_SEL[MAX_MPCC]; \ 53 uint32_t MPCC_CONTROL[MAX_MPCC]; \ 54 uint32_t MPCC_STATUS[MAX_MPCC]; \ 55 uint32_t MPCC_OPP_ID[MAX_MPCC]; \ 56 uint32_t MPCC_BG_G_Y[MAX_MPCC]; \ 57 uint32_t MPCC_BG_R_CR[MAX_MPCC]; \ 58 uint32_t MPCC_BG_B_CB[MAX_MPCC]; \ 59 uint32_t MUX[MAX_OPP]; 60 61 #define MPC_COMMON_MASK_SH_LIST_DCN1_0(mask_sh)\ 62 SF(MPCC0_MPCC_TOP_SEL, MPCC_TOP_SEL, mask_sh),\ 63 SF(MPCC0_MPCC_BOT_SEL, MPCC_BOT_SEL, mask_sh),\ 64 SF(MPCC0_MPCC_CONTROL, MPCC_MODE, mask_sh),\ 65 SF(MPCC0_MPCC_CONTROL, MPCC_ALPHA_BLND_MODE, mask_sh),\ 66 SF(MPCC0_MPCC_CONTROL, MPCC_ALPHA_MULTIPLIED_MODE, mask_sh),\ 67 SF(MPCC0_MPCC_CONTROL, MPCC_BLND_ACTIVE_OVERLAP_ONLY, mask_sh),\ 68 SF(MPCC0_MPCC_STATUS, MPCC_IDLE, mask_sh),\ 69 SF(MPCC0_MPCC_STATUS, MPCC_BUSY, mask_sh),\ 70 SF(MPCC0_MPCC_OPP_ID, MPCC_OPP_ID, mask_sh),\ 71 SF(MPCC0_MPCC_BG_G_Y, MPCC_BG_G_Y, mask_sh),\ 72 SF(MPCC0_MPCC_BG_R_CR, MPCC_BG_R_CR, mask_sh),\ 73 SF(MPCC0_MPCC_BG_B_CB, MPCC_BG_B_CB, mask_sh),\ 74 SF(MPC_OUT0_MUX, MPC_OUT_MUX, mask_sh) 75 76 #define MPC_REG_FIELD_LIST(type) \ 77 type MPCC_TOP_SEL;\ 78 type MPCC_BOT_SEL;\ 79 type MPCC_MODE;\ 80 type MPCC_ALPHA_BLND_MODE;\ 81 type MPCC_ALPHA_MULTIPLIED_MODE;\ 82 type MPCC_BLND_ACTIVE_OVERLAP_ONLY;\ 83 type MPCC_IDLE;\ 84 type MPCC_BUSY;\ 85 type MPCC_OPP_ID;\ 86 type MPCC_BG_G_Y;\ 87 type MPCC_BG_R_CR;\ 88 type MPCC_BG_B_CB;\ 89 type MPC_OUT_MUX; 90 91 struct dcn_mpc_registers { 92 MPC_COMMON_REG_VARIABLE_LIST 93 }; 94 95 struct dcn_mpc_shift { 96 MPC_REG_FIELD_LIST(uint8_t) 97 }; 98 99 struct dcn_mpc_mask { 100 MPC_REG_FIELD_LIST(uint32_t) 101 }; 102 103 struct dcn10_mpc { 104 struct mpc base; 105 106 int mpcc_in_use_mask; 107 int num_mpcc; 108 const struct dcn_mpc_registers *mpc_regs; 109 const struct dcn_mpc_shift *mpc_shift; 110 const struct dcn_mpc_mask *mpc_mask; 111 }; 112 113 void dcn10_mpc_construct(struct dcn10_mpc *mpcc10, 114 struct dc_context *ctx, 115 const struct dcn_mpc_registers *mpc_regs, 116 const struct dcn_mpc_shift *mpc_shift, 117 const struct dcn_mpc_mask *mpc_mask, 118 int num_mpcc); 119 120 int mpc10_mpcc_add( 121 struct mpc *mpc, 122 struct mpcc_cfg *cfg); 123 124 void mpc10_mpcc_remove( 125 struct mpc *mpc, 126 struct mpc_tree_cfg *tree_cfg, 127 int opp_id, 128 int dpp_id); 129 130 void mpc10_assert_idle_mpcc( 131 struct mpc *mpc, 132 int id); 133 134 void mpc10_update_blend_mode( 135 struct mpc *mpc, 136 struct mpcc_cfg *cfg); 137 138 #endif 139