170ccab60SHarry Wentland /* 270ccab60SHarry Wentland * Copyright 2017 Advanced Micro Devices, Inc. 370ccab60SHarry Wentland * 470ccab60SHarry Wentland * Permission is hereby granted, free of charge, to any person obtaining a 570ccab60SHarry Wentland * copy of this software and associated documentation files (the "Software"), 670ccab60SHarry Wentland * to deal in the Software without restriction, including without limitation 770ccab60SHarry Wentland * the rights to use, copy, modify, merge, publish, distribute, sublicense, 870ccab60SHarry Wentland * and/or sell copies of the Software, and to permit persons to whom the 970ccab60SHarry Wentland * Software is furnished to do so, subject to the following conditions: 1070ccab60SHarry Wentland * 1170ccab60SHarry Wentland * The above copyright notice and this permission notice shall be included in 1270ccab60SHarry Wentland * all copies or substantial portions of the Software. 1370ccab60SHarry Wentland * 1470ccab60SHarry Wentland * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 1570ccab60SHarry Wentland * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 1670ccab60SHarry Wentland * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 1770ccab60SHarry Wentland * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 1870ccab60SHarry Wentland * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 1970ccab60SHarry Wentland * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 2070ccab60SHarry Wentland * OTHER DEALINGS IN THE SOFTWARE. 2170ccab60SHarry Wentland * 2270ccab60SHarry Wentland * Authors: AMD 2370ccab60SHarry Wentland * 2470ccab60SHarry Wentland */ 2570ccab60SHarry Wentland 2670ccab60SHarry Wentland #include "dm_services.h" 2770ccab60SHarry Wentland #include "dcn10_ipp.h" 2870ccab60SHarry Wentland #include "reg_helper.h" 2970ccab60SHarry Wentland 3070ccab60SHarry Wentland #define REG(reg) \ 3170ccab60SHarry Wentland (ippn10->regs->reg) 3270ccab60SHarry Wentland 3370ccab60SHarry Wentland #undef FN 3470ccab60SHarry Wentland #define FN(reg_name, field_name) \ 3570ccab60SHarry Wentland ippn10->ipp_shift->field_name, ippn10->ipp_mask->field_name 3670ccab60SHarry Wentland 3770ccab60SHarry Wentland #define CTX \ 3870ccab60SHarry Wentland ippn10->base.ctx 3970ccab60SHarry Wentland 4070ccab60SHarry Wentland 4170ccab60SHarry Wentland struct dcn10_input_csc_matrix { 4270ccab60SHarry Wentland enum dc_color_space color_space; 4370ccab60SHarry Wentland uint32_t regval[12]; 4470ccab60SHarry Wentland }; 4570ccab60SHarry Wentland 4670ccab60SHarry Wentland static const struct dcn10_input_csc_matrix dcn10_input_csc_matrix[] = { 4770ccab60SHarry Wentland {COLOR_SPACE_SRGB, 4870ccab60SHarry Wentland {0x2000, 0, 0, 0, 0, 0x2000, 0, 0, 0, 0, 0x2000, 0} }, 4970ccab60SHarry Wentland {COLOR_SPACE_SRGB_LIMITED, 5070ccab60SHarry Wentland {0x2000, 0, 0, 0, 0, 0x2000, 0, 0, 0, 0, 0x2000, 0} }, 5170ccab60SHarry Wentland {COLOR_SPACE_YCBCR601, 5270ccab60SHarry Wentland {0x2cdd, 0x2000, 0, 0xe991, 0xe926, 0x2000, 0xf4fd, 0x10ef, 5370ccab60SHarry Wentland 0, 0x2000, 0x38b4, 0xe3a6} }, 5470ccab60SHarry Wentland {COLOR_SPACE_YCBCR601_LIMITED, 5570ccab60SHarry Wentland {0x3353, 0x2568, 0, 0xe400, 0xe5dc, 0x2568, 0xf367, 0x1108, 5670ccab60SHarry Wentland 0, 0x2568, 0x40de, 0xdd3a} }, 5770ccab60SHarry Wentland {COLOR_SPACE_YCBCR709, 5870ccab60SHarry Wentland {0x3265, 0x2000, 0, 0xe6ce, 0xf105, 0x2000, 0xfa01, 0xa7d, 0, 5970ccab60SHarry Wentland 0x2000, 0x3b61, 0xe24f} }, 6070ccab60SHarry Wentland 6170ccab60SHarry Wentland {COLOR_SPACE_YCBCR709_LIMITED, 6270ccab60SHarry Wentland {0x39a6, 0x2568, 0, 0xe0d6, 0xeedd, 0x2568, 0xf925, 0x9a8, 0, 6370ccab60SHarry Wentland 0x2568, 0x43ee, 0xdbb2} } 6470ccab60SHarry Wentland }; 6570ccab60SHarry Wentland 6670ccab60SHarry Wentland enum dcn10_input_csc_select { 6770ccab60SHarry Wentland INPUT_CSC_SELECT_BYPASS = 0, 6870ccab60SHarry Wentland INPUT_CSC_SELECT_ICSC, 6970ccab60SHarry Wentland INPUT_CSC_SELECT_COMA 7070ccab60SHarry Wentland }; 7170ccab60SHarry Wentland 7270ccab60SHarry Wentland static void dcn10_program_input_csc( 7370ccab60SHarry Wentland struct input_pixel_processor *ipp, 7470ccab60SHarry Wentland enum dc_color_space color_space, 7570ccab60SHarry Wentland enum dcn10_input_csc_select select) 7670ccab60SHarry Wentland { 7770ccab60SHarry Wentland struct dcn10_ipp *ippn10 = TO_DCN10_IPP(ipp); 7870ccab60SHarry Wentland int i; 7970ccab60SHarry Wentland int arr_size = sizeof(dcn10_input_csc_matrix)/sizeof(struct dcn10_input_csc_matrix); 8070ccab60SHarry Wentland const uint32_t *regval = NULL; 8170ccab60SHarry Wentland uint32_t selection = 1; 8270ccab60SHarry Wentland 8370ccab60SHarry Wentland if (select == INPUT_CSC_SELECT_BYPASS) { 8470ccab60SHarry Wentland REG_SET(CM_ICSC_CONTROL, 0, CM_ICSC_MODE, 0); 8570ccab60SHarry Wentland return; 8670ccab60SHarry Wentland } 8770ccab60SHarry Wentland 8870ccab60SHarry Wentland for (i = 0; i < arr_size; i++) 8970ccab60SHarry Wentland if (dcn10_input_csc_matrix[i].color_space == color_space) { 9070ccab60SHarry Wentland regval = dcn10_input_csc_matrix[i].regval; 9170ccab60SHarry Wentland break; 9270ccab60SHarry Wentland } 9370ccab60SHarry Wentland 9470ccab60SHarry Wentland if (regval == NULL) { 9570ccab60SHarry Wentland BREAK_TO_DEBUGGER(); 9670ccab60SHarry Wentland return; 9770ccab60SHarry Wentland } 9870ccab60SHarry Wentland 9970ccab60SHarry Wentland if (select == INPUT_CSC_SELECT_COMA) 10070ccab60SHarry Wentland selection = 2; 10170ccab60SHarry Wentland REG_SET(CM_ICSC_CONTROL, 0, 10270ccab60SHarry Wentland CM_ICSC_MODE, selection); 10370ccab60SHarry Wentland 10470ccab60SHarry Wentland if (select == INPUT_CSC_SELECT_ICSC) { 10570ccab60SHarry Wentland /*R*/ 10670ccab60SHarry Wentland REG_SET_2(CM_ICSC_C11_C12, 0, 10770ccab60SHarry Wentland CM_ICSC_C11, regval[0], 10870ccab60SHarry Wentland CM_ICSC_C12, regval[1]); 10970ccab60SHarry Wentland regval += 2; 11070ccab60SHarry Wentland REG_SET_2(CM_ICSC_C13_C14, 0, 11170ccab60SHarry Wentland CM_ICSC_C13, regval[0], 11270ccab60SHarry Wentland CM_ICSC_C14, regval[1]); 11370ccab60SHarry Wentland /*G*/ 11470ccab60SHarry Wentland regval += 2; 11570ccab60SHarry Wentland REG_SET_2(CM_ICSC_C21_C22, 0, 11670ccab60SHarry Wentland CM_ICSC_C21, regval[0], 11770ccab60SHarry Wentland CM_ICSC_C22, regval[1]); 11870ccab60SHarry Wentland regval += 2; 11970ccab60SHarry Wentland REG_SET_2(CM_ICSC_C23_C24, 0, 12070ccab60SHarry Wentland CM_ICSC_C23, regval[0], 12170ccab60SHarry Wentland CM_ICSC_C24, regval[1]); 12270ccab60SHarry Wentland /*B*/ 12370ccab60SHarry Wentland regval += 2; 12470ccab60SHarry Wentland REG_SET_2(CM_ICSC_C31_C32, 0, 12570ccab60SHarry Wentland CM_ICSC_C31, regval[0], 12670ccab60SHarry Wentland CM_ICSC_C32, regval[1]); 12770ccab60SHarry Wentland regval += 2; 12870ccab60SHarry Wentland REG_SET_2(CM_ICSC_C33_C34, 0, 12970ccab60SHarry Wentland CM_ICSC_C33, regval[0], 13070ccab60SHarry Wentland CM_ICSC_C34, regval[1]); 13170ccab60SHarry Wentland } else { 13270ccab60SHarry Wentland /*R*/ 13370ccab60SHarry Wentland REG_SET_2(CM_COMA_C11_C12, 0, 13470ccab60SHarry Wentland CM_COMA_C11, regval[0], 13570ccab60SHarry Wentland CM_COMA_C12, regval[1]); 13670ccab60SHarry Wentland regval += 2; 13770ccab60SHarry Wentland REG_SET_2(CM_COMA_C13_C14, 0, 13870ccab60SHarry Wentland CM_COMA_C13, regval[0], 13970ccab60SHarry Wentland CM_COMA_C14, regval[1]); 14070ccab60SHarry Wentland /*G*/ 14170ccab60SHarry Wentland regval += 2; 14270ccab60SHarry Wentland REG_SET_2(CM_COMA_C21_C22, 0, 14370ccab60SHarry Wentland CM_COMA_C21, regval[0], 14470ccab60SHarry Wentland CM_COMA_C22, regval[1]); 14570ccab60SHarry Wentland regval += 2; 14670ccab60SHarry Wentland REG_SET_2(CM_COMA_C23_C24, 0, 14770ccab60SHarry Wentland CM_COMA_C23, regval[0], 14870ccab60SHarry Wentland CM_COMA_C24, regval[1]); 14970ccab60SHarry Wentland /*B*/ 15070ccab60SHarry Wentland regval += 2; 15170ccab60SHarry Wentland REG_SET_2(CM_COMA_C31_C32, 0, 15270ccab60SHarry Wentland CM_COMA_C31, regval[0], 15370ccab60SHarry Wentland CM_COMA_C32, regval[1]); 15470ccab60SHarry Wentland regval += 2; 15570ccab60SHarry Wentland REG_SET_2(CM_COMA_C33_C34, 0, 15670ccab60SHarry Wentland CM_COMA_C33, regval[0], 15770ccab60SHarry Wentland CM_COMA_C34, regval[1]); 15870ccab60SHarry Wentland } 15970ccab60SHarry Wentland } 16070ccab60SHarry Wentland 16170ccab60SHarry Wentland /*program de gamma RAM B*/ 16270ccab60SHarry Wentland static void dcn10_ipp_program_degamma_lutb_settings( 16370ccab60SHarry Wentland struct input_pixel_processor *ipp, 16470ccab60SHarry Wentland const struct pwl_params *params) 16570ccab60SHarry Wentland { 16670ccab60SHarry Wentland const struct gamma_curve *curve; 16770ccab60SHarry Wentland struct dcn10_ipp *ippn10 = TO_DCN10_IPP(ipp); 16870ccab60SHarry Wentland 16970ccab60SHarry Wentland REG_SET_2(CM_DGAM_RAMB_START_CNTL_B, 0, 17070ccab60SHarry Wentland CM_DGAM_RAMB_EXP_REGION_START_B, params->arr_points[0].custom_float_x, 17170ccab60SHarry Wentland CM_DGAM_RAMB_EXP_REGION_START_SEGMENT_B, 0); 17270ccab60SHarry Wentland 17370ccab60SHarry Wentland REG_SET_2(CM_DGAM_RAMB_START_CNTL_G, 0, 17470ccab60SHarry Wentland CM_DGAM_RAMB_EXP_REGION_START_G, params->arr_points[0].custom_float_x, 17570ccab60SHarry Wentland CM_DGAM_RAMB_EXP_REGION_START_SEGMENT_G, 0); 17670ccab60SHarry Wentland 17770ccab60SHarry Wentland REG_SET_2(CM_DGAM_RAMB_START_CNTL_R, 0, 17870ccab60SHarry Wentland CM_DGAM_RAMB_EXP_REGION_START_R, params->arr_points[0].custom_float_x, 17970ccab60SHarry Wentland CM_DGAM_RAMB_EXP_REGION_START_SEGMENT_R, 0); 18070ccab60SHarry Wentland 18170ccab60SHarry Wentland REG_SET(CM_DGAM_RAMB_SLOPE_CNTL_B, 0, 18270ccab60SHarry Wentland CM_DGAM_RAMB_EXP_REGION_LINEAR_SLOPE_B, params->arr_points[0].custom_float_slope); 18370ccab60SHarry Wentland 18470ccab60SHarry Wentland REG_SET(CM_DGAM_RAMB_SLOPE_CNTL_G, 0, 18570ccab60SHarry Wentland CM_DGAM_RAMB_EXP_REGION_LINEAR_SLOPE_G, params->arr_points[0].custom_float_slope); 18670ccab60SHarry Wentland 18770ccab60SHarry Wentland REG_SET(CM_DGAM_RAMB_SLOPE_CNTL_R, 0, 18870ccab60SHarry Wentland CM_DGAM_RAMB_EXP_REGION_LINEAR_SLOPE_R, params->arr_points[0].custom_float_slope); 18970ccab60SHarry Wentland 19070ccab60SHarry Wentland REG_SET(CM_DGAM_RAMB_END_CNTL1_B, 0, 19170ccab60SHarry Wentland CM_DGAM_RAMB_EXP_REGION_END_B, params->arr_points[1].custom_float_x); 19270ccab60SHarry Wentland 19370ccab60SHarry Wentland REG_SET_2(CM_DGAM_RAMB_END_CNTL2_B, 0, 19470ccab60SHarry Wentland CM_DGAM_RAMB_EXP_REGION_END_SLOPE_B, params->arr_points[1].custom_float_y, 19570ccab60SHarry Wentland CM_DGAM_RAMB_EXP_REGION_END_BASE_B, params->arr_points[2].custom_float_slope); 19670ccab60SHarry Wentland 19770ccab60SHarry Wentland REG_SET(CM_DGAM_RAMB_END_CNTL1_G, 0, 19870ccab60SHarry Wentland CM_DGAM_RAMB_EXP_REGION_END_G, params->arr_points[1].custom_float_x); 19970ccab60SHarry Wentland 20070ccab60SHarry Wentland REG_SET_2(CM_DGAM_RAMB_END_CNTL2_G, 0, 20170ccab60SHarry Wentland CM_DGAM_RAMB_EXP_REGION_END_SLOPE_G, params->arr_points[1].custom_float_y, 20270ccab60SHarry Wentland CM_DGAM_RAMB_EXP_REGION_END_BASE_G, params->arr_points[2].custom_float_slope); 20370ccab60SHarry Wentland 20470ccab60SHarry Wentland REG_SET(CM_DGAM_RAMB_END_CNTL1_R, 0, 20570ccab60SHarry Wentland CM_DGAM_RAMB_EXP_REGION_END_R, params->arr_points[1].custom_float_x); 20670ccab60SHarry Wentland 20770ccab60SHarry Wentland REG_SET_2(CM_DGAM_RAMB_END_CNTL2_R, 0, 20870ccab60SHarry Wentland CM_DGAM_RAMB_EXP_REGION_END_SLOPE_R, params->arr_points[1].custom_float_y, 20970ccab60SHarry Wentland CM_DGAM_RAMB_EXP_REGION_END_BASE_R, params->arr_points[2].custom_float_slope); 21070ccab60SHarry Wentland 21170ccab60SHarry Wentland curve = params->arr_curve_points; 21270ccab60SHarry Wentland REG_SET_4(CM_DGAM_RAMB_REGION_0_1, 0, 21370ccab60SHarry Wentland CM_DGAM_RAMB_EXP_REGION0_LUT_OFFSET, curve[0].offset, 21470ccab60SHarry Wentland CM_DGAM_RAMB_EXP_REGION0_NUM_SEGMENTS, curve[0].segments_num, 21570ccab60SHarry Wentland CM_DGAM_RAMB_EXP_REGION1_LUT_OFFSET, curve[1].offset, 21670ccab60SHarry Wentland CM_DGAM_RAMB_EXP_REGION1_NUM_SEGMENTS, curve[1].segments_num); 21770ccab60SHarry Wentland 21870ccab60SHarry Wentland curve += 2; 21970ccab60SHarry Wentland REG_SET_4(CM_DGAM_RAMB_REGION_2_3, 0, 22070ccab60SHarry Wentland CM_DGAM_RAMB_EXP_REGION2_LUT_OFFSET, curve[0].offset, 22170ccab60SHarry Wentland CM_DGAM_RAMB_EXP_REGION2_NUM_SEGMENTS, curve[0].segments_num, 22270ccab60SHarry Wentland CM_DGAM_RAMB_EXP_REGION3_LUT_OFFSET, curve[1].offset, 22370ccab60SHarry Wentland CM_DGAM_RAMB_EXP_REGION3_NUM_SEGMENTS, curve[1].segments_num); 22470ccab60SHarry Wentland 22570ccab60SHarry Wentland curve += 2; 22670ccab60SHarry Wentland REG_SET_4(CM_DGAM_RAMB_REGION_4_5, 0, 22770ccab60SHarry Wentland CM_DGAM_RAMB_EXP_REGION4_LUT_OFFSET, curve[0].offset, 22870ccab60SHarry Wentland CM_DGAM_RAMB_EXP_REGION4_NUM_SEGMENTS, curve[0].segments_num, 22970ccab60SHarry Wentland CM_DGAM_RAMB_EXP_REGION5_LUT_OFFSET, curve[1].offset, 23070ccab60SHarry Wentland CM_DGAM_RAMB_EXP_REGION5_NUM_SEGMENTS, curve[1].segments_num); 23170ccab60SHarry Wentland 23270ccab60SHarry Wentland curve += 2; 23370ccab60SHarry Wentland REG_SET_4(CM_DGAM_RAMB_REGION_6_7, 0, 23470ccab60SHarry Wentland CM_DGAM_RAMB_EXP_REGION6_LUT_OFFSET, curve[0].offset, 23570ccab60SHarry Wentland CM_DGAM_RAMB_EXP_REGION6_NUM_SEGMENTS, curve[0].segments_num, 23670ccab60SHarry Wentland CM_DGAM_RAMB_EXP_REGION7_LUT_OFFSET, curve[1].offset, 23770ccab60SHarry Wentland CM_DGAM_RAMB_EXP_REGION7_NUM_SEGMENTS, curve[1].segments_num); 23870ccab60SHarry Wentland 23970ccab60SHarry Wentland curve += 2; 24070ccab60SHarry Wentland REG_SET_4(CM_DGAM_RAMB_REGION_8_9, 0, 24170ccab60SHarry Wentland CM_DGAM_RAMB_EXP_REGION8_LUT_OFFSET, curve[0].offset, 24270ccab60SHarry Wentland CM_DGAM_RAMB_EXP_REGION8_NUM_SEGMENTS, curve[0].segments_num, 24370ccab60SHarry Wentland CM_DGAM_RAMB_EXP_REGION9_LUT_OFFSET, curve[1].offset, 24470ccab60SHarry Wentland CM_DGAM_RAMB_EXP_REGION9_NUM_SEGMENTS, curve[1].segments_num); 24570ccab60SHarry Wentland 24670ccab60SHarry Wentland curve += 2; 24770ccab60SHarry Wentland REG_SET_4(CM_DGAM_RAMB_REGION_10_11, 0, 24870ccab60SHarry Wentland CM_DGAM_RAMB_EXP_REGION10_LUT_OFFSET, curve[0].offset, 24970ccab60SHarry Wentland CM_DGAM_RAMB_EXP_REGION10_NUM_SEGMENTS, curve[0].segments_num, 25070ccab60SHarry Wentland CM_DGAM_RAMB_EXP_REGION11_LUT_OFFSET, curve[1].offset, 25170ccab60SHarry Wentland CM_DGAM_RAMB_EXP_REGION11_NUM_SEGMENTS, curve[1].segments_num); 25270ccab60SHarry Wentland 25370ccab60SHarry Wentland curve += 2; 25470ccab60SHarry Wentland REG_SET_4(CM_DGAM_RAMB_REGION_12_13, 0, 25570ccab60SHarry Wentland CM_DGAM_RAMB_EXP_REGION12_LUT_OFFSET, curve[0].offset, 25670ccab60SHarry Wentland CM_DGAM_RAMB_EXP_REGION12_NUM_SEGMENTS, curve[0].segments_num, 25770ccab60SHarry Wentland CM_DGAM_RAMB_EXP_REGION13_LUT_OFFSET, curve[1].offset, 25870ccab60SHarry Wentland CM_DGAM_RAMB_EXP_REGION13_NUM_SEGMENTS, curve[1].segments_num); 25970ccab60SHarry Wentland 26070ccab60SHarry Wentland curve += 2; 26170ccab60SHarry Wentland REG_SET_4(CM_DGAM_RAMB_REGION_14_15, 0, 26270ccab60SHarry Wentland CM_DGAM_RAMB_EXP_REGION14_LUT_OFFSET, curve[0].offset, 26370ccab60SHarry Wentland CM_DGAM_RAMB_EXP_REGION14_NUM_SEGMENTS, curve[0].segments_num, 26470ccab60SHarry Wentland CM_DGAM_RAMB_EXP_REGION15_LUT_OFFSET, curve[1].offset, 26570ccab60SHarry Wentland CM_DGAM_RAMB_EXP_REGION15_NUM_SEGMENTS, curve[1].segments_num); 26670ccab60SHarry Wentland } 26770ccab60SHarry Wentland 26870ccab60SHarry Wentland /*program de gamma RAM A*/ 26970ccab60SHarry Wentland static void dcn10_ipp_program_degamma_luta_settings( 27070ccab60SHarry Wentland struct input_pixel_processor *ipp, 27170ccab60SHarry Wentland const struct pwl_params *params) 27270ccab60SHarry Wentland { 27370ccab60SHarry Wentland const struct gamma_curve *curve; 27470ccab60SHarry Wentland struct dcn10_ipp *ippn10 = TO_DCN10_IPP(ipp); 27570ccab60SHarry Wentland 27670ccab60SHarry Wentland REG_SET_2(CM_DGAM_RAMA_START_CNTL_B, 0, 27770ccab60SHarry Wentland CM_DGAM_RAMA_EXP_REGION_START_B, params->arr_points[0].custom_float_x, 27870ccab60SHarry Wentland CM_DGAM_RAMA_EXP_REGION_START_SEGMENT_B, 0); 27970ccab60SHarry Wentland 28070ccab60SHarry Wentland REG_SET_2(CM_DGAM_RAMA_START_CNTL_G, 0, 28170ccab60SHarry Wentland CM_DGAM_RAMA_EXP_REGION_START_G, params->arr_points[0].custom_float_x, 28270ccab60SHarry Wentland CM_DGAM_RAMA_EXP_REGION_START_SEGMENT_G, 0); 28370ccab60SHarry Wentland 28470ccab60SHarry Wentland REG_SET_2(CM_DGAM_RAMA_START_CNTL_R, 0, 28570ccab60SHarry Wentland CM_DGAM_RAMA_EXP_REGION_START_R, params->arr_points[0].custom_float_x, 28670ccab60SHarry Wentland CM_DGAM_RAMA_EXP_REGION_START_SEGMENT_R, 0); 28770ccab60SHarry Wentland 28870ccab60SHarry Wentland REG_SET(CM_DGAM_RAMA_SLOPE_CNTL_B, 0, 28970ccab60SHarry Wentland CM_DGAM_RAMA_EXP_REGION_LINEAR_SLOPE_B, params->arr_points[0].custom_float_slope); 29070ccab60SHarry Wentland 29170ccab60SHarry Wentland REG_SET(CM_DGAM_RAMA_SLOPE_CNTL_G, 0, 29270ccab60SHarry Wentland CM_DGAM_RAMA_EXP_REGION_LINEAR_SLOPE_G, params->arr_points[0].custom_float_slope); 29370ccab60SHarry Wentland 29470ccab60SHarry Wentland REG_SET(CM_DGAM_RAMA_SLOPE_CNTL_R, 0, 29570ccab60SHarry Wentland CM_DGAM_RAMA_EXP_REGION_LINEAR_SLOPE_R, params->arr_points[0].custom_float_slope); 29670ccab60SHarry Wentland 29770ccab60SHarry Wentland REG_SET(CM_DGAM_RAMA_END_CNTL1_B, 0, 29870ccab60SHarry Wentland CM_DGAM_RAMA_EXP_REGION_END_B, params->arr_points[1].custom_float_x); 29970ccab60SHarry Wentland 30070ccab60SHarry Wentland REG_SET_2(CM_DGAM_RAMA_END_CNTL2_B, 0, 30170ccab60SHarry Wentland CM_DGAM_RAMA_EXP_REGION_END_SLOPE_B, params->arr_points[1].custom_float_y, 30270ccab60SHarry Wentland CM_DGAM_RAMA_EXP_REGION_END_BASE_B, params->arr_points[2].custom_float_slope); 30370ccab60SHarry Wentland 30470ccab60SHarry Wentland REG_SET(CM_DGAM_RAMA_END_CNTL1_G, 0, 30570ccab60SHarry Wentland CM_DGAM_RAMA_EXP_REGION_END_G, params->arr_points[1].custom_float_x); 30670ccab60SHarry Wentland 30770ccab60SHarry Wentland REG_SET_2(CM_DGAM_RAMA_END_CNTL2_G, 0, 30870ccab60SHarry Wentland CM_DGAM_RAMA_EXP_REGION_END_SLOPE_G, params->arr_points[1].custom_float_y, 30970ccab60SHarry Wentland CM_DGAM_RAMA_EXP_REGION_END_BASE_G, params->arr_points[2].custom_float_slope); 31070ccab60SHarry Wentland 31170ccab60SHarry Wentland REG_SET(CM_DGAM_RAMA_END_CNTL1_R, 0, 31270ccab60SHarry Wentland CM_DGAM_RAMA_EXP_REGION_END_R, params->arr_points[1].custom_float_x); 31370ccab60SHarry Wentland 31470ccab60SHarry Wentland REG_SET_2(CM_DGAM_RAMA_END_CNTL2_R, 0, 31570ccab60SHarry Wentland CM_DGAM_RAMA_EXP_REGION_END_SLOPE_R, params->arr_points[1].custom_float_y, 31670ccab60SHarry Wentland CM_DGAM_RAMA_EXP_REGION_END_BASE_R, params->arr_points[2].custom_float_slope); 31770ccab60SHarry Wentland 31870ccab60SHarry Wentland curve = params->arr_curve_points; 31970ccab60SHarry Wentland REG_SET_4(CM_DGAM_RAMA_REGION_0_1, 0, 32070ccab60SHarry Wentland CM_DGAM_RAMA_EXP_REGION0_LUT_OFFSET, curve[0].offset, 32170ccab60SHarry Wentland CM_DGAM_RAMA_EXP_REGION0_NUM_SEGMENTS, curve[0].segments_num, 32270ccab60SHarry Wentland CM_DGAM_RAMA_EXP_REGION1_LUT_OFFSET, curve[1].offset, 32370ccab60SHarry Wentland CM_DGAM_RAMA_EXP_REGION1_NUM_SEGMENTS, curve[1].segments_num); 32470ccab60SHarry Wentland 32570ccab60SHarry Wentland curve += 2; 32670ccab60SHarry Wentland REG_SET_4(CM_DGAM_RAMA_REGION_2_3, 0, 32770ccab60SHarry Wentland CM_DGAM_RAMA_EXP_REGION2_LUT_OFFSET, curve[0].offset, 32870ccab60SHarry Wentland CM_DGAM_RAMA_EXP_REGION2_NUM_SEGMENTS, curve[0].segments_num, 32970ccab60SHarry Wentland CM_DGAM_RAMA_EXP_REGION3_LUT_OFFSET, curve[1].offset, 33070ccab60SHarry Wentland CM_DGAM_RAMA_EXP_REGION3_NUM_SEGMENTS, curve[1].segments_num); 33170ccab60SHarry Wentland 33270ccab60SHarry Wentland curve += 2; 33370ccab60SHarry Wentland REG_SET_4(CM_DGAM_RAMA_REGION_4_5, 0, 33470ccab60SHarry Wentland CM_DGAM_RAMA_EXP_REGION4_LUT_OFFSET, curve[0].offset, 33570ccab60SHarry Wentland CM_DGAM_RAMA_EXP_REGION4_NUM_SEGMENTS, curve[0].segments_num, 33670ccab60SHarry Wentland CM_DGAM_RAMA_EXP_REGION5_LUT_OFFSET, curve[1].offset, 33770ccab60SHarry Wentland CM_DGAM_RAMA_EXP_REGION5_NUM_SEGMENTS, curve[1].segments_num); 33870ccab60SHarry Wentland 33970ccab60SHarry Wentland curve += 2; 34070ccab60SHarry Wentland REG_SET_4(CM_DGAM_RAMA_REGION_6_7, 0, 34170ccab60SHarry Wentland CM_DGAM_RAMA_EXP_REGION6_LUT_OFFSET, curve[0].offset, 34270ccab60SHarry Wentland CM_DGAM_RAMA_EXP_REGION6_NUM_SEGMENTS, curve[0].segments_num, 34370ccab60SHarry Wentland CM_DGAM_RAMA_EXP_REGION7_LUT_OFFSET, curve[1].offset, 34470ccab60SHarry Wentland CM_DGAM_RAMA_EXP_REGION7_NUM_SEGMENTS, curve[1].segments_num); 34570ccab60SHarry Wentland 34670ccab60SHarry Wentland curve += 2; 34770ccab60SHarry Wentland REG_SET_4(CM_DGAM_RAMA_REGION_8_9, 0, 34870ccab60SHarry Wentland CM_DGAM_RAMA_EXP_REGION8_LUT_OFFSET, curve[0].offset, 34970ccab60SHarry Wentland CM_DGAM_RAMA_EXP_REGION8_NUM_SEGMENTS, curve[0].segments_num, 35070ccab60SHarry Wentland CM_DGAM_RAMA_EXP_REGION9_LUT_OFFSET, curve[1].offset, 35170ccab60SHarry Wentland CM_DGAM_RAMA_EXP_REGION9_NUM_SEGMENTS, curve[1].segments_num); 35270ccab60SHarry Wentland 35370ccab60SHarry Wentland curve += 2; 35470ccab60SHarry Wentland REG_SET_4(CM_DGAM_RAMA_REGION_10_11, 0, 35570ccab60SHarry Wentland CM_DGAM_RAMA_EXP_REGION10_LUT_OFFSET, curve[0].offset, 35670ccab60SHarry Wentland CM_DGAM_RAMA_EXP_REGION10_NUM_SEGMENTS, curve[0].segments_num, 35770ccab60SHarry Wentland CM_DGAM_RAMA_EXP_REGION11_LUT_OFFSET, curve[1].offset, 35870ccab60SHarry Wentland CM_DGAM_RAMA_EXP_REGION11_NUM_SEGMENTS, curve[1].segments_num); 35970ccab60SHarry Wentland 36070ccab60SHarry Wentland curve += 2; 36170ccab60SHarry Wentland REG_SET_4(CM_DGAM_RAMA_REGION_12_13, 0, 36270ccab60SHarry Wentland CM_DGAM_RAMA_EXP_REGION12_LUT_OFFSET, curve[0].offset, 36370ccab60SHarry Wentland CM_DGAM_RAMA_EXP_REGION12_NUM_SEGMENTS, curve[0].segments_num, 36470ccab60SHarry Wentland CM_DGAM_RAMA_EXP_REGION13_LUT_OFFSET, curve[1].offset, 36570ccab60SHarry Wentland CM_DGAM_RAMA_EXP_REGION13_NUM_SEGMENTS, curve[1].segments_num); 36670ccab60SHarry Wentland 36770ccab60SHarry Wentland curve += 2; 36870ccab60SHarry Wentland REG_SET_4(CM_DGAM_RAMA_REGION_14_15, 0, 36970ccab60SHarry Wentland CM_DGAM_RAMA_EXP_REGION14_LUT_OFFSET, curve[0].offset, 37070ccab60SHarry Wentland CM_DGAM_RAMA_EXP_REGION14_NUM_SEGMENTS, curve[0].segments_num, 37170ccab60SHarry Wentland CM_DGAM_RAMA_EXP_REGION15_LUT_OFFSET, curve[1].offset, 37270ccab60SHarry Wentland CM_DGAM_RAMA_EXP_REGION15_NUM_SEGMENTS, curve[1].segments_num); 37370ccab60SHarry Wentland } 37470ccab60SHarry Wentland 37570ccab60SHarry Wentland static void ipp_power_on_degamma_lut( 37670ccab60SHarry Wentland struct input_pixel_processor *ipp, 37770ccab60SHarry Wentland bool power_on) 37870ccab60SHarry Wentland { 37970ccab60SHarry Wentland struct dcn10_ipp *ippn10 = TO_DCN10_IPP(ipp); 38070ccab60SHarry Wentland 38170ccab60SHarry Wentland REG_SET(CM_MEM_PWR_CTRL, 0, 38270ccab60SHarry Wentland SHARED_MEM_PWR_DIS, power_on == true ? 0:1); 38370ccab60SHarry Wentland 38470ccab60SHarry Wentland } 38570ccab60SHarry Wentland 38670ccab60SHarry Wentland static void ipp_program_degamma_lut( 38770ccab60SHarry Wentland struct input_pixel_processor *ipp, 38870ccab60SHarry Wentland const struct pwl_result_data *rgb, 38970ccab60SHarry Wentland uint32_t num, 39070ccab60SHarry Wentland bool is_ram_a) 39170ccab60SHarry Wentland { 39270ccab60SHarry Wentland uint32_t i; 39370ccab60SHarry Wentland 39470ccab60SHarry Wentland struct dcn10_ipp *ippn10 = TO_DCN10_IPP(ipp); 39570ccab60SHarry Wentland REG_UPDATE(CM_IGAM_LUT_RW_CONTROL, CM_IGAM_LUT_HOST_EN, 0); 39670ccab60SHarry Wentland REG_UPDATE(CM_DGAM_LUT_WRITE_EN_MASK, 39770ccab60SHarry Wentland CM_DGAM_LUT_WRITE_EN_MASK, 7); 39870ccab60SHarry Wentland REG_UPDATE(CM_DGAM_LUT_WRITE_EN_MASK, CM_DGAM_LUT_WRITE_SEL, 39970ccab60SHarry Wentland is_ram_a == true ? 0:1); 40070ccab60SHarry Wentland 40170ccab60SHarry Wentland REG_SET(CM_DGAM_LUT_INDEX, 0, CM_DGAM_LUT_INDEX, 0); 40270ccab60SHarry Wentland for (i = 0 ; i < num; i++) { 40370ccab60SHarry Wentland REG_SET(CM_DGAM_LUT_DATA, 0, CM_DGAM_LUT_DATA, rgb[i].red_reg); 40470ccab60SHarry Wentland REG_SET(CM_DGAM_LUT_DATA, 0, CM_DGAM_LUT_DATA, rgb[i].green_reg); 40570ccab60SHarry Wentland REG_SET(CM_DGAM_LUT_DATA, 0, CM_DGAM_LUT_DATA, rgb[i].blue_reg); 40670ccab60SHarry Wentland 40770ccab60SHarry Wentland REG_SET(CM_DGAM_LUT_DATA, 0, 40870ccab60SHarry Wentland CM_DGAM_LUT_DATA, rgb[i].delta_red_reg); 40970ccab60SHarry Wentland REG_SET(CM_DGAM_LUT_DATA, 0, 41070ccab60SHarry Wentland CM_DGAM_LUT_DATA, rgb[i].delta_green_reg); 41170ccab60SHarry Wentland REG_SET(CM_DGAM_LUT_DATA, 0, 41270ccab60SHarry Wentland CM_DGAM_LUT_DATA, rgb[i].delta_blue_reg); 41370ccab60SHarry Wentland 41470ccab60SHarry Wentland } 41570ccab60SHarry Wentland 41670ccab60SHarry Wentland } 41770ccab60SHarry Wentland 41870ccab60SHarry Wentland static void dcn10_ipp_enable_cm_block( 41970ccab60SHarry Wentland struct input_pixel_processor *ipp) 42070ccab60SHarry Wentland { 42170ccab60SHarry Wentland struct dcn10_ipp *ippn10 = TO_DCN10_IPP(ipp); 42270ccab60SHarry Wentland 42370ccab60SHarry Wentland REG_UPDATE(DPP_CONTROL, DPP_CLOCK_ENABLE, 1); 42470ccab60SHarry Wentland REG_UPDATE(CM_CONTROL, CM_BYPASS_EN, 0); 42570ccab60SHarry Wentland } 42670ccab60SHarry Wentland 42770ccab60SHarry Wentland 42870ccab60SHarry Wentland static void dcn10_ipp_full_bypass(struct input_pixel_processor *ipp) 42970ccab60SHarry Wentland { 43070ccab60SHarry Wentland struct dcn10_ipp *ippn10 = TO_DCN10_IPP(ipp); 43170ccab60SHarry Wentland 43270ccab60SHarry Wentland /* Input pixel format: ARGB8888 */ 43370ccab60SHarry Wentland REG_SET(CNVC_SURFACE_PIXEL_FORMAT, 0, 43470ccab60SHarry Wentland CNVC_SURFACE_PIXEL_FORMAT, 0x8); 43570ccab60SHarry Wentland 43670ccab60SHarry Wentland /* Zero expansion */ 43770ccab60SHarry Wentland REG_SET_3(FORMAT_CONTROL, 0, 43870ccab60SHarry Wentland CNVC_BYPASS, 0, 43970ccab60SHarry Wentland ALPHA_EN, 0, 44070ccab60SHarry Wentland FORMAT_EXPANSION_MODE, 0); 44170ccab60SHarry Wentland 44270ccab60SHarry Wentland /* COLOR_KEYER_CONTROL.COLOR_KEYER_EN = 0 this should be default */ 44370ccab60SHarry Wentland REG_SET(CM_CONTROL, 0, CM_BYPASS_EN, 1); 44470ccab60SHarry Wentland 44570ccab60SHarry Wentland /* Setting degamma bypass for now */ 44670ccab60SHarry Wentland REG_SET(CM_DGAM_CONTROL, 0, CM_DGAM_LUT_MODE, 0); 44770ccab60SHarry Wentland REG_SET(CM_IGAM_CONTROL, 0, CM_IGAM_LUT_MODE, 0); 44870ccab60SHarry Wentland } 44970ccab60SHarry Wentland 45070ccab60SHarry Wentland static void dcn10_ipp_set_degamma( 45170ccab60SHarry Wentland struct input_pixel_processor *ipp, 45270ccab60SHarry Wentland enum ipp_degamma_mode mode) 45370ccab60SHarry Wentland { 45470ccab60SHarry Wentland struct dcn10_ipp *ippn10 = TO_DCN10_IPP(ipp); 45570ccab60SHarry Wentland dcn10_ipp_enable_cm_block(ipp); 45670ccab60SHarry Wentland 45770ccab60SHarry Wentland switch (mode) { 45870ccab60SHarry Wentland case IPP_DEGAMMA_MODE_BYPASS: 45970ccab60SHarry Wentland /* Setting de gamma bypass for now */ 46070ccab60SHarry Wentland REG_UPDATE(CM_DGAM_CONTROL, CM_DGAM_LUT_MODE, 0); 46170ccab60SHarry Wentland break; 46270ccab60SHarry Wentland case IPP_DEGAMMA_MODE_HW_sRGB: 46370ccab60SHarry Wentland REG_UPDATE(CM_DGAM_CONTROL, CM_DGAM_LUT_MODE, 1); 46470ccab60SHarry Wentland break; 46570ccab60SHarry Wentland case IPP_DEGAMMA_MODE_HW_xvYCC: 46670ccab60SHarry Wentland REG_UPDATE(CM_DGAM_CONTROL, CM_DGAM_LUT_MODE, 2); 46770ccab60SHarry Wentland break; 46870ccab60SHarry Wentland default: 46970ccab60SHarry Wentland BREAK_TO_DEBUGGER(); 47070ccab60SHarry Wentland break; 47170ccab60SHarry Wentland } 47270ccab60SHarry Wentland } 47370ccab60SHarry Wentland 47470ccab60SHarry Wentland static bool dcn10_cursor_program_control( 47570ccab60SHarry Wentland struct dcn10_ipp *ippn10, 47670ccab60SHarry Wentland bool pixel_data_invert, 47770ccab60SHarry Wentland enum dc_cursor_color_format color_format) 47870ccab60SHarry Wentland { 47970ccab60SHarry Wentland REG_SET_2(CURSOR_SETTINS, 0, 48070ccab60SHarry Wentland /* no shift of the cursor HDL schedule */ 48170ccab60SHarry Wentland CURSOR0_DST_Y_OFFSET, 0, 48270ccab60SHarry Wentland /* used to shift the cursor chunk request deadline */ 48370ccab60SHarry Wentland CURSOR0_CHUNK_HDL_ADJUST, 3); 48470ccab60SHarry Wentland 48570ccab60SHarry Wentland REG_UPDATE_2(CURSOR0_CONTROL, 48670ccab60SHarry Wentland CUR0_MODE, color_format, 48770ccab60SHarry Wentland CUR0_INVERT_MODE, 0); 48870ccab60SHarry Wentland 48970ccab60SHarry Wentland if (color_format == CURSOR_MODE_MONO) { 49070ccab60SHarry Wentland /* todo: clarify what to program these to */ 49170ccab60SHarry Wentland REG_UPDATE(CURSOR0_COLOR0, 49270ccab60SHarry Wentland CUR0_COLOR0, 0x00000000); 49370ccab60SHarry Wentland REG_UPDATE(CURSOR0_COLOR1, 49470ccab60SHarry Wentland CUR0_COLOR1, 0xFFFFFFFF); 49570ccab60SHarry Wentland } 49670ccab60SHarry Wentland 49770ccab60SHarry Wentland /* TODO: Fixed vs float */ 49870ccab60SHarry Wentland 49970ccab60SHarry Wentland REG_UPDATE_3(FORMAT_CONTROL, 50070ccab60SHarry Wentland CNVC_BYPASS, 0, 50170ccab60SHarry Wentland ALPHA_EN, 1, 50270ccab60SHarry Wentland FORMAT_EXPANSION_MODE, 0); 50370ccab60SHarry Wentland 50470ccab60SHarry Wentland REG_UPDATE(CURSOR0_CONTROL, 50570ccab60SHarry Wentland CUR0_EXPANSION_MODE, 0); 50670ccab60SHarry Wentland 50770ccab60SHarry Wentland if (0 /*attributes->attribute_flags.bits.MIN_MAX_INVERT*/) { 50870ccab60SHarry Wentland REG_UPDATE(CURSOR0_CONTROL, 50970ccab60SHarry Wentland CUR0_MAX, 51070ccab60SHarry Wentland 0 /* TODO */); 51170ccab60SHarry Wentland REG_UPDATE(CURSOR0_CONTROL, 51270ccab60SHarry Wentland CUR0_MIN, 51370ccab60SHarry Wentland 0 /* TODO */); 51470ccab60SHarry Wentland } 51570ccab60SHarry Wentland 51670ccab60SHarry Wentland return true; 51770ccab60SHarry Wentland } 51870ccab60SHarry Wentland 51970ccab60SHarry Wentland enum cursor_pitch { 52070ccab60SHarry Wentland CURSOR_PITCH_64_PIXELS = 0, 52170ccab60SHarry Wentland CURSOR_PITCH_128_PIXELS, 52270ccab60SHarry Wentland CURSOR_PITCH_256_PIXELS 52370ccab60SHarry Wentland }; 52470ccab60SHarry Wentland 52570ccab60SHarry Wentland enum cursor_lines_per_chunk { 52670ccab60SHarry Wentland CURSOR_LINE_PER_CHUNK_2 = 1, 52770ccab60SHarry Wentland CURSOR_LINE_PER_CHUNK_4, 52870ccab60SHarry Wentland CURSOR_LINE_PER_CHUNK_8, 52970ccab60SHarry Wentland CURSOR_LINE_PER_CHUNK_16 53070ccab60SHarry Wentland }; 53170ccab60SHarry Wentland 53270ccab60SHarry Wentland static enum cursor_pitch dcn10_get_cursor_pitch( 53370ccab60SHarry Wentland unsigned int pitch) 53470ccab60SHarry Wentland { 53570ccab60SHarry Wentland enum cursor_pitch hw_pitch; 53670ccab60SHarry Wentland 53770ccab60SHarry Wentland switch (pitch) { 53870ccab60SHarry Wentland case 64: 53970ccab60SHarry Wentland hw_pitch = CURSOR_PITCH_64_PIXELS; 54070ccab60SHarry Wentland break; 54170ccab60SHarry Wentland case 128: 54270ccab60SHarry Wentland hw_pitch = CURSOR_PITCH_128_PIXELS; 54370ccab60SHarry Wentland break; 54470ccab60SHarry Wentland case 256: 54570ccab60SHarry Wentland hw_pitch = CURSOR_PITCH_256_PIXELS; 54670ccab60SHarry Wentland break; 54770ccab60SHarry Wentland default: 54870ccab60SHarry Wentland DC_ERR("Invalid cursor pitch of %d. " 54970ccab60SHarry Wentland "Only 64/128/256 is supported on DCN.\n", pitch); 55070ccab60SHarry Wentland hw_pitch = CURSOR_PITCH_64_PIXELS; 55170ccab60SHarry Wentland break; 55270ccab60SHarry Wentland } 55370ccab60SHarry Wentland return hw_pitch; 55470ccab60SHarry Wentland } 55570ccab60SHarry Wentland 55670ccab60SHarry Wentland static enum cursor_lines_per_chunk dcn10_get_lines_per_chunk( 55770ccab60SHarry Wentland unsigned int cur_width, 55870ccab60SHarry Wentland enum dc_cursor_color_format format) 55970ccab60SHarry Wentland { 56070ccab60SHarry Wentland enum cursor_lines_per_chunk line_per_chunk; 56170ccab60SHarry Wentland 56270ccab60SHarry Wentland if (format == CURSOR_MODE_MONO) 56370ccab60SHarry Wentland /* impl B. expansion in CUR Buffer reader */ 56470ccab60SHarry Wentland line_per_chunk = CURSOR_LINE_PER_CHUNK_16; 56570ccab60SHarry Wentland else if (cur_width <= 32) 56670ccab60SHarry Wentland line_per_chunk = CURSOR_LINE_PER_CHUNK_16; 56770ccab60SHarry Wentland else if (cur_width <= 64) 56870ccab60SHarry Wentland line_per_chunk = CURSOR_LINE_PER_CHUNK_8; 56970ccab60SHarry Wentland else if (cur_width <= 128) 57070ccab60SHarry Wentland line_per_chunk = CURSOR_LINE_PER_CHUNK_4; 57170ccab60SHarry Wentland else 57270ccab60SHarry Wentland line_per_chunk = CURSOR_LINE_PER_CHUNK_2; 57370ccab60SHarry Wentland 57470ccab60SHarry Wentland return line_per_chunk; 57570ccab60SHarry Wentland } 57670ccab60SHarry Wentland 57770ccab60SHarry Wentland static void dcn10_cursor_set_attributes( 57870ccab60SHarry Wentland struct input_pixel_processor *ipp, 57970ccab60SHarry Wentland const struct dc_cursor_attributes *attr) 58070ccab60SHarry Wentland { 58170ccab60SHarry Wentland struct dcn10_ipp *ippn10 = TO_DCN10_IPP(ipp); 58270ccab60SHarry Wentland enum cursor_pitch hw_pitch = dcn10_get_cursor_pitch(attr->pitch); 58370ccab60SHarry Wentland enum cursor_lines_per_chunk lpc = dcn10_get_lines_per_chunk( 58470ccab60SHarry Wentland attr->width, attr->color_format); 58570ccab60SHarry Wentland 58670ccab60SHarry Wentland ippn10->curs_attr = *attr; 58770ccab60SHarry Wentland 58870ccab60SHarry Wentland REG_UPDATE(CURSOR_SURFACE_ADDRESS_HIGH, 58970ccab60SHarry Wentland CURSOR_SURFACE_ADDRESS_HIGH, attr->address.high_part); 59070ccab60SHarry Wentland REG_UPDATE(CURSOR_SURFACE_ADDRESS, 59170ccab60SHarry Wentland CURSOR_SURFACE_ADDRESS, attr->address.low_part); 59270ccab60SHarry Wentland 59370ccab60SHarry Wentland REG_UPDATE_2(CURSOR_SIZE, 59470ccab60SHarry Wentland CURSOR_WIDTH, attr->width, 59570ccab60SHarry Wentland CURSOR_HEIGHT, attr->height); 59670ccab60SHarry Wentland 59770ccab60SHarry Wentland REG_UPDATE_3(CURSOR_CONTROL, 59870ccab60SHarry Wentland CURSOR_MODE, attr->color_format, 59970ccab60SHarry Wentland CURSOR_PITCH, hw_pitch, 60070ccab60SHarry Wentland CURSOR_LINES_PER_CHUNK, lpc); 60170ccab60SHarry Wentland 60270ccab60SHarry Wentland dcn10_cursor_program_control(ippn10, 60370ccab60SHarry Wentland attr->attribute_flags.bits.INVERT_PIXEL_DATA, 60470ccab60SHarry Wentland attr->color_format); 60570ccab60SHarry Wentland } 60670ccab60SHarry Wentland 60770ccab60SHarry Wentland static void dcn10_cursor_set_position( 60870ccab60SHarry Wentland struct input_pixel_processor *ipp, 60970ccab60SHarry Wentland const struct dc_cursor_position *pos, 61070ccab60SHarry Wentland const struct dc_cursor_mi_param *param) 61170ccab60SHarry Wentland { 61270ccab60SHarry Wentland struct dcn10_ipp *ippn10 = TO_DCN10_IPP(ipp); 61370ccab60SHarry Wentland int src_x_offset = pos->x - pos->x_hotspot - param->viewport_x_start; 61470ccab60SHarry Wentland uint32_t cur_en = pos->enable ? 1 : 0; 61570ccab60SHarry Wentland uint32_t dst_x_offset = (src_x_offset >= 0) ? src_x_offset : 0; 61670ccab60SHarry Wentland 617d3ec0562SLeo (Sunpeng) Li /* 618d3ec0562SLeo (Sunpeng) Li * Guard aganst cursor_set_position() from being called with invalid 619d3ec0562SLeo (Sunpeng) Li * attributes 620d3ec0562SLeo (Sunpeng) Li * 621d3ec0562SLeo (Sunpeng) Li * TODO: Look at combining cursor_set_position() and 622d3ec0562SLeo (Sunpeng) Li * cursor_set_attributes() into cursor_update() 623d3ec0562SLeo (Sunpeng) Li */ 624d3ec0562SLeo (Sunpeng) Li if (ippn10->curs_attr.address.quad_part == 0) 625d3ec0562SLeo (Sunpeng) Li return; 626d3ec0562SLeo (Sunpeng) Li 62770ccab60SHarry Wentland dst_x_offset *= param->ref_clk_khz; 62870ccab60SHarry Wentland dst_x_offset /= param->pixel_clk_khz; 62970ccab60SHarry Wentland 63070ccab60SHarry Wentland ASSERT(param->h_scale_ratio.value); 63170ccab60SHarry Wentland 63270ccab60SHarry Wentland if (param->h_scale_ratio.value) 63370ccab60SHarry Wentland dst_x_offset = dal_fixed31_32_floor(dal_fixed31_32_div( 63470ccab60SHarry Wentland dal_fixed31_32_from_int(dst_x_offset), 63570ccab60SHarry Wentland param->h_scale_ratio)); 63670ccab60SHarry Wentland 63770ccab60SHarry Wentland if (src_x_offset >= (int)param->viewport_width) 63870ccab60SHarry Wentland cur_en = 0; /* not visible beyond right edge*/ 63970ccab60SHarry Wentland 64070ccab60SHarry Wentland if (src_x_offset + (int)ippn10->curs_attr.width < 0) 64170ccab60SHarry Wentland cur_en = 0; /* not visible beyond left edge*/ 64270ccab60SHarry Wentland 64370ccab60SHarry Wentland if (cur_en && REG_READ(CURSOR_SURFACE_ADDRESS) == 0) 64470ccab60SHarry Wentland dcn10_cursor_set_attributes(ipp, &ippn10->curs_attr); 64570ccab60SHarry Wentland REG_UPDATE(CURSOR_CONTROL, 64670ccab60SHarry Wentland CURSOR_ENABLE, cur_en); 64770ccab60SHarry Wentland REG_UPDATE(CURSOR0_CONTROL, 64870ccab60SHarry Wentland CUR0_ENABLE, cur_en); 64970ccab60SHarry Wentland 65070ccab60SHarry Wentland REG_SET_2(CURSOR_POSITION, 0, 65170ccab60SHarry Wentland CURSOR_X_POSITION, pos->x, 65270ccab60SHarry Wentland CURSOR_Y_POSITION, pos->y); 65370ccab60SHarry Wentland 65470ccab60SHarry Wentland REG_SET_2(CURSOR_HOT_SPOT, 0, 65570ccab60SHarry Wentland CURSOR_HOT_SPOT_X, pos->x_hotspot, 65670ccab60SHarry Wentland CURSOR_HOT_SPOT_Y, pos->y_hotspot); 65770ccab60SHarry Wentland 65870ccab60SHarry Wentland REG_SET(CURSOR_DST_OFFSET, 0, 65970ccab60SHarry Wentland CURSOR_DST_X_OFFSET, dst_x_offset); 66070ccab60SHarry Wentland /* TODO Handle surface pixel formats other than 4:4:4 */ 66170ccab60SHarry Wentland } 66270ccab60SHarry Wentland 66370ccab60SHarry Wentland enum pixel_format_description { 66470ccab60SHarry Wentland PIXEL_FORMAT_FIXED = 0, 66570ccab60SHarry Wentland PIXEL_FORMAT_FIXED16, 66670ccab60SHarry Wentland PIXEL_FORMAT_FLOAT 66770ccab60SHarry Wentland 66870ccab60SHarry Wentland }; 66970ccab60SHarry Wentland 67070ccab60SHarry Wentland static void dcn10_setup_format_flags(enum surface_pixel_format input_format,\ 67170ccab60SHarry Wentland enum pixel_format_description *fmt) 67270ccab60SHarry Wentland { 67370ccab60SHarry Wentland 67470ccab60SHarry Wentland if (input_format == SURFACE_PIXEL_FORMAT_GRPH_ARGB16161616F || 67570ccab60SHarry Wentland input_format == SURFACE_PIXEL_FORMAT_GRPH_ABGR16161616F) 67670ccab60SHarry Wentland *fmt = PIXEL_FORMAT_FLOAT; 67770ccab60SHarry Wentland else if (input_format == SURFACE_PIXEL_FORMAT_GRPH_ARGB16161616) 67870ccab60SHarry Wentland *fmt = PIXEL_FORMAT_FIXED16; 67970ccab60SHarry Wentland else 68070ccab60SHarry Wentland *fmt = PIXEL_FORMAT_FIXED; 68170ccab60SHarry Wentland } 68270ccab60SHarry Wentland 68370ccab60SHarry Wentland static void dcn10_ipp_set_degamma_format_float(struct input_pixel_processor *ipp, 68470ccab60SHarry Wentland bool is_float) 68570ccab60SHarry Wentland { 68670ccab60SHarry Wentland struct dcn10_ipp *ippn10 = TO_DCN10_IPP(ipp); 68770ccab60SHarry Wentland 68870ccab60SHarry Wentland if (is_float) { 68970ccab60SHarry Wentland REG_UPDATE(CM_IGAM_CONTROL, CM_IGAM_INPUT_FORMAT, 3); 69070ccab60SHarry Wentland REG_UPDATE(CM_IGAM_CONTROL, CM_IGAM_LUT_MODE, 1); 69170ccab60SHarry Wentland } else { 69270ccab60SHarry Wentland REG_UPDATE(CM_IGAM_CONTROL, CM_IGAM_INPUT_FORMAT, 2); 69370ccab60SHarry Wentland REG_UPDATE(CM_IGAM_CONTROL, CM_IGAM_LUT_MODE, 0); 69470ccab60SHarry Wentland } 69570ccab60SHarry Wentland } 69670ccab60SHarry Wentland 69770ccab60SHarry Wentland 69870ccab60SHarry Wentland static void dcn10_ipp_cnv_setup ( 69970ccab60SHarry Wentland struct input_pixel_processor *ipp, 70070ccab60SHarry Wentland enum surface_pixel_format input_format, 70170ccab60SHarry Wentland enum expansion_mode mode, 70270ccab60SHarry Wentland enum ipp_output_format cnv_out_format) 70370ccab60SHarry Wentland { 70470ccab60SHarry Wentland uint32_t pixel_format; 70570ccab60SHarry Wentland uint32_t alpha_en; 70670ccab60SHarry Wentland enum pixel_format_description fmt ; 70770ccab60SHarry Wentland enum dc_color_space color_space; 70870ccab60SHarry Wentland enum dcn10_input_csc_select select; 70970ccab60SHarry Wentland bool is_float; 71070ccab60SHarry Wentland struct dcn10_ipp *ippn10 = TO_DCN10_IPP(ipp); 71170ccab60SHarry Wentland bool force_disable_cursor = false; 71270ccab60SHarry Wentland 71370ccab60SHarry Wentland dcn10_setup_format_flags(input_format, &fmt); 71470ccab60SHarry Wentland alpha_en = 1; 71570ccab60SHarry Wentland pixel_format = 0; 71670ccab60SHarry Wentland color_space = COLOR_SPACE_SRGB; 71770ccab60SHarry Wentland select = INPUT_CSC_SELECT_BYPASS; 71870ccab60SHarry Wentland is_float = false; 71970ccab60SHarry Wentland 72070ccab60SHarry Wentland switch (fmt) { 72170ccab60SHarry Wentland case PIXEL_FORMAT_FIXED: 72270ccab60SHarry Wentland case PIXEL_FORMAT_FIXED16: 72370ccab60SHarry Wentland /*when output is float then FORMAT_CONTROL__OUTPUT_FP=1*/ 72470ccab60SHarry Wentland REG_SET_3(FORMAT_CONTROL, 0, 72570ccab60SHarry Wentland CNVC_BYPASS, 0, 72670ccab60SHarry Wentland FORMAT_EXPANSION_MODE, mode, 72770ccab60SHarry Wentland OUTPUT_FP, 0); 72870ccab60SHarry Wentland break; 72970ccab60SHarry Wentland case PIXEL_FORMAT_FLOAT: 73070ccab60SHarry Wentland REG_SET_3(FORMAT_CONTROL, 0, 73170ccab60SHarry Wentland CNVC_BYPASS, 0, 73270ccab60SHarry Wentland FORMAT_EXPANSION_MODE, mode, 73370ccab60SHarry Wentland OUTPUT_FP, 1); 73470ccab60SHarry Wentland is_float = true; 73570ccab60SHarry Wentland break; 73670ccab60SHarry Wentland default: 73770ccab60SHarry Wentland 73870ccab60SHarry Wentland break; 73970ccab60SHarry Wentland } 74070ccab60SHarry Wentland 74170ccab60SHarry Wentland dcn10_ipp_set_degamma_format_float(ipp, is_float); 74270ccab60SHarry Wentland 74370ccab60SHarry Wentland switch (input_format) { 74470ccab60SHarry Wentland case SURFACE_PIXEL_FORMAT_GRPH_ARGB1555: 74570ccab60SHarry Wentland pixel_format = 1; 74670ccab60SHarry Wentland break; 74770ccab60SHarry Wentland case SURFACE_PIXEL_FORMAT_GRPH_RGB565: 74870ccab60SHarry Wentland pixel_format = 3; 74970ccab60SHarry Wentland alpha_en = 0; 75070ccab60SHarry Wentland break; 75170ccab60SHarry Wentland case SURFACE_PIXEL_FORMAT_GRPH_ARGB8888: 75270ccab60SHarry Wentland case SURFACE_PIXEL_FORMAT_GRPH_ABGR8888: 75370ccab60SHarry Wentland pixel_format = 8; 75470ccab60SHarry Wentland break; 75570ccab60SHarry Wentland case SURFACE_PIXEL_FORMAT_GRPH_ARGB2101010: 75670ccab60SHarry Wentland case SURFACE_PIXEL_FORMAT_GRPH_ABGR2101010: 75770ccab60SHarry Wentland pixel_format = 10; 75870ccab60SHarry Wentland break; 75970ccab60SHarry Wentland case SURFACE_PIXEL_FORMAT_VIDEO_420_YCbCr: 76070ccab60SHarry Wentland force_disable_cursor = false; 76170ccab60SHarry Wentland pixel_format = 65; 76270ccab60SHarry Wentland color_space = COLOR_SPACE_YCBCR709; 76370ccab60SHarry Wentland select = INPUT_CSC_SELECT_ICSC; 76470ccab60SHarry Wentland break; 76570ccab60SHarry Wentland case SURFACE_PIXEL_FORMAT_VIDEO_420_YCrCb: 76670ccab60SHarry Wentland force_disable_cursor = true; 76770ccab60SHarry Wentland pixel_format = 64; 76870ccab60SHarry Wentland color_space = COLOR_SPACE_YCBCR709; 76970ccab60SHarry Wentland select = INPUT_CSC_SELECT_ICSC; 77070ccab60SHarry Wentland break; 77170ccab60SHarry Wentland case SURFACE_PIXEL_FORMAT_VIDEO_420_10bpc_YCbCr: 77270ccab60SHarry Wentland force_disable_cursor = true; 77370ccab60SHarry Wentland pixel_format = 67; 77470ccab60SHarry Wentland color_space = COLOR_SPACE_YCBCR709; 77570ccab60SHarry Wentland select = INPUT_CSC_SELECT_ICSC; 77670ccab60SHarry Wentland break; 77770ccab60SHarry Wentland case SURFACE_PIXEL_FORMAT_VIDEO_420_10bpc_YCrCb: 77870ccab60SHarry Wentland force_disable_cursor = true; 77970ccab60SHarry Wentland pixel_format = 66; 78070ccab60SHarry Wentland color_space = COLOR_SPACE_YCBCR709; 78170ccab60SHarry Wentland select = INPUT_CSC_SELECT_ICSC; 78270ccab60SHarry Wentland break; 78370ccab60SHarry Wentland case SURFACE_PIXEL_FORMAT_GRPH_ARGB16161616: 78470ccab60SHarry Wentland pixel_format = 22; 78570ccab60SHarry Wentland break; 78670ccab60SHarry Wentland case SURFACE_PIXEL_FORMAT_GRPH_ARGB16161616F: 78770ccab60SHarry Wentland pixel_format = 24; 78870ccab60SHarry Wentland break; 78970ccab60SHarry Wentland case SURFACE_PIXEL_FORMAT_GRPH_ABGR16161616F: 79070ccab60SHarry Wentland pixel_format = 25; 79170ccab60SHarry Wentland break; 79270ccab60SHarry Wentland default: 79370ccab60SHarry Wentland break; 79470ccab60SHarry Wentland } 79570ccab60SHarry Wentland REG_SET(CNVC_SURFACE_PIXEL_FORMAT, 0, 79670ccab60SHarry Wentland CNVC_SURFACE_PIXEL_FORMAT, pixel_format); 79770ccab60SHarry Wentland REG_UPDATE(FORMAT_CONTROL, ALPHA_EN, alpha_en); 79870ccab60SHarry Wentland 79970ccab60SHarry Wentland dcn10_program_input_csc(ipp, color_space, select); 80070ccab60SHarry Wentland 80170ccab60SHarry Wentland if (force_disable_cursor) { 80270ccab60SHarry Wentland REG_UPDATE(CURSOR_CONTROL, 80370ccab60SHarry Wentland CURSOR_ENABLE, 0); 80470ccab60SHarry Wentland REG_UPDATE(CURSOR0_CONTROL, 80570ccab60SHarry Wentland CUR0_ENABLE, 0); 80670ccab60SHarry Wentland } 80770ccab60SHarry Wentland } 80870ccab60SHarry Wentland 80970ccab60SHarry Wentland 81070ccab60SHarry Wentland static bool dcn10_degamma_ram_inuse(struct input_pixel_processor *ipp, 81170ccab60SHarry Wentland bool *ram_a_inuse) 81270ccab60SHarry Wentland { 81370ccab60SHarry Wentland bool ret = false; 81470ccab60SHarry Wentland uint32_t status_reg = 0; 81570ccab60SHarry Wentland struct dcn10_ipp *ippn10 = TO_DCN10_IPP(ipp); 81670ccab60SHarry Wentland 81770ccab60SHarry Wentland status_reg = (REG_READ(CM_IGAM_LUT_RW_CONTROL) & 0x0F00) >>16; 81870ccab60SHarry Wentland if (status_reg == 9) { 81970ccab60SHarry Wentland *ram_a_inuse = true; 82070ccab60SHarry Wentland ret = true; 82170ccab60SHarry Wentland } else if (status_reg == 10) { 82270ccab60SHarry Wentland *ram_a_inuse = false; 82370ccab60SHarry Wentland ret = true; 82470ccab60SHarry Wentland } 82570ccab60SHarry Wentland return ret; 82670ccab60SHarry Wentland } 82770ccab60SHarry Wentland 82870ccab60SHarry Wentland static void dcn10_degamma_ram_select(struct input_pixel_processor *ipp, 82970ccab60SHarry Wentland bool use_ram_a) 83070ccab60SHarry Wentland { 83170ccab60SHarry Wentland struct dcn10_ipp *ippn10 = TO_DCN10_IPP(ipp); 83270ccab60SHarry Wentland 83370ccab60SHarry Wentland if (use_ram_a) 83470ccab60SHarry Wentland REG_UPDATE(CM_DGAM_CONTROL, CM_DGAM_LUT_MODE, 3); 83570ccab60SHarry Wentland else 83670ccab60SHarry Wentland REG_UPDATE(CM_DGAM_CONTROL, CM_DGAM_LUT_MODE, 4); 83770ccab60SHarry Wentland 83870ccab60SHarry Wentland } 83970ccab60SHarry Wentland 84070ccab60SHarry Wentland static void dcn10_ipp_set_degamma_pwl(struct input_pixel_processor *ipp, 84170ccab60SHarry Wentland const struct pwl_params *params) 84270ccab60SHarry Wentland { 84370ccab60SHarry Wentland bool is_ram_a = true; 84470ccab60SHarry Wentland 84570ccab60SHarry Wentland ipp_power_on_degamma_lut(ipp, true); 84670ccab60SHarry Wentland dcn10_ipp_enable_cm_block(ipp); 84770ccab60SHarry Wentland dcn10_degamma_ram_inuse(ipp, &is_ram_a); 84870ccab60SHarry Wentland if (is_ram_a == true) 84970ccab60SHarry Wentland dcn10_ipp_program_degamma_lutb_settings(ipp, params); 85070ccab60SHarry Wentland else 85170ccab60SHarry Wentland dcn10_ipp_program_degamma_luta_settings(ipp, params); 85270ccab60SHarry Wentland 85370ccab60SHarry Wentland ipp_program_degamma_lut(ipp, params->rgb_resulted, 85470ccab60SHarry Wentland params->hw_points_num, !is_ram_a); 85570ccab60SHarry Wentland dcn10_degamma_ram_select(ipp, !is_ram_a); 85670ccab60SHarry Wentland } 85770ccab60SHarry Wentland 85870ccab60SHarry Wentland /*****************************************/ 85970ccab60SHarry Wentland /* Constructor, Destructor */ 86070ccab60SHarry Wentland /*****************************************/ 86170ccab60SHarry Wentland 86270ccab60SHarry Wentland static void dcn10_ipp_destroy(struct input_pixel_processor **ipp) 86370ccab60SHarry Wentland { 86470ccab60SHarry Wentland dm_free(TO_DCN10_IPP(*ipp)); 86570ccab60SHarry Wentland *ipp = NULL; 86670ccab60SHarry Wentland } 86770ccab60SHarry Wentland 86870ccab60SHarry Wentland static const struct ipp_funcs dcn10_ipp_funcs = { 86970ccab60SHarry Wentland .ipp_cursor_set_attributes = dcn10_cursor_set_attributes, 87070ccab60SHarry Wentland .ipp_cursor_set_position = dcn10_cursor_set_position, 87170ccab60SHarry Wentland .ipp_set_degamma = dcn10_ipp_set_degamma, 87270ccab60SHarry Wentland .ipp_full_bypass = dcn10_ipp_full_bypass, 87370ccab60SHarry Wentland .ipp_setup = dcn10_ipp_cnv_setup, 87470ccab60SHarry Wentland .ipp_program_degamma_pwl = dcn10_ipp_set_degamma_pwl, 87570ccab60SHarry Wentland .ipp_destroy = dcn10_ipp_destroy 87670ccab60SHarry Wentland }; 87770ccab60SHarry Wentland 87870ccab60SHarry Wentland void dcn10_ipp_construct( 87970ccab60SHarry Wentland struct dcn10_ipp *ippn10, 88070ccab60SHarry Wentland struct dc_context *ctx, 88170ccab60SHarry Wentland int inst, 88270ccab60SHarry Wentland const struct dcn10_ipp_registers *regs, 88370ccab60SHarry Wentland const struct dcn10_ipp_shift *ipp_shift, 88470ccab60SHarry Wentland const struct dcn10_ipp_mask *ipp_mask) 88570ccab60SHarry Wentland { 88670ccab60SHarry Wentland ippn10->base.ctx = ctx; 88770ccab60SHarry Wentland ippn10->base.inst = inst; 88870ccab60SHarry Wentland ippn10->base.funcs = &dcn10_ipp_funcs; 88970ccab60SHarry Wentland 89070ccab60SHarry Wentland ippn10->regs = regs; 89170ccab60SHarry Wentland ippn10->ipp_shift = ipp_shift; 89270ccab60SHarry Wentland ippn10->ipp_mask = ipp_mask; 89370ccab60SHarry Wentland } 894