1 /* 2 * Copyright 2016 Advanced Micro Devices, Inc. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included in 12 * all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 * 22 * Authors: AMD 23 * 24 */ 25 26 #include "hw_sequencer_private.h" 27 #include "dce110/dce110_hw_sequencer.h" 28 #include "dcn10_hw_sequencer.h" 29 30 static const struct hw_sequencer_funcs dcn10_funcs = { 31 .program_gamut_remap = dcn10_program_gamut_remap, 32 .init_hw = dcn10_init_hw, 33 .power_down_on_boot = dcn10_power_down_on_boot, 34 .apply_ctx_to_hw = dce110_apply_ctx_to_hw, 35 .apply_ctx_for_surface = dcn10_apply_ctx_for_surface, 36 .post_unlock_program_front_end = dcn10_post_unlock_program_front_end, 37 .wait_for_pending_cleared = dcn10_wait_for_pending_cleared, 38 .update_plane_addr = dcn10_update_plane_addr, 39 .update_dchub = dcn10_update_dchub, 40 .update_pending_status = dcn10_update_pending_status, 41 .program_output_csc = dcn10_program_output_csc, 42 .enable_accelerated_mode = dce110_enable_accelerated_mode, 43 .enable_timing_synchronization = dcn10_enable_timing_synchronization, 44 .enable_per_frame_crtc_position_reset = dcn10_enable_per_frame_crtc_position_reset, 45 .update_info_frame = dce110_update_info_frame, 46 .send_immediate_sdp_message = dcn10_send_immediate_sdp_message, 47 .enable_stream = dce110_enable_stream, 48 .disable_stream = dce110_disable_stream, 49 .unblank_stream = dcn10_unblank_stream, 50 .blank_stream = dce110_blank_stream, 51 .enable_audio_stream = dce110_enable_audio_stream, 52 .disable_audio_stream = dce110_disable_audio_stream, 53 .disable_plane = dcn10_disable_plane, 54 .pipe_control_lock = dcn10_pipe_control_lock, 55 .cursor_lock = dcn10_cursor_lock, 56 .interdependent_update_lock = dcn10_lock_all_pipes, 57 .prepare_bandwidth = dcn10_prepare_bandwidth, 58 .optimize_bandwidth = dcn10_optimize_bandwidth, 59 .set_drr = dcn10_set_drr, 60 .get_position = dcn10_get_position, 61 .set_static_screen_control = dcn10_set_static_screen_control, 62 .setup_stereo = dcn10_setup_stereo, 63 .set_avmute = dce110_set_avmute, 64 .log_hw_state = dcn10_log_hw_state, 65 .get_hw_state = dcn10_get_hw_state, 66 .clear_status_bits = dcn10_clear_status_bits, 67 .wait_for_mpcc_disconnect = dcn10_wait_for_mpcc_disconnect, 68 .edp_backlight_control = dce110_edp_backlight_control, 69 .edp_power_control = dce110_edp_power_control, 70 .edp_wait_for_hpd_ready = dce110_edp_wait_for_hpd_ready, 71 .set_cursor_position = dcn10_set_cursor_position, 72 .set_cursor_attribute = dcn10_set_cursor_attribute, 73 .set_cursor_sdr_white_level = dcn10_set_cursor_sdr_white_level, 74 .setup_periodic_interrupt = dcn10_setup_periodic_interrupt, 75 .set_clock = dcn10_set_clock, 76 .get_clock = dcn10_get_clock, 77 .get_vupdate_offset_from_vsync = dcn10_get_vupdate_offset_from_vsync, 78 .calc_vupdate_position = dcn10_calc_vupdate_position, 79 .set_backlight_level = dce110_set_backlight_level, 80 .set_abm_immediate_disable = dce110_set_abm_immediate_disable, 81 .set_pipe = dce110_set_pipe, 82 .set_hubp_blank = dcn10_set_hubp_blank, 83 }; 84 85 static const struct hwseq_private_funcs dcn10_private_funcs = { 86 .init_pipes = dcn10_init_pipes, 87 .update_plane_addr = dcn10_update_plane_addr, 88 .plane_atomic_disconnect = dcn10_plane_atomic_disconnect, 89 .program_pipe = dcn10_program_pipe, 90 .update_mpcc = dcn10_update_mpcc, 91 .set_input_transfer_func = dcn10_set_input_transfer_func, 92 .set_output_transfer_func = dcn10_set_output_transfer_func, 93 .power_down = dce110_power_down, 94 .enable_display_power_gating = dcn10_dummy_display_power_gating, 95 .blank_pixel_data = dcn10_blank_pixel_data, 96 .reset_hw_ctx_wrap = dcn10_reset_hw_ctx_wrap, 97 .enable_stream_timing = dcn10_enable_stream_timing, 98 .edp_backlight_control = dce110_edp_backlight_control, 99 .disable_stream_gating = NULL, 100 .enable_stream_gating = NULL, 101 .setup_vupdate_interrupt = dcn10_setup_vupdate_interrupt, 102 .did_underflow_occur = dcn10_did_underflow_occur, 103 .init_blank = NULL, 104 .disable_vga = dcn10_disable_vga, 105 .bios_golden_init = dcn10_bios_golden_init, 106 .plane_atomic_disable = dcn10_plane_atomic_disable, 107 .plane_atomic_power_down = dcn10_plane_atomic_power_down, 108 .enable_power_gating_plane = dcn10_enable_power_gating_plane, 109 .dpp_pg_control = dcn10_dpp_pg_control, 110 .hubp_pg_control = dcn10_hubp_pg_control, 111 .dsc_pg_control = NULL, 112 .get_surface_visual_confirm_color = dcn10_get_surface_visual_confirm_color, 113 .get_hdr_visual_confirm_color = dcn10_get_hdr_visual_confirm_color, 114 .set_hdr_multiplier = dcn10_set_hdr_multiplier, 115 .verify_allow_pstate_change_high = dcn10_verify_allow_pstate_change_high, 116 }; 117 118 void dcn10_hw_sequencer_construct(struct dc *dc) 119 { 120 dc->hwss = dcn10_funcs; 121 dc->hwseq->funcs = dcn10_private_funcs; 122 } 123