1 /* 2 * Copyright 2019 Advanced Micro Devices, Inc. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included in 12 * all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 * 22 * Authors: AMD 23 * 24 */ 25 26 #include "dmub_psr.h" 27 #include "dc.h" 28 #include "dc_dmub_srv.h" 29 #include "dmub/dmub_srv.h" 30 #include "core_types.h" 31 32 #define MAX_PIPES 6 33 34 /** 35 * Convert dmcub psr state to dmcu psr state. 36 */ 37 static void convert_psr_state(uint32_t *psr_state) 38 { 39 if (*psr_state == 0) 40 *psr_state = 0; 41 else if (*psr_state == 0x10) 42 *psr_state = 1; 43 else if (*psr_state == 0x11) 44 *psr_state = 2; 45 else if (*psr_state == 0x20) 46 *psr_state = 3; 47 else if (*psr_state == 0x21) 48 *psr_state = 4; 49 else if (*psr_state == 0x30) 50 *psr_state = 5; 51 else if (*psr_state == 0x31) 52 *psr_state = 6; 53 else if (*psr_state == 0x40) 54 *psr_state = 7; 55 else if (*psr_state == 0x41) 56 *psr_state = 8; 57 else if (*psr_state == 0x42) 58 *psr_state = 9; 59 else if (*psr_state == 0x43) 60 *psr_state = 10; 61 else if (*psr_state == 0x44) 62 *psr_state = 11; 63 else if (*psr_state == 0x50) 64 *psr_state = 12; 65 else if (*psr_state == 0x51) 66 *psr_state = 13; 67 else if (*psr_state == 0x52) 68 *psr_state = 14; 69 else if (*psr_state == 0x53) 70 *psr_state = 15; 71 } 72 73 /** 74 * Get PSR state from firmware. 75 */ 76 static void dmub_psr_get_state(struct dmub_psr *dmub, uint32_t *psr_state) 77 { 78 struct dmub_srv *srv = dmub->ctx->dmub_srv->dmub; 79 80 // Send gpint command and wait for ack 81 dmub_srv_send_gpint_command(srv, DMUB_GPINT__GET_PSR_STATE, 0, 30); 82 83 dmub_srv_get_gpint_response(srv, psr_state); 84 85 convert_psr_state(psr_state); 86 } 87 88 /** 89 * Set PSR version. 90 */ 91 static bool dmub_psr_set_version(struct dmub_psr *dmub, struct dc_stream_state *stream) 92 { 93 union dmub_rb_cmd cmd; 94 struct dc_context *dc = dmub->ctx; 95 96 if (stream->link->psr_settings.psr_version == DC_PSR_VERSION_UNSUPPORTED) 97 return false; 98 99 cmd.psr_set_version.header.type = DMUB_CMD__PSR; 100 cmd.psr_set_version.header.sub_type = DMUB_CMD__PSR_SET_VERSION; 101 switch (stream->link->psr_settings.psr_version) { 102 case DC_PSR_VERSION_1: 103 cmd.psr_set_version.psr_set_version_data.version = PSR_VERSION_1; 104 break; 105 case DC_PSR_VERSION_UNSUPPORTED: 106 default: 107 cmd.psr_set_version.psr_set_version_data.version = PSR_VERSION_UNSUPPORTED; 108 break; 109 } 110 cmd.psr_set_version.header.payload_bytes = sizeof(struct dmub_cmd_psr_set_version_data); 111 112 dc_dmub_srv_cmd_queue(dc->dmub_srv, &cmd); 113 dc_dmub_srv_cmd_execute(dc->dmub_srv); 114 dc_dmub_srv_wait_idle(dc->dmub_srv); 115 116 return true; 117 } 118 119 /** 120 * Enable/Disable PSR. 121 */ 122 static void dmub_psr_enable(struct dmub_psr *dmub, bool enable) 123 { 124 union dmub_rb_cmd cmd; 125 struct dc_context *dc = dmub->ctx; 126 127 cmd.psr_enable.header.type = DMUB_CMD__PSR; 128 129 if (enable) 130 cmd.psr_enable.header.sub_type = DMUB_CMD__PSR_ENABLE; 131 else 132 cmd.psr_enable.header.sub_type = DMUB_CMD__PSR_DISABLE; 133 134 cmd.psr_enable.header.payload_bytes = 0; // Send header only 135 136 dc_dmub_srv_cmd_queue(dc->dmub_srv, &cmd); 137 dc_dmub_srv_cmd_execute(dc->dmub_srv); 138 dc_dmub_srv_wait_idle(dc->dmub_srv); 139 } 140 141 /** 142 * Set PSR level. 143 */ 144 static void dmub_psr_set_level(struct dmub_psr *dmub, uint16_t psr_level) 145 { 146 union dmub_rb_cmd cmd; 147 uint32_t psr_state = 0; 148 struct dc_context *dc = dmub->ctx; 149 150 dmub_psr_get_state(dmub, &psr_state); 151 152 if (psr_state == 0) 153 return; 154 155 cmd.psr_set_level.header.type = DMUB_CMD__PSR; 156 cmd.psr_set_level.header.sub_type = DMUB_CMD__PSR_SET_LEVEL; 157 cmd.psr_set_level.header.payload_bytes = sizeof(struct dmub_cmd_psr_set_level_data); 158 cmd.psr_set_level.psr_set_level_data.psr_level = psr_level; 159 160 dc_dmub_srv_cmd_queue(dc->dmub_srv, &cmd); 161 dc_dmub_srv_cmd_execute(dc->dmub_srv); 162 dc_dmub_srv_wait_idle(dc->dmub_srv); 163 } 164 165 /** 166 * Setup PSR by programming phy registers and sending psr hw context values to firmware. 167 */ 168 static bool dmub_psr_copy_settings(struct dmub_psr *dmub, 169 struct dc_link *link, 170 struct psr_context *psr_context) 171 { 172 union dmub_rb_cmd cmd; 173 struct dc_context *dc = dmub->ctx; 174 struct dmub_cmd_psr_copy_settings_data *copy_settings_data 175 = &cmd.psr_copy_settings.psr_copy_settings_data; 176 struct pipe_ctx *pipe_ctx = NULL; 177 struct resource_context *res_ctx = &link->ctx->dc->current_state->res_ctx; 178 int i = 0; 179 180 for (i = 0; i < MAX_PIPES; i++) { 181 if (res_ctx->pipe_ctx[i].stream && 182 res_ctx->pipe_ctx[i].stream->link == link && 183 res_ctx->pipe_ctx[i].stream->link->connector_signal == SIGNAL_TYPE_EDP) { 184 pipe_ctx = &res_ctx->pipe_ctx[i]; 185 break; 186 } 187 } 188 189 if (!pipe_ctx) 190 return false; 191 192 // First, set the psr version 193 if (!dmub_psr_set_version(dmub, pipe_ctx->stream)) 194 return false; 195 196 // Program DP DPHY fast training registers 197 link->link_enc->funcs->psr_program_dp_dphy_fast_training(link->link_enc, 198 psr_context->psrExitLinkTrainingRequired); 199 200 // Program DP_SEC_CNTL1 register to set transmission GPS0 line num and priority to high 201 link->link_enc->funcs->psr_program_secondary_packet(link->link_enc, 202 psr_context->sdpTransmitLineNumDeadline); 203 204 cmd.psr_copy_settings.header.type = DMUB_CMD__PSR; 205 cmd.psr_copy_settings.header.sub_type = DMUB_CMD__PSR_COPY_SETTINGS; 206 cmd.psr_copy_settings.header.payload_bytes = sizeof(struct dmub_cmd_psr_copy_settings_data); 207 208 // Hw insts 209 copy_settings_data->dpphy_inst = psr_context->transmitterId; 210 copy_settings_data->aux_inst = psr_context->channel; 211 copy_settings_data->digfe_inst = psr_context->engineId; 212 copy_settings_data->digbe_inst = psr_context->transmitterId; 213 214 copy_settings_data->mpcc_inst = pipe_ctx->plane_res.mpcc_inst; 215 216 if (pipe_ctx->plane_res.dpp) 217 copy_settings_data->dpp_inst = pipe_ctx->plane_res.dpp->inst; 218 else 219 copy_settings_data->dpp_inst = 0; 220 if (pipe_ctx->stream_res.opp) 221 copy_settings_data->opp_inst = pipe_ctx->stream_res.opp->inst; 222 else 223 copy_settings_data->opp_inst = 0; 224 if (pipe_ctx->stream_res.tg) 225 copy_settings_data->otg_inst = pipe_ctx->stream_res.tg->inst; 226 else 227 copy_settings_data->otg_inst = 0; 228 229 // Misc 230 copy_settings_data->psr_level = psr_context->psr_level.u32all; 231 copy_settings_data->smu_optimizations_en = psr_context->allow_smu_optimizations; 232 copy_settings_data->frame_delay = psr_context->frame_delay; 233 copy_settings_data->frame_cap_ind = psr_context->psrFrameCaptureIndicationReq; 234 copy_settings_data->debug.bitfields.visual_confirm = dc->dc->debug.visual_confirm == VISUAL_CONFIRM_PSR ? 235 true : false; 236 copy_settings_data->debug.bitfields.use_hw_lock_mgr = 1; 237 copy_settings_data->init_sdp_deadline = psr_context->sdpTransmitLineNumDeadline; 238 239 dc_dmub_srv_cmd_queue(dc->dmub_srv, &cmd); 240 dc_dmub_srv_cmd_execute(dc->dmub_srv); 241 dc_dmub_srv_wait_idle(dc->dmub_srv); 242 243 return true; 244 } 245 246 static const struct dmub_psr_funcs psr_funcs = { 247 .psr_copy_settings = dmub_psr_copy_settings, 248 .psr_enable = dmub_psr_enable, 249 .psr_get_state = dmub_psr_get_state, 250 .psr_set_level = dmub_psr_set_level, 251 }; 252 253 /** 254 * Construct PSR object. 255 */ 256 static void dmub_psr_construct(struct dmub_psr *psr, struct dc_context *ctx) 257 { 258 psr->ctx = ctx; 259 psr->funcs = &psr_funcs; 260 } 261 262 /** 263 * Allocate and initialize PSR object. 264 */ 265 struct dmub_psr *dmub_psr_create(struct dc_context *ctx) 266 { 267 struct dmub_psr *psr = kzalloc(sizeof(struct dmub_psr), GFP_KERNEL); 268 269 if (psr == NULL) { 270 BREAK_TO_DEBUGGER(); 271 return NULL; 272 } 273 274 dmub_psr_construct(psr, ctx); 275 276 return psr; 277 } 278 279 /** 280 * Deallocate PSR object. 281 */ 282 void dmub_psr_destroy(struct dmub_psr **dmub) 283 { 284 kfree(*dmub); 285 *dmub = NULL; 286 } 287