1 /* 2 * Copyright 2019 Advanced Micro Devices, Inc. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included in 12 * all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 * 22 * Authors: AMD 23 * 24 */ 25 26 #include "dmub_psr.h" 27 #include "dc.h" 28 #include "dc_dmub_srv.h" 29 #include "dmub/dmub_srv.h" 30 #include "core_types.h" 31 32 #define MAX_PIPES 6 33 34 /** 35 * Convert dmcub psr state to dmcu psr state. 36 */ 37 static enum dc_psr_state convert_psr_state(uint32_t raw_state) 38 { 39 enum dc_psr_state state = PSR_STATE0; 40 41 if (raw_state == 0) 42 state = PSR_STATE0; 43 else if (raw_state == 0x10) 44 state = PSR_STATE1; 45 else if (raw_state == 0x11) 46 state = PSR_STATE1a; 47 else if (raw_state == 0x20) 48 state = PSR_STATE2; 49 else if (raw_state == 0x21) 50 state = PSR_STATE2a; 51 else if (raw_state == 0x30) 52 state = PSR_STATE3; 53 else if (raw_state == 0x31) 54 state = PSR_STATE3Init; 55 else if (raw_state == 0x40) 56 state = PSR_STATE4; 57 else if (raw_state == 0x41) 58 state = PSR_STATE4a; 59 else if (raw_state == 0x42) 60 state = PSR_STATE4b; 61 else if (raw_state == 0x43) 62 state = PSR_STATE4c; 63 else if (raw_state == 0x44) 64 state = PSR_STATE4d; 65 else if (raw_state == 0x50) 66 state = PSR_STATE5; 67 else if (raw_state == 0x51) 68 state = PSR_STATE5a; 69 else if (raw_state == 0x52) 70 state = PSR_STATE5b; 71 else if (raw_state == 0x53) 72 state = PSR_STATE5c; 73 74 return state; 75 } 76 77 /** 78 * Get PSR state from firmware. 79 */ 80 static void dmub_psr_get_state(struct dmub_psr *dmub, enum dc_psr_state *state) 81 { 82 struct dmub_srv *srv = dmub->ctx->dmub_srv->dmub; 83 uint32_t raw_state; 84 85 // Send gpint command and wait for ack 86 dmub_srv_send_gpint_command(srv, DMUB_GPINT__GET_PSR_STATE, 0, 30); 87 88 dmub_srv_get_gpint_response(srv, &raw_state); 89 90 *state = convert_psr_state(raw_state); 91 } 92 93 /** 94 * Set PSR version. 95 */ 96 static bool dmub_psr_set_version(struct dmub_psr *dmub, struct dc_stream_state *stream) 97 { 98 union dmub_rb_cmd cmd; 99 struct dc_context *dc = dmub->ctx; 100 101 if (stream->link->psr_settings.psr_version == DC_PSR_VERSION_UNSUPPORTED) 102 return false; 103 104 cmd.psr_set_version.header.type = DMUB_CMD__PSR; 105 cmd.psr_set_version.header.sub_type = DMUB_CMD__PSR_SET_VERSION; 106 switch (stream->link->psr_settings.psr_version) { 107 case DC_PSR_VERSION_1: 108 cmd.psr_set_version.psr_set_version_data.version = PSR_VERSION_1; 109 break; 110 case DC_PSR_VERSION_UNSUPPORTED: 111 default: 112 cmd.psr_set_version.psr_set_version_data.version = PSR_VERSION_UNSUPPORTED; 113 break; 114 } 115 cmd.psr_set_version.header.payload_bytes = sizeof(struct dmub_cmd_psr_set_version_data); 116 117 dc_dmub_srv_cmd_queue(dc->dmub_srv, &cmd); 118 dc_dmub_srv_cmd_execute(dc->dmub_srv); 119 dc_dmub_srv_wait_idle(dc->dmub_srv); 120 121 return true; 122 } 123 124 /** 125 * Enable/Disable PSR. 126 */ 127 static void dmub_psr_enable(struct dmub_psr *dmub, bool enable, bool wait) 128 { 129 union dmub_rb_cmd cmd; 130 struct dc_context *dc = dmub->ctx; 131 uint32_t retry_count; 132 enum dc_psr_state state = PSR_STATE0; 133 134 135 cmd.psr_enable.header.type = DMUB_CMD__PSR; 136 137 if (enable) 138 cmd.psr_enable.header.sub_type = DMUB_CMD__PSR_ENABLE; 139 else 140 cmd.psr_enable.header.sub_type = DMUB_CMD__PSR_DISABLE; 141 142 cmd.psr_enable.header.payload_bytes = 0; // Send header only 143 144 dc_dmub_srv_cmd_queue(dc->dmub_srv, &cmd); 145 dc_dmub_srv_cmd_execute(dc->dmub_srv); 146 dc_dmub_srv_wait_idle(dc->dmub_srv); 147 148 /* Below loops 1000 x 500us = 500 ms. 149 * Exit PSR may need to wait 1-2 frames to power up. Timeout after at 150 * least a few frames. Should never hit the max retry assert below. 151 */ 152 if (wait) { 153 for (retry_count = 0; retry_count <= 1000; retry_count++) { 154 dmub_psr_get_state(dmub, &state); 155 156 if (enable) { 157 if (state != PSR_STATE0) 158 break; 159 } else { 160 if (state == PSR_STATE0) 161 break; 162 } 163 164 udelay(500); 165 } 166 167 /* assert if max retry hit */ 168 if (retry_count >= 1000) 169 ASSERT(0); 170 } 171 } 172 173 /** 174 * Set PSR level. 175 */ 176 static void dmub_psr_set_level(struct dmub_psr *dmub, uint16_t psr_level) 177 { 178 union dmub_rb_cmd cmd; 179 enum dc_psr_state state = PSR_STATE0; 180 struct dc_context *dc = dmub->ctx; 181 182 dmub_psr_get_state(dmub, &state); 183 184 if (state == PSR_STATE0) 185 return; 186 187 cmd.psr_set_level.header.type = DMUB_CMD__PSR; 188 cmd.psr_set_level.header.sub_type = DMUB_CMD__PSR_SET_LEVEL; 189 cmd.psr_set_level.header.payload_bytes = sizeof(struct dmub_cmd_psr_set_level_data); 190 cmd.psr_set_level.psr_set_level_data.psr_level = psr_level; 191 192 dc_dmub_srv_cmd_queue(dc->dmub_srv, &cmd); 193 dc_dmub_srv_cmd_execute(dc->dmub_srv); 194 dc_dmub_srv_wait_idle(dc->dmub_srv); 195 } 196 197 /** 198 * Setup PSR by programming phy registers and sending psr hw context values to firmware. 199 */ 200 static bool dmub_psr_copy_settings(struct dmub_psr *dmub, 201 struct dc_link *link, 202 struct psr_context *psr_context) 203 { 204 union dmub_rb_cmd cmd; 205 struct dc_context *dc = dmub->ctx; 206 struct dmub_cmd_psr_copy_settings_data *copy_settings_data 207 = &cmd.psr_copy_settings.psr_copy_settings_data; 208 struct pipe_ctx *pipe_ctx = NULL; 209 struct resource_context *res_ctx = &link->ctx->dc->current_state->res_ctx; 210 int i = 0; 211 212 for (i = 0; i < MAX_PIPES; i++) { 213 if (res_ctx->pipe_ctx[i].stream && 214 res_ctx->pipe_ctx[i].stream->link == link && 215 res_ctx->pipe_ctx[i].stream->link->connector_signal == SIGNAL_TYPE_EDP) { 216 pipe_ctx = &res_ctx->pipe_ctx[i]; 217 break; 218 } 219 } 220 221 if (!pipe_ctx) 222 return false; 223 224 // First, set the psr version 225 if (!dmub_psr_set_version(dmub, pipe_ctx->stream)) 226 return false; 227 228 // Program DP DPHY fast training registers 229 link->link_enc->funcs->psr_program_dp_dphy_fast_training(link->link_enc, 230 psr_context->psrExitLinkTrainingRequired); 231 232 // Program DP_SEC_CNTL1 register to set transmission GPS0 line num and priority to high 233 link->link_enc->funcs->psr_program_secondary_packet(link->link_enc, 234 psr_context->sdpTransmitLineNumDeadline); 235 236 cmd.psr_copy_settings.header.type = DMUB_CMD__PSR; 237 cmd.psr_copy_settings.header.sub_type = DMUB_CMD__PSR_COPY_SETTINGS; 238 cmd.psr_copy_settings.header.payload_bytes = sizeof(struct dmub_cmd_psr_copy_settings_data); 239 240 // Hw insts 241 copy_settings_data->dpphy_inst = psr_context->transmitterId; 242 copy_settings_data->aux_inst = psr_context->channel; 243 copy_settings_data->digfe_inst = psr_context->engineId; 244 copy_settings_data->digbe_inst = psr_context->transmitterId; 245 246 copy_settings_data->mpcc_inst = pipe_ctx->plane_res.mpcc_inst; 247 248 if (pipe_ctx->plane_res.dpp) 249 copy_settings_data->dpp_inst = pipe_ctx->plane_res.dpp->inst; 250 else 251 copy_settings_data->dpp_inst = 0; 252 if (pipe_ctx->stream_res.opp) 253 copy_settings_data->opp_inst = pipe_ctx->stream_res.opp->inst; 254 else 255 copy_settings_data->opp_inst = 0; 256 if (pipe_ctx->stream_res.tg) 257 copy_settings_data->otg_inst = pipe_ctx->stream_res.tg->inst; 258 else 259 copy_settings_data->otg_inst = 0; 260 261 // Misc 262 copy_settings_data->psr_level = psr_context->psr_level.u32all; 263 copy_settings_data->smu_optimizations_en = psr_context->allow_smu_optimizations; 264 copy_settings_data->multi_disp_optimizations_en = psr_context->allow_multi_disp_optimizations; 265 copy_settings_data->frame_delay = psr_context->frame_delay; 266 copy_settings_data->frame_cap_ind = psr_context->psrFrameCaptureIndicationReq; 267 copy_settings_data->init_sdp_deadline = psr_context->sdpTransmitLineNumDeadline; 268 copy_settings_data->debug.u32All = 0; 269 copy_settings_data->debug.bitfields.visual_confirm = dc->dc->debug.visual_confirm == VISUAL_CONFIRM_PSR ? 270 true : false; 271 copy_settings_data->debug.bitfields.use_hw_lock_mgr = 1; 272 273 dc_dmub_srv_cmd_queue(dc->dmub_srv, &cmd); 274 dc_dmub_srv_cmd_execute(dc->dmub_srv); 275 dc_dmub_srv_wait_idle(dc->dmub_srv); 276 277 return true; 278 } 279 280 /** 281 * Send command to PSR to force static ENTER and ignore all state changes until exit 282 */ 283 static void dmub_psr_force_static(struct dmub_psr *dmub) 284 { 285 union dmub_rb_cmd cmd; 286 struct dc_context *dc = dmub->ctx; 287 288 cmd.psr_force_static.header.type = DMUB_CMD__PSR; 289 cmd.psr_force_static.header.sub_type = DMUB_CMD__PSR_FORCE_STATIC; 290 cmd.psr_enable.header.payload_bytes = 0; 291 292 dc_dmub_srv_cmd_queue(dc->dmub_srv, &cmd); 293 dc_dmub_srv_cmd_execute(dc->dmub_srv); 294 dc_dmub_srv_wait_idle(dc->dmub_srv); 295 } 296 297 /** 298 * Get PSR residency from firmware. 299 */ 300 static void dmub_psr_get_residency(struct dmub_psr *dmub, uint32_t *residency) 301 { 302 struct dmub_srv *srv = dmub->ctx->dmub_srv->dmub; 303 304 // Send gpint command and wait for ack 305 dmub_srv_send_gpint_command(srv, DMUB_GPINT__PSR_RESIDENCY, 0, 30); 306 307 dmub_srv_get_gpint_response(srv, residency); 308 } 309 310 static const struct dmub_psr_funcs psr_funcs = { 311 .psr_copy_settings = dmub_psr_copy_settings, 312 .psr_enable = dmub_psr_enable, 313 .psr_get_state = dmub_psr_get_state, 314 .psr_set_level = dmub_psr_set_level, 315 .psr_force_static = dmub_psr_force_static, 316 .psr_get_residency = dmub_psr_get_residency, 317 }; 318 319 /** 320 * Construct PSR object. 321 */ 322 static void dmub_psr_construct(struct dmub_psr *psr, struct dc_context *ctx) 323 { 324 psr->ctx = ctx; 325 psr->funcs = &psr_funcs; 326 } 327 328 /** 329 * Allocate and initialize PSR object. 330 */ 331 struct dmub_psr *dmub_psr_create(struct dc_context *ctx) 332 { 333 struct dmub_psr *psr = kzalloc(sizeof(struct dmub_psr), GFP_KERNEL); 334 335 if (psr == NULL) { 336 BREAK_TO_DEBUGGER(); 337 return NULL; 338 } 339 340 dmub_psr_construct(psr, ctx); 341 342 return psr; 343 } 344 345 /** 346 * Deallocate PSR object. 347 */ 348 void dmub_psr_destroy(struct dmub_psr **dmub) 349 { 350 kfree(*dmub); 351 *dmub = NULL; 352 } 353