1 /* 2 * Copyright 2019 Advanced Micro Devices, Inc. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included in 12 * all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 * 22 * Authors: AMD 23 * 24 */ 25 26 #include "dmub_psr.h" 27 #include "dc.h" 28 #include "dc_dmub_srv.h" 29 #include "../../dmub/inc/dmub_srv.h" 30 #include "../../dmub/inc/dmub_gpint_cmd.h" 31 #include "core_types.h" 32 33 #define MAX_PIPES 6 34 35 /** 36 * Get PSR state from firmware. 37 */ 38 static void dmub_psr_get_state(struct dmub_psr *dmub, uint32_t *psr_state) 39 { 40 struct dmub_srv *srv = dmub->ctx->dmub_srv->dmub; 41 42 // Send gpint command and wait for ack 43 dmub_srv_send_gpint_command(srv, DMUB_GPINT__GET_PSR_STATE, 0, 30); 44 45 dmub_srv_get_gpint_response(srv, psr_state); 46 } 47 48 /** 49 * Set PSR version. 50 */ 51 static bool dmub_psr_set_version(struct dmub_psr *dmub, struct dc_stream_state *stream) 52 { 53 union dmub_rb_cmd cmd; 54 struct dc_context *dc = dmub->ctx; 55 56 cmd.psr_set_version.header.type = DMUB_CMD__PSR; 57 cmd.psr_set_version.header.sub_type = DMUB_CMD__PSR_SET_VERSION; 58 59 if (stream->psr_version == 0x0) // Unsupported 60 return false; 61 else if (stream->psr_version == 0x1) 62 cmd.psr_set_version.psr_set_version_data.version = PSR_VERSION_1; 63 cmd.psr_enable.header.payload_bytes = sizeof(struct dmub_cmd_psr_set_version_data); 64 65 dc_dmub_srv_cmd_queue(dc->dmub_srv, &cmd.psr_enable.header); 66 dc_dmub_srv_cmd_execute(dc->dmub_srv); 67 dc_dmub_srv_wait_idle(dc->dmub_srv); 68 69 return true; 70 } 71 72 /** 73 * Enable/Disable PSR. 74 */ 75 static void dmub_psr_enable(struct dmub_psr *dmub, bool enable) 76 { 77 union dmub_rb_cmd cmd; 78 struct dc_context *dc = dmub->ctx; 79 80 cmd.psr_enable.header.type = DMUB_CMD__PSR; 81 82 if (enable) 83 cmd.psr_enable.header.sub_type = DMUB_CMD__PSR_ENABLE; 84 else 85 cmd.psr_enable.header.sub_type = DMUB_CMD__PSR_DISABLE; 86 87 cmd.psr_enable.header.payload_bytes = 0; // Send header only 88 89 dc_dmub_srv_cmd_queue(dc->dmub_srv, &cmd.psr_enable.header); 90 dc_dmub_srv_cmd_execute(dc->dmub_srv); 91 dc_dmub_srv_wait_idle(dc->dmub_srv); 92 } 93 94 /** 95 * Set PSR level. 96 */ 97 static void dmub_psr_set_level(struct dmub_psr *dmub, uint16_t psr_level) 98 { 99 union dmub_rb_cmd cmd; 100 uint32_t psr_state = 0; 101 struct dc_context *dc = dmub->ctx; 102 103 dmub_psr_get_state(dmub, &psr_state); 104 105 if (psr_state == 0) 106 return; 107 108 cmd.psr_set_level.header.type = DMUB_CMD__PSR; 109 cmd.psr_set_level.header.sub_type = DMUB_CMD__PSR_SET_LEVEL; 110 cmd.psr_set_level.header.payload_bytes = sizeof(struct dmub_cmd_psr_set_level_data); 111 cmd.psr_set_level.psr_set_level_data.psr_level = psr_level; 112 113 dc_dmub_srv_cmd_queue(dc->dmub_srv, &cmd.psr_set_level.header); 114 dc_dmub_srv_cmd_execute(dc->dmub_srv); 115 dc_dmub_srv_wait_idle(dc->dmub_srv); 116 } 117 118 /** 119 * Setup PSR by programming phy registers and sending psr hw context values to firmware. 120 */ 121 static bool dmub_psr_copy_settings(struct dmub_psr *dmub, 122 struct dc_link *link, 123 struct psr_context *psr_context) 124 { 125 union dmub_rb_cmd cmd; 126 struct dc_context *dc = dmub->ctx; 127 struct dmub_cmd_psr_copy_settings_data *copy_settings_data 128 = &cmd.psr_copy_settings.psr_copy_settings_data; 129 struct pipe_ctx *pipe_ctx = NULL; 130 struct resource_context *res_ctx = &link->ctx->dc->current_state->res_ctx; 131 int i = 0; 132 133 for (i = 0; i < MAX_PIPES; i++) { 134 if (res_ctx->pipe_ctx[i].stream && 135 res_ctx->pipe_ctx[i].stream->link == link && 136 res_ctx->pipe_ctx[i].stream->link->connector_signal == SIGNAL_TYPE_EDP) { 137 pipe_ctx = &res_ctx->pipe_ctx[i]; 138 break; 139 } 140 } 141 142 if (!pipe_ctx) 143 return false; 144 145 // First, set the psr version 146 if (!dmub_psr_set_version(dmub, pipe_ctx->stream)) 147 return false; 148 149 // Program DP DPHY fast training registers 150 link->link_enc->funcs->psr_program_dp_dphy_fast_training(link->link_enc, 151 psr_context->psrExitLinkTrainingRequired); 152 153 // Program DP_SEC_CNTL1 register to set transmission GPS0 line num and priority to high 154 link->link_enc->funcs->psr_program_secondary_packet(link->link_enc, 155 psr_context->sdpTransmitLineNumDeadline); 156 157 cmd.psr_copy_settings.header.type = DMUB_CMD__PSR; 158 cmd.psr_copy_settings.header.sub_type = DMUB_CMD__PSR_COPY_SETTINGS; 159 cmd.psr_copy_settings.header.payload_bytes = sizeof(struct dmub_cmd_psr_copy_settings_data); 160 161 // Hw insts 162 copy_settings_data->dpphy_inst = psr_context->phyType; 163 copy_settings_data->aux_inst = psr_context->channel; 164 copy_settings_data->digfe_inst = psr_context->engineId; 165 copy_settings_data->digbe_inst = psr_context->transmitterId; 166 167 copy_settings_data->mpcc_inst = pipe_ctx->plane_res.mpcc_inst; 168 169 if (pipe_ctx->plane_res.dpp) 170 copy_settings_data->dpp_inst = pipe_ctx->plane_res.dpp->inst; 171 else 172 copy_settings_data->dpp_inst = 0; 173 if (pipe_ctx->stream_res.opp) 174 copy_settings_data->opp_inst = pipe_ctx->stream_res.opp->inst; 175 else 176 copy_settings_data->opp_inst = 0; 177 if (pipe_ctx->stream_res.tg) 178 copy_settings_data->otg_inst = pipe_ctx->stream_res.tg->inst; 179 else 180 copy_settings_data->otg_inst = 0; 181 182 // Misc 183 copy_settings_data->psr_level = psr_context->psr_level.u32all; 184 copy_settings_data->smu_optimizations_en = psr_context->allow_smu_optimizations; 185 copy_settings_data->frame_delay = psr_context->frame_delay; 186 copy_settings_data->frame_cap_ind = psr_context->psrFrameCaptureIndicationReq; 187 188 dc_dmub_srv_cmd_queue(dc->dmub_srv, &cmd.psr_copy_settings.header); 189 dc_dmub_srv_cmd_execute(dc->dmub_srv); 190 dc_dmub_srv_wait_idle(dc->dmub_srv); 191 192 return true; 193 } 194 195 static const struct dmub_psr_funcs psr_funcs = { 196 .psr_copy_settings = dmub_psr_copy_settings, 197 .psr_enable = dmub_psr_enable, 198 .psr_get_state = dmub_psr_get_state, 199 .psr_set_level = dmub_psr_set_level, 200 }; 201 202 /** 203 * Construct PSR object. 204 */ 205 static void dmub_psr_construct(struct dmub_psr *psr, struct dc_context *ctx) 206 { 207 psr->ctx = ctx; 208 psr->funcs = &psr_funcs; 209 } 210 211 /** 212 * Allocate and initialize PSR object. 213 */ 214 struct dmub_psr *dmub_psr_create(struct dc_context *ctx) 215 { 216 struct dmub_psr *psr = kzalloc(sizeof(struct dmub_psr), GFP_KERNEL); 217 218 if (psr == NULL) { 219 BREAK_TO_DEBUGGER(); 220 return NULL; 221 } 222 223 dmub_psr_construct(psr, ctx); 224 225 return psr; 226 } 227 228 /** 229 * Deallocate PSR object. 230 */ 231 void dmub_psr_destroy(struct dmub_psr **dmub) 232 { 233 kfree(*dmub); 234 *dmub = NULL; 235 } 236