1 /*
2  * Copyright 2012-15 Advanced Micro Devices, Inc.
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a
5  * copy of this software and associated documentation files (the "Software"),
6  * to deal in the Software without restriction, including without limitation
7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8  * and/or sell copies of the Software, and to permit persons to whom the
9  * Software is furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice shall be included in
12  * all copies or substantial portions of the Software.
13  *
14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20  * OTHER DEALINGS IN THE SOFTWARE.
21  *
22  * Authors: AMD
23  *
24  */
25 #ifndef __DAL_AUDIO_DCE_110_H__
26 #define __DAL_AUDIO_DCE_110_H__
27 
28 #include "audio.h"
29 
30 #define AUD_COMMON_REG_LIST(id)\
31 	SRI(AZALIA_F0_CODEC_ENDPOINT_INDEX, AZF0ENDPOINT, id),\
32 	SRI(AZALIA_F0_CODEC_ENDPOINT_DATA, AZF0ENDPOINT, id),\
33 	SR(AZALIA_F0_CODEC_FUNCTION_PARAMETER_STREAM_FORMATS),\
34 	SR(AZALIA_F0_CODEC_FUNCTION_PARAMETER_SUPPORTED_SIZE_RATES),\
35 	SR(AZALIA_F0_CODEC_FUNCTION_PARAMETER_POWER_STATES),\
36 	SR(DCCG_AUDIO_DTO_SOURCE),\
37 	SR(DCCG_AUDIO_DTO0_MODULE),\
38 	SR(DCCG_AUDIO_DTO0_PHASE),\
39 	SR(DCCG_AUDIO_DTO1_MODULE),\
40 	SR(DCCG_AUDIO_DTO1_PHASE)
41 
42 
43  /* set field name */
44 #define SF(reg_name, field_name, post_fix)\
45 	.field_name = reg_name ## __ ## field_name ## post_fix
46 
47 
48 #define AUD_COMMON_MASK_SH_LIST_BASE(mask_sh)\
49 		SF(DCCG_AUDIO_DTO_SOURCE, DCCG_AUDIO_DTO0_SOURCE_SEL, mask_sh),\
50 		SF(DCCG_AUDIO_DTO_SOURCE, DCCG_AUDIO_DTO_SEL, mask_sh),\
51 		SF(DCCG_AUDIO_DTO_SOURCE, DCCG_AUDIO_DTO2_USE_512FBR_DTO, mask_sh),\
52 		SF(DCCG_AUDIO_DTO0_MODULE, DCCG_AUDIO_DTO0_MODULE, mask_sh),\
53 		SF(DCCG_AUDIO_DTO0_PHASE, DCCG_AUDIO_DTO0_PHASE, mask_sh),\
54 		SF(DCCG_AUDIO_DTO1_MODULE, DCCG_AUDIO_DTO1_MODULE, mask_sh),\
55 		SF(DCCG_AUDIO_DTO1_PHASE, DCCG_AUDIO_DTO1_PHASE, mask_sh),\
56 		SF(AZALIA_F0_CODEC_FUNCTION_PARAMETER_SUPPORTED_SIZE_RATES, AUDIO_RATE_CAPABILITIES, mask_sh),\
57 		SF(AZALIA_F0_CODEC_FUNCTION_PARAMETER_POWER_STATES, CLKSTOP, mask_sh),\
58 		SF(AZALIA_F0_CODEC_FUNCTION_PARAMETER_POWER_STATES, EPSS, mask_sh)
59 
60 #define AUD_COMMON_MASK_SH_LIST(mask_sh)\
61 		AUD_COMMON_MASK_SH_LIST_BASE(mask_sh),\
62 		SF(AZALIA_F0_CODEC_ENDPOINT_INDEX, AZALIA_ENDPOINT_REG_INDEX, mask_sh),\
63 		SF(AZALIA_F0_CODEC_ENDPOINT_DATA, AZALIA_ENDPOINT_REG_DATA, mask_sh)
64 
65 
66 struct dce_audio_registers {
67 	uint32_t AZALIA_F0_CODEC_ENDPOINT_INDEX;
68 	uint32_t AZALIA_F0_CODEC_ENDPOINT_DATA;
69 
70 	uint32_t AZALIA_F0_CODEC_FUNCTION_PARAMETER_STREAM_FORMATS;
71 	uint32_t AZALIA_F0_CODEC_FUNCTION_PARAMETER_SUPPORTED_SIZE_RATES;
72 	uint32_t AZALIA_F0_CODEC_FUNCTION_PARAMETER_POWER_STATES;
73 
74 	uint32_t DCCG_AUDIO_DTO_SOURCE;
75 	uint32_t DCCG_AUDIO_DTO0_MODULE;
76 	uint32_t DCCG_AUDIO_DTO0_PHASE;
77 	uint32_t DCCG_AUDIO_DTO1_MODULE;
78 	uint32_t DCCG_AUDIO_DTO1_PHASE;
79 
80 	uint32_t AUDIO_RATE_CAPABILITIES;
81 };
82 
83 struct dce_audio_shift {
84 	uint8_t AZALIA_ENDPOINT_REG_INDEX;
85 	uint8_t AZALIA_ENDPOINT_REG_DATA;
86 
87 	uint8_t AUDIO_RATE_CAPABILITIES;
88 	uint8_t CLKSTOP;
89 	uint8_t EPSS;
90 
91 	uint8_t DCCG_AUDIO_DTO0_SOURCE_SEL;
92 	uint8_t DCCG_AUDIO_DTO_SEL;
93 	uint8_t DCCG_AUDIO_DTO0_MODULE;
94 	uint8_t DCCG_AUDIO_DTO0_PHASE;
95 	uint8_t DCCG_AUDIO_DTO1_MODULE;
96 	uint8_t DCCG_AUDIO_DTO1_PHASE;
97 	uint8_t DCCG_AUDIO_DTO2_USE_512FBR_DTO;
98 };
99 
100 struct dce_aduio_mask {
101 	uint32_t AZALIA_ENDPOINT_REG_INDEX;
102 	uint32_t AZALIA_ENDPOINT_REG_DATA;
103 
104 	uint32_t AUDIO_RATE_CAPABILITIES;
105 	uint32_t CLKSTOP;
106 	uint32_t EPSS;
107 
108 	uint32_t DCCG_AUDIO_DTO0_SOURCE_SEL;
109 	uint32_t DCCG_AUDIO_DTO_SEL;
110 	uint32_t DCCG_AUDIO_DTO0_MODULE;
111 	uint32_t DCCG_AUDIO_DTO0_PHASE;
112 	uint32_t DCCG_AUDIO_DTO1_MODULE;
113 	uint32_t DCCG_AUDIO_DTO1_PHASE;
114 	uint32_t DCCG_AUDIO_DTO2_USE_512FBR_DTO;
115 };
116 
117 struct dce_audio {
118 	struct audio base;
119 	const struct dce_audio_registers *regs;
120 	const struct dce_audio_shift *shifts;
121 	const struct dce_aduio_mask *masks;
122 };
123 
124 struct audio *dce_audio_create(
125 		struct dc_context *ctx,
126 		unsigned int inst,
127 		const struct dce_audio_registers *reg,
128 		const struct dce_audio_shift *shifts,
129 		const struct dce_aduio_mask *masks);
130 
131 void dce_aud_destroy(struct audio **audio);
132 
133 void dce_aud_hw_init(struct audio *audio);
134 
135 void dce_aud_az_enable(struct audio *audio);
136 void dce_aud_az_disable(struct audio *audio);
137 
138 void dce_aud_az_configure(struct audio *audio,
139 	enum signal_type signal,
140 	const struct audio_crtc_info *crtc_info,
141 	const struct audio_info *audio_info);
142 
143 void dce_aud_wall_dto_setup(struct audio *audio,
144 	enum signal_type signal,
145 	const struct audio_crtc_info *crtc_info,
146 	const struct audio_pll_info *pll_info);
147 
148 #endif   /*__DAL_AUDIO_DCE_110_H__*/
149