1 /* 2 * Copyright 2012-14 Advanced Micro Devices, Inc. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included in 12 * all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 * 22 * Authors: AMD 23 * 24 */ 25 26 #ifndef DC_STREAM_H_ 27 #define DC_STREAM_H_ 28 29 #include "dc_types.h" 30 #include "grph_object_defs.h" 31 32 /******************************************************************************* 33 * Stream Interfaces 34 ******************************************************************************/ 35 struct timing_sync_info { 36 int group_id; 37 int group_size; 38 bool master; 39 }; 40 41 struct dc_stream_status { 42 int primary_otg_inst; 43 int stream_enc_inst; 44 int plane_count; 45 int audio_inst; 46 struct timing_sync_info timing_sync_info; 47 struct dc_plane_state *plane_states[MAX_SURFACE_NUM]; 48 bool is_abm_supported; 49 }; 50 51 // TODO: References to this needs to be removed.. 52 struct freesync_context { 53 bool dummy; 54 }; 55 56 enum hubp_dmdata_mode { 57 DMDATA_SW_MODE, 58 DMDATA_HW_MODE 59 }; 60 61 struct dc_dmdata_attributes { 62 /* Specifies whether dynamic meta data will be updated by software 63 * or has to be fetched by hardware (DMA mode) 64 */ 65 enum hubp_dmdata_mode dmdata_mode; 66 /* Specifies if current dynamic meta data is to be used only for the current frame */ 67 bool dmdata_repeat; 68 /* Specifies the size of Dynamic Metadata surface in byte. Size of 0 means no Dynamic metadata is fetched */ 69 uint32_t dmdata_size; 70 /* Specifies if a new dynamic meta data should be fetched for an upcoming frame */ 71 bool dmdata_updated; 72 /* If hardware mode is used, the base address where DMDATA surface is located */ 73 PHYSICAL_ADDRESS_LOC address; 74 /* Specifies whether QOS level will be provided by TTU or it will come from DMDATA_QOS_LEVEL */ 75 bool dmdata_qos_mode; 76 /* If qos_mode = 1, this is the QOS value to be used: */ 77 uint32_t dmdata_qos_level; 78 /* Specifies the value in unit of REFCLK cycles to be added to the 79 * current time to produce the Amortized deadline for Dynamic Metadata chunk request 80 */ 81 uint32_t dmdata_dl_delta; 82 /* An unbounded array of uint32s, represents software dmdata to be loaded */ 83 uint32_t *dmdata_sw_data; 84 }; 85 86 struct dc_writeback_info { 87 bool wb_enabled; 88 int dwb_pipe_inst; 89 struct dc_dwb_params dwb_params; 90 struct mcif_buf_params mcif_buf_params; 91 struct mcif_warmup_params mcif_warmup_params; 92 /* the plane that is the input to TOP_MUX for MPCC that is the DWB source */ 93 struct dc_plane_state *writeback_source_plane; 94 /* source MPCC instance. for use by internally by dc */ 95 int mpcc_inst; 96 }; 97 98 struct dc_writeback_update { 99 unsigned int num_wb_info; 100 struct dc_writeback_info writeback_info[MAX_DWB_PIPES]; 101 }; 102 103 enum vertical_interrupt_ref_point { 104 START_V_UPDATE = 0, 105 START_V_SYNC, 106 INVALID_POINT 107 108 //For now, only v_update interrupt is used. 109 //START_V_BLANK, 110 //START_V_ACTIVE 111 }; 112 113 struct periodic_interrupt_config { 114 enum vertical_interrupt_ref_point ref_point; 115 int lines_offset; 116 }; 117 118 struct dc_mst_stream_bw_update { 119 bool is_increase; // is bandwidth reduced or increased 120 uint32_t mst_stream_bw; // new mst bandwidth in kbps 121 }; 122 123 union stream_update_flags { 124 struct { 125 uint32_t scaling:1; 126 uint32_t out_tf:1; 127 uint32_t out_csc:1; 128 uint32_t abm_level:1; 129 uint32_t dpms_off:1; 130 uint32_t gamut_remap:1; 131 uint32_t wb_update:1; 132 uint32_t dsc_changed : 1; 133 uint32_t mst_bw : 1; 134 uint32_t crtc_timing_adjust : 1; 135 } bits; 136 137 uint32_t raw; 138 }; 139 140 struct test_pattern { 141 enum dp_test_pattern type; 142 enum dp_test_pattern_color_space color_space; 143 struct link_training_settings const *p_link_settings; 144 unsigned char const *p_custom_pattern; 145 unsigned int cust_pattern_size; 146 }; 147 148 struct dc_stream_state { 149 // sink is deprecated, new code should not reference 150 // this pointer 151 struct dc_sink *sink; 152 153 struct dc_link *link; 154 /* For dynamic link encoder assignment, update the link encoder assigned to 155 * a stream via the volatile dc_state rather than the static dc_link. 156 */ 157 struct link_encoder *link_enc; 158 struct dc_panel_patch sink_patches; 159 union display_content_support content_support; 160 struct dc_crtc_timing timing; 161 struct dc_crtc_timing_adjust adjust; 162 struct dc_info_packet vrr_infopacket; 163 struct dc_info_packet vsc_infopacket; 164 struct dc_info_packet vsp_infopacket; 165 uint8_t dsc_packed_pps[128]; 166 struct rect src; /* composition area */ 167 struct rect dst; /* stream addressable area */ 168 169 // TODO: References to this needs to be removed.. 170 struct freesync_context freesync_ctx; 171 172 struct audio_info audio_info; 173 174 struct dc_info_packet hdr_static_metadata; 175 PHYSICAL_ADDRESS_LOC dmdata_address; 176 bool use_dynamic_meta; 177 178 struct dc_transfer_func *out_transfer_func; 179 struct colorspace_transform gamut_remap_matrix; 180 struct dc_csc_transform csc_color_matrix; 181 182 enum dc_color_space output_color_space; 183 enum dc_dither_option dither_option; 184 185 enum view_3d_format view_format; 186 187 bool use_vsc_sdp_for_colorimetry; 188 bool ignore_msa_timing_param; 189 190 bool freesync_on_desktop; 191 192 bool converter_disable_audio; 193 uint8_t qs_bit; 194 uint8_t qy_bit; 195 196 /* TODO: custom INFO packets */ 197 /* TODO: ABM info (DMCU) */ 198 /* TODO: CEA VIC */ 199 200 /* DMCU info */ 201 unsigned int abm_level; 202 203 struct periodic_interrupt_config periodic_interrupt0; 204 struct periodic_interrupt_config periodic_interrupt1; 205 206 /* from core_stream struct */ 207 struct dc_context *ctx; 208 209 /* used by DCP and FMT */ 210 struct bit_depth_reduction_params bit_depth_params; 211 struct clamping_and_pixel_encoding_params clamping; 212 213 int phy_pix_clk; 214 enum signal_type signal; 215 bool dpms_off; 216 217 void *dm_stream_context; 218 219 struct dc_cursor_attributes cursor_attributes; 220 struct dc_cursor_position cursor_position; 221 uint32_t sdr_white_level; // for boosting (SDR) cursor in HDR mode 222 223 /* from stream struct */ 224 struct kref refcount; 225 226 struct crtc_trigger_info triggered_crtc_reset; 227 228 /* writeback */ 229 unsigned int num_wb_info; 230 struct dc_writeback_info writeback_info[MAX_DWB_PIPES]; 231 const struct dc_transfer_func *func_shaper; 232 const struct dc_3dlut *lut3d_func; 233 /* Computed state bits */ 234 bool mode_changed : 1; 235 236 /* Output from DC when stream state is committed or altered 237 * DC may only access these values during: 238 * dc_commit_state, dc_commit_state_no_check, dc_commit_streams 239 * values may not change outside of those calls 240 */ 241 struct { 242 // For interrupt management, some hardware instance 243 // offsets need to be exposed to DM 244 uint8_t otg_offset; 245 } out; 246 247 bool apply_edp_fast_boot_optimization; 248 bool apply_seamless_boot_optimization; 249 uint32_t apply_boot_odm_mode; 250 251 uint32_t stream_id; 252 253 struct test_pattern test_pattern; 254 union stream_update_flags update_flags; 255 256 bool has_non_synchronizable_pclk; 257 bool vblank_synchronized; 258 }; 259 260 #define ABM_LEVEL_IMMEDIATE_DISABLE 255 261 262 struct dc_stream_update { 263 struct dc_stream_state *stream; 264 265 struct rect src; 266 struct rect dst; 267 struct dc_transfer_func *out_transfer_func; 268 struct dc_info_packet *hdr_static_metadata; 269 unsigned int *abm_level; 270 271 struct periodic_interrupt_config *periodic_interrupt0; 272 struct periodic_interrupt_config *periodic_interrupt1; 273 274 struct dc_info_packet *vrr_infopacket; 275 struct dc_info_packet *vsc_infopacket; 276 struct dc_info_packet *vsp_infopacket; 277 278 bool *dpms_off; 279 bool integer_scaling_update; 280 281 struct colorspace_transform *gamut_remap; 282 enum dc_color_space *output_color_space; 283 enum dc_dither_option *dither_option; 284 285 struct dc_csc_transform *output_csc_transform; 286 287 struct dc_writeback_update *wb_update; 288 struct dc_dsc_config *dsc_config; 289 struct dc_mst_stream_bw_update *mst_bw_update; 290 struct dc_transfer_func *func_shaper; 291 struct dc_3dlut *lut3d_func; 292 293 struct test_pattern *pending_test_pattern; 294 struct dc_crtc_timing_adjust *crtc_timing_adjust; 295 }; 296 297 bool dc_is_stream_unchanged( 298 struct dc_stream_state *old_stream, struct dc_stream_state *stream); 299 bool dc_is_stream_scaling_unchanged( 300 struct dc_stream_state *old_stream, struct dc_stream_state *stream); 301 302 /* 303 * Set up surface attributes and associate to a stream 304 * The surfaces parameter is an absolute set of all surface active for the stream. 305 * If no surfaces are provided, the stream will be blanked; no memory read. 306 * Any flip related attribute changes must be done through this interface. 307 * 308 * After this call: 309 * Surfaces attributes are programmed and configured to be composed into stream. 310 * This does not trigger a flip. No surface address is programmed. 311 */ 312 313 void dc_commit_updates_for_stream(struct dc *dc, 314 struct dc_surface_update *srf_updates, 315 int surface_count, 316 struct dc_stream_state *stream, 317 struct dc_stream_update *stream_update, 318 struct dc_state *state); 319 /* 320 * Log the current stream state. 321 */ 322 void dc_stream_log(const struct dc *dc, const struct dc_stream_state *stream); 323 324 uint8_t dc_get_current_stream_count(struct dc *dc); 325 struct dc_stream_state *dc_get_stream_at_index(struct dc *dc, uint8_t i); 326 struct dc_stream_state *dc_stream_find_from_link(const struct dc_link *link); 327 328 /* 329 * Return the current frame counter. 330 */ 331 uint32_t dc_stream_get_vblank_counter(const struct dc_stream_state *stream); 332 333 /* 334 * Send dp sdp message. 335 */ 336 bool dc_stream_send_dp_sdp(const struct dc_stream_state *stream, 337 const uint8_t *custom_sdp_message, 338 unsigned int sdp_message_size); 339 340 /* TODO: Return parsed values rather than direct register read 341 * This has a dependency on the caller (amdgpu_display_get_crtc_scanoutpos) 342 * being refactored properly to be dce-specific 343 */ 344 bool dc_stream_get_scanoutpos(const struct dc_stream_state *stream, 345 uint32_t *v_blank_start, 346 uint32_t *v_blank_end, 347 uint32_t *h_position, 348 uint32_t *v_position); 349 350 enum dc_status dc_add_stream_to_ctx( 351 struct dc *dc, 352 struct dc_state *new_ctx, 353 struct dc_stream_state *stream); 354 355 enum dc_status dc_remove_stream_from_ctx( 356 struct dc *dc, 357 struct dc_state *new_ctx, 358 struct dc_stream_state *stream); 359 360 361 bool dc_add_plane_to_context( 362 const struct dc *dc, 363 struct dc_stream_state *stream, 364 struct dc_plane_state *plane_state, 365 struct dc_state *context); 366 367 bool dc_remove_plane_from_context( 368 const struct dc *dc, 369 struct dc_stream_state *stream, 370 struct dc_plane_state *plane_state, 371 struct dc_state *context); 372 373 bool dc_rem_all_planes_for_stream( 374 const struct dc *dc, 375 struct dc_stream_state *stream, 376 struct dc_state *context); 377 378 bool dc_add_all_planes_for_stream( 379 const struct dc *dc, 380 struct dc_stream_state *stream, 381 struct dc_plane_state * const *plane_states, 382 int plane_count, 383 struct dc_state *context); 384 385 bool dc_stream_add_writeback(struct dc *dc, 386 struct dc_stream_state *stream, 387 struct dc_writeback_info *wb_info); 388 389 bool dc_stream_remove_writeback(struct dc *dc, 390 struct dc_stream_state *stream, 391 uint32_t dwb_pipe_inst); 392 393 enum dc_status dc_stream_add_dsc_to_resource(struct dc *dc, 394 struct dc_state *state, 395 struct dc_stream_state *stream); 396 397 bool dc_stream_warmup_writeback(struct dc *dc, 398 int num_dwb, 399 struct dc_writeback_info *wb_info); 400 401 bool dc_stream_dmdata_status_done(struct dc *dc, struct dc_stream_state *stream); 402 403 bool dc_stream_set_dynamic_metadata(struct dc *dc, 404 struct dc_stream_state *stream, 405 struct dc_dmdata_attributes *dmdata_attr); 406 407 enum dc_status dc_validate_stream(struct dc *dc, struct dc_stream_state *stream); 408 409 /* 410 * Set up streams and links associated to drive sinks 411 * The streams parameter is an absolute set of all active streams. 412 * 413 * After this call: 414 * Phy, Encoder, Timing Generator are programmed and enabled. 415 * New streams are enabled with blank stream; no memory read. 416 */ 417 /* 418 * Enable stereo when commit_streams is not required, 419 * for example, frame alternate. 420 */ 421 void dc_enable_stereo( 422 struct dc *dc, 423 struct dc_state *context, 424 struct dc_stream_state *streams[], 425 uint8_t stream_count); 426 427 /* Triggers multi-stream synchronization. */ 428 void dc_trigger_sync(struct dc *dc, struct dc_state *context); 429 430 enum surface_update_type dc_check_update_surfaces_for_stream( 431 struct dc *dc, 432 struct dc_surface_update *updates, 433 int surface_count, 434 struct dc_stream_update *stream_update, 435 const struct dc_stream_status *stream_status); 436 437 /** 438 * Create a new default stream for the requested sink 439 */ 440 struct dc_stream_state *dc_create_stream_for_sink(struct dc_sink *dc_sink); 441 442 struct dc_stream_state *dc_copy_stream(const struct dc_stream_state *stream); 443 444 void update_stream_signal(struct dc_stream_state *stream, struct dc_sink *sink); 445 446 void dc_stream_retain(struct dc_stream_state *dc_stream); 447 void dc_stream_release(struct dc_stream_state *dc_stream); 448 449 struct dc_stream_status *dc_stream_get_status_from_state( 450 struct dc_state *state, 451 struct dc_stream_state *stream); 452 struct dc_stream_status *dc_stream_get_status( 453 struct dc_stream_state *dc_stream); 454 455 #ifndef TRIM_FSFT 456 bool dc_optimize_timing_for_fsft( 457 struct dc_stream_state *pStream, 458 unsigned int max_input_rate_in_khz); 459 #endif 460 461 /******************************************************************************* 462 * Cursor interfaces - To manages the cursor within a stream 463 ******************************************************************************/ 464 /* TODO: Deprecated once we switch to dc_set_cursor_position */ 465 bool dc_stream_set_cursor_attributes( 466 struct dc_stream_state *stream, 467 const struct dc_cursor_attributes *attributes); 468 469 bool dc_stream_set_cursor_position( 470 struct dc_stream_state *stream, 471 const struct dc_cursor_position *position); 472 473 474 bool dc_stream_adjust_vmin_vmax(struct dc *dc, 475 struct dc_stream_state *stream, 476 struct dc_crtc_timing_adjust *adjust); 477 478 bool dc_stream_get_last_used_drr_vtotal(struct dc *dc, 479 struct dc_stream_state *stream, 480 uint32_t *refresh_rate); 481 482 bool dc_stream_get_crtc_position(struct dc *dc, 483 struct dc_stream_state **stream, 484 int num_streams, 485 unsigned int *v_pos, 486 unsigned int *nom_v_pos); 487 488 #if defined(CONFIG_DRM_AMD_SECURE_DISPLAY) 489 bool dc_stream_forward_dmcu_crc_window(struct dc *dc, struct dc_stream_state *stream, 490 struct crc_params *crc_window); 491 bool dc_stream_stop_dmcu_crc_win_update(struct dc *dc, 492 struct dc_stream_state *stream); 493 #endif 494 495 bool dc_stream_configure_crc(struct dc *dc, 496 struct dc_stream_state *stream, 497 struct crc_params *crc_window, 498 bool enable, 499 bool continuous); 500 501 bool dc_stream_get_crc(struct dc *dc, 502 struct dc_stream_state *stream, 503 uint32_t *r_cr, 504 uint32_t *g_y, 505 uint32_t *b_cb); 506 507 void dc_stream_set_static_screen_params(struct dc *dc, 508 struct dc_stream_state **stream, 509 int num_streams, 510 const struct dc_static_screen_params *params); 511 512 void dc_stream_set_dyn_expansion(struct dc *dc, struct dc_stream_state *stream, 513 enum dc_dynamic_expansion option); 514 515 void dc_stream_set_dither_option(struct dc_stream_state *stream, 516 enum dc_dither_option option); 517 518 bool dc_stream_set_gamut_remap(struct dc *dc, 519 const struct dc_stream_state *stream); 520 521 bool dc_stream_program_csc_matrix(struct dc *dc, 522 struct dc_stream_state *stream); 523 524 bool dc_stream_get_crtc_position(struct dc *dc, 525 struct dc_stream_state **stream, 526 int num_streams, 527 unsigned int *v_pos, 528 unsigned int *nom_v_pos); 529 530 struct pipe_ctx *dc_stream_get_pipe_ctx(struct dc_stream_state *stream); 531 532 #endif /* DC_STREAM_H_ */ 533