1 /* 2 * Copyright 2012-14 Advanced Micro Devices, Inc. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included in 12 * all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 * 22 * Authors: AMD 23 * 24 */ 25 26 #ifndef DC_STREAM_H_ 27 #define DC_STREAM_H_ 28 29 #include "dc_types.h" 30 #include "grph_object_defs.h" 31 32 /******************************************************************************* 33 * Stream Interfaces 34 ******************************************************************************/ 35 struct timing_sync_info { 36 int group_id; 37 int group_size; 38 bool master; 39 }; 40 41 struct dc_stream_status { 42 int primary_otg_inst; 43 int stream_enc_inst; 44 45 /** 46 * @plane_count: Total of planes attached to a single stream 47 */ 48 int plane_count; 49 int audio_inst; 50 struct timing_sync_info timing_sync_info; 51 struct dc_plane_state *plane_states[MAX_SURFACE_NUM]; 52 bool is_abm_supported; 53 }; 54 55 enum hubp_dmdata_mode { 56 DMDATA_SW_MODE, 57 DMDATA_HW_MODE 58 }; 59 60 struct dc_dmdata_attributes { 61 /* Specifies whether dynamic meta data will be updated by software 62 * or has to be fetched by hardware (DMA mode) 63 */ 64 enum hubp_dmdata_mode dmdata_mode; 65 /* Specifies if current dynamic meta data is to be used only for the current frame */ 66 bool dmdata_repeat; 67 /* Specifies the size of Dynamic Metadata surface in byte. Size of 0 means no Dynamic metadata is fetched */ 68 uint32_t dmdata_size; 69 /* Specifies if a new dynamic meta data should be fetched for an upcoming frame */ 70 bool dmdata_updated; 71 /* If hardware mode is used, the base address where DMDATA surface is located */ 72 PHYSICAL_ADDRESS_LOC address; 73 /* Specifies whether QOS level will be provided by TTU or it will come from DMDATA_QOS_LEVEL */ 74 bool dmdata_qos_mode; 75 /* If qos_mode = 1, this is the QOS value to be used: */ 76 uint32_t dmdata_qos_level; 77 /* Specifies the value in unit of REFCLK cycles to be added to the 78 * current time to produce the Amortized deadline for Dynamic Metadata chunk request 79 */ 80 uint32_t dmdata_dl_delta; 81 /* An unbounded array of uint32s, represents software dmdata to be loaded */ 82 uint32_t *dmdata_sw_data; 83 }; 84 85 struct dc_writeback_info { 86 bool wb_enabled; 87 int dwb_pipe_inst; 88 struct dc_dwb_params dwb_params; 89 struct mcif_buf_params mcif_buf_params; 90 struct mcif_warmup_params mcif_warmup_params; 91 /* the plane that is the input to TOP_MUX for MPCC that is the DWB source */ 92 struct dc_plane_state *writeback_source_plane; 93 /* source MPCC instance. for use by internally by dc */ 94 int mpcc_inst; 95 }; 96 97 struct dc_writeback_update { 98 unsigned int num_wb_info; 99 struct dc_writeback_info writeback_info[MAX_DWB_PIPES]; 100 }; 101 102 enum vertical_interrupt_ref_point { 103 START_V_UPDATE = 0, 104 START_V_SYNC, 105 INVALID_POINT 106 107 //For now, only v_update interrupt is used. 108 //START_V_BLANK, 109 //START_V_ACTIVE 110 }; 111 112 struct periodic_interrupt_config { 113 enum vertical_interrupt_ref_point ref_point; 114 int lines_offset; 115 }; 116 117 struct dc_mst_stream_bw_update { 118 bool is_increase; // is bandwidth reduced or increased 119 uint32_t mst_stream_bw; // new mst bandwidth in kbps 120 }; 121 122 union stream_update_flags { 123 struct { 124 uint32_t scaling:1; 125 uint32_t out_tf:1; 126 uint32_t out_csc:1; 127 uint32_t abm_level:1; 128 uint32_t dpms_off:1; 129 uint32_t gamut_remap:1; 130 uint32_t wb_update:1; 131 uint32_t dsc_changed : 1; 132 uint32_t mst_bw : 1; 133 uint32_t crtc_timing_adjust : 1; 134 } bits; 135 136 uint32_t raw; 137 }; 138 139 struct test_pattern { 140 enum dp_test_pattern type; 141 enum dp_test_pattern_color_space color_space; 142 struct link_training_settings const *p_link_settings; 143 unsigned char const *p_custom_pattern; 144 unsigned int cust_pattern_size; 145 }; 146 147 #define SUBVP_DRR_MARGIN_US 600 // 600us for DRR margin (SubVP + DRR) 148 149 enum mall_stream_type { 150 SUBVP_NONE, // subvp not in use 151 SUBVP_MAIN, // subvp in use, this stream is main stream 152 SUBVP_PHANTOM, // subvp in use, this stream is a phantom stream 153 }; 154 155 struct mall_stream_config { 156 /* MALL stream config to indicate if the stream is phantom or not. 157 * We will use a phantom stream to indicate that the pipe is phantom. 158 */ 159 enum mall_stream_type type; 160 struct dc_stream_state *paired_stream; // master / slave stream 161 }; 162 163 struct dc_stream_state { 164 // sink is deprecated, new code should not reference 165 // this pointer 166 struct dc_sink *sink; 167 168 struct dc_link *link; 169 /* For dynamic link encoder assignment, update the link encoder assigned to 170 * a stream via the volatile dc_state rather than the static dc_link. 171 */ 172 struct link_encoder *link_enc; 173 struct dc_panel_patch sink_patches; 174 union display_content_support content_support; 175 struct dc_crtc_timing timing; 176 struct dc_crtc_timing_adjust adjust; 177 struct dc_info_packet vrr_infopacket; 178 struct dc_info_packet vsc_infopacket; 179 struct dc_info_packet vsp_infopacket; 180 struct dc_info_packet hfvsif_infopacket; 181 struct dc_info_packet vtem_infopacket; 182 uint8_t dsc_packed_pps[128]; 183 struct rect src; /* composition area */ 184 struct rect dst; /* stream addressable area */ 185 186 struct audio_info audio_info; 187 188 struct dc_info_packet hdr_static_metadata; 189 PHYSICAL_ADDRESS_LOC dmdata_address; 190 bool use_dynamic_meta; 191 192 struct dc_transfer_func *out_transfer_func; 193 struct colorspace_transform gamut_remap_matrix; 194 struct dc_csc_transform csc_color_matrix; 195 196 enum dc_color_space output_color_space; 197 enum dc_dither_option dither_option; 198 199 enum view_3d_format view_format; 200 201 bool use_vsc_sdp_for_colorimetry; 202 bool ignore_msa_timing_param; 203 204 /** 205 * @allow_freesync: 206 * 207 * It say if Freesync is enabled or not. 208 */ 209 bool allow_freesync; 210 211 /** 212 * @vrr_active_variable: 213 * 214 * It describes if VRR is in use. 215 */ 216 bool vrr_active_variable; 217 bool freesync_on_desktop; 218 219 bool converter_disable_audio; 220 uint8_t qs_bit; 221 uint8_t qy_bit; 222 223 /* TODO: custom INFO packets */ 224 /* TODO: ABM info (DMCU) */ 225 /* TODO: CEA VIC */ 226 227 /* DMCU info */ 228 unsigned int abm_level; 229 230 struct periodic_interrupt_config periodic_interrupt; 231 232 /* from core_stream struct */ 233 struct dc_context *ctx; 234 235 /* used by DCP and FMT */ 236 struct bit_depth_reduction_params bit_depth_params; 237 struct clamping_and_pixel_encoding_params clamping; 238 239 int phy_pix_clk; 240 enum signal_type signal; 241 bool dpms_off; 242 243 void *dm_stream_context; 244 245 struct dc_cursor_attributes cursor_attributes; 246 struct dc_cursor_position cursor_position; 247 uint32_t sdr_white_level; // for boosting (SDR) cursor in HDR mode 248 249 /* from stream struct */ 250 struct kref refcount; 251 252 struct crtc_trigger_info triggered_crtc_reset; 253 254 /* writeback */ 255 unsigned int num_wb_info; 256 struct dc_writeback_info writeback_info[MAX_DWB_PIPES]; 257 const struct dc_transfer_func *func_shaper; 258 const struct dc_3dlut *lut3d_func; 259 /* Computed state bits */ 260 bool mode_changed : 1; 261 262 /* Output from DC when stream state is committed or altered 263 * DC may only access these values during: 264 * dc_commit_state, dc_commit_state_no_check, dc_commit_streams 265 * values may not change outside of those calls 266 */ 267 struct { 268 // For interrupt management, some hardware instance 269 // offsets need to be exposed to DM 270 uint8_t otg_offset; 271 } out; 272 273 bool apply_edp_fast_boot_optimization; 274 bool apply_seamless_boot_optimization; 275 uint32_t apply_boot_odm_mode; 276 277 uint32_t stream_id; 278 279 struct test_pattern test_pattern; 280 union stream_update_flags update_flags; 281 282 bool has_non_synchronizable_pclk; 283 bool vblank_synchronized; 284 struct mall_stream_config mall_stream_config; 285 }; 286 287 #define ABM_LEVEL_IMMEDIATE_DISABLE 255 288 289 struct dc_stream_update { 290 struct dc_stream_state *stream; 291 292 struct rect src; 293 struct rect dst; 294 struct dc_transfer_func *out_transfer_func; 295 struct dc_info_packet *hdr_static_metadata; 296 unsigned int *abm_level; 297 298 struct periodic_interrupt_config *periodic_interrupt; 299 300 struct dc_info_packet *vrr_infopacket; 301 struct dc_info_packet *vsc_infopacket; 302 struct dc_info_packet *vsp_infopacket; 303 struct dc_info_packet *hfvsif_infopacket; 304 struct dc_info_packet *vtem_infopacket; 305 bool *dpms_off; 306 bool integer_scaling_update; 307 bool *allow_freesync; 308 bool *vrr_active_variable; 309 310 struct colorspace_transform *gamut_remap; 311 enum dc_color_space *output_color_space; 312 enum dc_dither_option *dither_option; 313 314 struct dc_csc_transform *output_csc_transform; 315 316 struct dc_writeback_update *wb_update; 317 struct dc_dsc_config *dsc_config; 318 struct dc_mst_stream_bw_update *mst_bw_update; 319 struct dc_transfer_func *func_shaper; 320 struct dc_3dlut *lut3d_func; 321 322 struct test_pattern *pending_test_pattern; 323 struct dc_crtc_timing_adjust *crtc_timing_adjust; 324 }; 325 326 bool dc_is_stream_unchanged( 327 struct dc_stream_state *old_stream, struct dc_stream_state *stream); 328 bool dc_is_stream_scaling_unchanged( 329 struct dc_stream_state *old_stream, struct dc_stream_state *stream); 330 331 /* 332 * Setup stream attributes if no stream updates are provided 333 * there will be no impact on the stream parameters 334 * 335 * Set up surface attributes and associate to a stream 336 * The surfaces parameter is an absolute set of all surface active for the stream. 337 * If no surfaces are provided, the stream will be blanked; no memory read. 338 * Any flip related attribute changes must be done through this interface. 339 * 340 * After this call: 341 * Surfaces attributes are programmed and configured to be composed into stream. 342 * This does not trigger a flip. No surface address is programmed. 343 * 344 */ 345 bool dc_update_planes_and_stream(struct dc *dc, 346 struct dc_surface_update *surface_updates, int surface_count, 347 struct dc_stream_state *dc_stream, 348 struct dc_stream_update *stream_update); 349 350 /* 351 * Set up surface attributes and associate to a stream 352 * The surfaces parameter is an absolute set of all surface active for the stream. 353 * If no surfaces are provided, the stream will be blanked; no memory read. 354 * Any flip related attribute changes must be done through this interface. 355 * 356 * After this call: 357 * Surfaces attributes are programmed and configured to be composed into stream. 358 * This does not trigger a flip. No surface address is programmed. 359 */ 360 void dc_commit_updates_for_stream(struct dc *dc, 361 struct dc_surface_update *srf_updates, 362 int surface_count, 363 struct dc_stream_state *stream, 364 struct dc_stream_update *stream_update, 365 struct dc_state *state); 366 /* 367 * Log the current stream state. 368 */ 369 void dc_stream_log(const struct dc *dc, const struct dc_stream_state *stream); 370 371 uint8_t dc_get_current_stream_count(struct dc *dc); 372 struct dc_stream_state *dc_get_stream_at_index(struct dc *dc, uint8_t i); 373 374 /* 375 * Return the current frame counter. 376 */ 377 uint32_t dc_stream_get_vblank_counter(const struct dc_stream_state *stream); 378 379 /* 380 * Send dp sdp message. 381 */ 382 bool dc_stream_send_dp_sdp(const struct dc_stream_state *stream, 383 const uint8_t *custom_sdp_message, 384 unsigned int sdp_message_size); 385 386 /* TODO: Return parsed values rather than direct register read 387 * This has a dependency on the caller (amdgpu_display_get_crtc_scanoutpos) 388 * being refactored properly to be dce-specific 389 */ 390 bool dc_stream_get_scanoutpos(const struct dc_stream_state *stream, 391 uint32_t *v_blank_start, 392 uint32_t *v_blank_end, 393 uint32_t *h_position, 394 uint32_t *v_position); 395 396 enum dc_status dc_add_stream_to_ctx( 397 struct dc *dc, 398 struct dc_state *new_ctx, 399 struct dc_stream_state *stream); 400 401 enum dc_status dc_remove_stream_from_ctx( 402 struct dc *dc, 403 struct dc_state *new_ctx, 404 struct dc_stream_state *stream); 405 406 407 bool dc_add_plane_to_context( 408 const struct dc *dc, 409 struct dc_stream_state *stream, 410 struct dc_plane_state *plane_state, 411 struct dc_state *context); 412 413 bool dc_remove_plane_from_context( 414 const struct dc *dc, 415 struct dc_stream_state *stream, 416 struct dc_plane_state *plane_state, 417 struct dc_state *context); 418 419 bool dc_rem_all_planes_for_stream( 420 const struct dc *dc, 421 struct dc_stream_state *stream, 422 struct dc_state *context); 423 424 bool dc_add_all_planes_for_stream( 425 const struct dc *dc, 426 struct dc_stream_state *stream, 427 struct dc_plane_state * const *plane_states, 428 int plane_count, 429 struct dc_state *context); 430 431 bool dc_stream_add_writeback(struct dc *dc, 432 struct dc_stream_state *stream, 433 struct dc_writeback_info *wb_info); 434 435 bool dc_stream_remove_writeback(struct dc *dc, 436 struct dc_stream_state *stream, 437 uint32_t dwb_pipe_inst); 438 439 enum dc_status dc_stream_add_dsc_to_resource(struct dc *dc, 440 struct dc_state *state, 441 struct dc_stream_state *stream); 442 443 bool dc_stream_warmup_writeback(struct dc *dc, 444 int num_dwb, 445 struct dc_writeback_info *wb_info); 446 447 bool dc_stream_dmdata_status_done(struct dc *dc, struct dc_stream_state *stream); 448 449 bool dc_stream_set_dynamic_metadata(struct dc *dc, 450 struct dc_stream_state *stream, 451 struct dc_dmdata_attributes *dmdata_attr); 452 453 enum dc_status dc_validate_stream(struct dc *dc, struct dc_stream_state *stream); 454 455 /* 456 * Set up streams and links associated to drive sinks 457 * The streams parameter is an absolute set of all active streams. 458 * 459 * After this call: 460 * Phy, Encoder, Timing Generator are programmed and enabled. 461 * New streams are enabled with blank stream; no memory read. 462 */ 463 /* 464 * Enable stereo when commit_streams is not required, 465 * for example, frame alternate. 466 */ 467 void dc_enable_stereo( 468 struct dc *dc, 469 struct dc_state *context, 470 struct dc_stream_state *streams[], 471 uint8_t stream_count); 472 473 /* Triggers multi-stream synchronization. */ 474 void dc_trigger_sync(struct dc *dc, struct dc_state *context); 475 476 enum surface_update_type dc_check_update_surfaces_for_stream( 477 struct dc *dc, 478 struct dc_surface_update *updates, 479 int surface_count, 480 struct dc_stream_update *stream_update, 481 const struct dc_stream_status *stream_status); 482 483 /** 484 * Create a new default stream for the requested sink 485 */ 486 struct dc_stream_state *dc_create_stream_for_sink(struct dc_sink *dc_sink); 487 488 struct dc_stream_state *dc_copy_stream(const struct dc_stream_state *stream); 489 490 void update_stream_signal(struct dc_stream_state *stream, struct dc_sink *sink); 491 492 void dc_stream_retain(struct dc_stream_state *dc_stream); 493 void dc_stream_release(struct dc_stream_state *dc_stream); 494 495 struct dc_stream_status *dc_stream_get_status_from_state( 496 struct dc_state *state, 497 struct dc_stream_state *stream); 498 struct dc_stream_status *dc_stream_get_status( 499 struct dc_stream_state *dc_stream); 500 501 #ifndef TRIM_FSFT 502 bool dc_optimize_timing_for_fsft( 503 struct dc_stream_state *pStream, 504 unsigned int max_input_rate_in_khz); 505 #endif 506 507 /******************************************************************************* 508 * Cursor interfaces - To manages the cursor within a stream 509 ******************************************************************************/ 510 /* TODO: Deprecated once we switch to dc_set_cursor_position */ 511 bool dc_stream_set_cursor_attributes( 512 struct dc_stream_state *stream, 513 const struct dc_cursor_attributes *attributes); 514 515 bool dc_stream_set_cursor_position( 516 struct dc_stream_state *stream, 517 const struct dc_cursor_position *position); 518 519 520 bool dc_stream_adjust_vmin_vmax(struct dc *dc, 521 struct dc_stream_state *stream, 522 struct dc_crtc_timing_adjust *adjust); 523 524 bool dc_stream_get_last_used_drr_vtotal(struct dc *dc, 525 struct dc_stream_state *stream, 526 uint32_t *refresh_rate); 527 528 bool dc_stream_get_crtc_position(struct dc *dc, 529 struct dc_stream_state **stream, 530 int num_streams, 531 unsigned int *v_pos, 532 unsigned int *nom_v_pos); 533 534 #if defined(CONFIG_DRM_AMD_SECURE_DISPLAY) 535 bool dc_stream_forward_crc_window(struct dc *dc, 536 struct rect *rect, 537 struct dc_stream_state *stream, 538 bool is_stop); 539 #endif 540 541 bool dc_stream_configure_crc(struct dc *dc, 542 struct dc_stream_state *stream, 543 struct crc_params *crc_window, 544 bool enable, 545 bool continuous); 546 547 bool dc_stream_get_crc(struct dc *dc, 548 struct dc_stream_state *stream, 549 uint32_t *r_cr, 550 uint32_t *g_y, 551 uint32_t *b_cb); 552 553 void dc_stream_set_static_screen_params(struct dc *dc, 554 struct dc_stream_state **stream, 555 int num_streams, 556 const struct dc_static_screen_params *params); 557 558 void dc_stream_set_dyn_expansion(struct dc *dc, struct dc_stream_state *stream, 559 enum dc_dynamic_expansion option); 560 561 void dc_stream_set_dither_option(struct dc_stream_state *stream, 562 enum dc_dither_option option); 563 564 bool dc_stream_set_gamut_remap(struct dc *dc, 565 const struct dc_stream_state *stream); 566 567 bool dc_stream_program_csc_matrix(struct dc *dc, 568 struct dc_stream_state *stream); 569 570 bool dc_stream_get_crtc_position(struct dc *dc, 571 struct dc_stream_state **stream, 572 int num_streams, 573 unsigned int *v_pos, 574 unsigned int *nom_v_pos); 575 576 struct pipe_ctx *dc_stream_get_pipe_ctx(struct dc_stream_state *stream); 577 578 void dc_dmub_update_dirty_rect(struct dc *dc, 579 int surface_count, 580 struct dc_stream_state *stream, 581 struct dc_surface_update *srf_updates, 582 struct dc_state *context); 583 #endif /* DC_STREAM_H_ */ 584