1 /* 2 * Copyright 2012-14 Advanced Micro Devices, Inc. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included in 12 * all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 * 22 * Authors: AMD 23 * 24 */ 25 26 #ifndef DC_STREAM_H_ 27 #define DC_STREAM_H_ 28 29 #include "dc_types.h" 30 #include "grph_object_defs.h" 31 32 /******************************************************************************* 33 * Stream Interfaces 34 ******************************************************************************/ 35 struct timing_sync_info { 36 int group_id; 37 int group_size; 38 bool master; 39 }; 40 41 struct dc_stream_status { 42 int primary_otg_inst; 43 int stream_enc_inst; 44 int plane_count; 45 int audio_inst; 46 struct timing_sync_info timing_sync_info; 47 struct dc_plane_state *plane_states[MAX_SURFACE_NUM]; 48 bool is_abm_supported; 49 }; 50 51 // TODO: References to this needs to be removed.. 52 struct freesync_context { 53 bool dummy; 54 }; 55 56 enum hubp_dmdata_mode { 57 DMDATA_SW_MODE, 58 DMDATA_HW_MODE 59 }; 60 61 struct dc_dmdata_attributes { 62 /* Specifies whether dynamic meta data will be updated by software 63 * or has to be fetched by hardware (DMA mode) 64 */ 65 enum hubp_dmdata_mode dmdata_mode; 66 /* Specifies if current dynamic meta data is to be used only for the current frame */ 67 bool dmdata_repeat; 68 /* Specifies the size of Dynamic Metadata surface in byte. Size of 0 means no Dynamic metadata is fetched */ 69 uint32_t dmdata_size; 70 /* Specifies if a new dynamic meta data should be fetched for an upcoming frame */ 71 bool dmdata_updated; 72 /* If hardware mode is used, the base address where DMDATA surface is located */ 73 PHYSICAL_ADDRESS_LOC address; 74 /* Specifies whether QOS level will be provided by TTU or it will come from DMDATA_QOS_LEVEL */ 75 bool dmdata_qos_mode; 76 /* If qos_mode = 1, this is the QOS value to be used: */ 77 uint32_t dmdata_qos_level; 78 /* Specifies the value in unit of REFCLK cycles to be added to the 79 * current time to produce the Amortized deadline for Dynamic Metadata chunk request 80 */ 81 uint32_t dmdata_dl_delta; 82 /* An unbounded array of uint32s, represents software dmdata to be loaded */ 83 uint32_t *dmdata_sw_data; 84 }; 85 86 struct dc_writeback_info { 87 bool wb_enabled; 88 int dwb_pipe_inst; 89 struct dc_dwb_params dwb_params; 90 struct mcif_buf_params mcif_buf_params; 91 struct mcif_warmup_params mcif_warmup_params; 92 /* the plane that is the input to TOP_MUX for MPCC that is the DWB source */ 93 struct dc_plane_state *writeback_source_plane; 94 /* source MPCC instance. for use by internally by dc */ 95 int mpcc_inst; 96 }; 97 98 struct dc_writeback_update { 99 unsigned int num_wb_info; 100 struct dc_writeback_info writeback_info[MAX_DWB_PIPES]; 101 }; 102 103 enum vertical_interrupt_ref_point { 104 START_V_UPDATE = 0, 105 START_V_SYNC, 106 INVALID_POINT 107 108 //For now, only v_update interrupt is used. 109 //START_V_BLANK, 110 //START_V_ACTIVE 111 }; 112 113 struct periodic_interrupt_config { 114 enum vertical_interrupt_ref_point ref_point; 115 int lines_offset; 116 }; 117 118 struct dc_mst_stream_bw_update { 119 bool is_increase; // is bandwidth reduced or increased 120 uint32_t mst_stream_bw; // new mst bandwidth in kbps 121 }; 122 123 union stream_update_flags { 124 struct { 125 uint32_t scaling:1; 126 uint32_t out_tf:1; 127 uint32_t out_csc:1; 128 uint32_t abm_level:1; 129 uint32_t dpms_off:1; 130 uint32_t gamut_remap:1; 131 uint32_t wb_update:1; 132 uint32_t dsc_changed : 1; 133 uint32_t mst_bw : 1; 134 } bits; 135 136 uint32_t raw; 137 }; 138 139 struct test_pattern { 140 enum dp_test_pattern type; 141 enum dp_test_pattern_color_space color_space; 142 struct link_training_settings const *p_link_settings; 143 unsigned char const *p_custom_pattern; 144 unsigned int cust_pattern_size; 145 }; 146 147 struct dc_stream_state { 148 // sink is deprecated, new code should not reference 149 // this pointer 150 struct dc_sink *sink; 151 152 struct dc_link *link; 153 /* For dynamic link encoder assignment, update the link encoder assigned to 154 * a stream via the volatile dc_state rather than the static dc_link. 155 */ 156 struct link_encoder *link_enc; 157 struct dc_panel_patch sink_patches; 158 union display_content_support content_support; 159 struct dc_crtc_timing timing; 160 struct dc_crtc_timing_adjust adjust; 161 struct dc_info_packet vrr_infopacket; 162 struct dc_info_packet vsc_infopacket; 163 struct dc_info_packet vsp_infopacket; 164 165 struct rect src; /* composition area */ 166 struct rect dst; /* stream addressable area */ 167 168 // TODO: References to this needs to be removed.. 169 struct freesync_context freesync_ctx; 170 171 struct audio_info audio_info; 172 173 struct dc_info_packet hdr_static_metadata; 174 PHYSICAL_ADDRESS_LOC dmdata_address; 175 bool use_dynamic_meta; 176 177 struct dc_transfer_func *out_transfer_func; 178 struct colorspace_transform gamut_remap_matrix; 179 struct dc_csc_transform csc_color_matrix; 180 181 enum dc_color_space output_color_space; 182 enum dc_dither_option dither_option; 183 184 enum view_3d_format view_format; 185 186 bool use_vsc_sdp_for_colorimetry; 187 bool ignore_msa_timing_param; 188 189 bool freesync_on_desktop; 190 191 bool converter_disable_audio; 192 uint8_t qs_bit; 193 uint8_t qy_bit; 194 195 /* TODO: custom INFO packets */ 196 /* TODO: ABM info (DMCU) */ 197 /* TODO: CEA VIC */ 198 199 /* DMCU info */ 200 unsigned int abm_level; 201 202 struct periodic_interrupt_config periodic_interrupt0; 203 struct periodic_interrupt_config periodic_interrupt1; 204 205 /* from core_stream struct */ 206 struct dc_context *ctx; 207 208 /* used by DCP and FMT */ 209 struct bit_depth_reduction_params bit_depth_params; 210 struct clamping_and_pixel_encoding_params clamping; 211 212 int phy_pix_clk; 213 enum signal_type signal; 214 bool dpms_off; 215 216 void *dm_stream_context; 217 218 struct dc_cursor_attributes cursor_attributes; 219 struct dc_cursor_position cursor_position; 220 uint32_t sdr_white_level; // for boosting (SDR) cursor in HDR mode 221 222 /* from stream struct */ 223 struct kref refcount; 224 225 struct crtc_trigger_info triggered_crtc_reset; 226 227 /* writeback */ 228 unsigned int num_wb_info; 229 struct dc_writeback_info writeback_info[MAX_DWB_PIPES]; 230 const struct dc_transfer_func *func_shaper; 231 const struct dc_3dlut *lut3d_func; 232 /* Computed state bits */ 233 bool mode_changed : 1; 234 235 /* Output from DC when stream state is committed or altered 236 * DC may only access these values during: 237 * dc_commit_state, dc_commit_state_no_check, dc_commit_streams 238 * values may not change outside of those calls 239 */ 240 struct { 241 // For interrupt management, some hardware instance 242 // offsets need to be exposed to DM 243 uint8_t otg_offset; 244 } out; 245 246 bool apply_edp_fast_boot_optimization; 247 bool apply_seamless_boot_optimization; 248 249 uint32_t stream_id; 250 251 struct test_pattern test_pattern; 252 union stream_update_flags update_flags; 253 254 bool has_non_synchronizable_pclk; 255 bool vblank_synchronized; 256 }; 257 258 #define ABM_LEVEL_IMMEDIATE_DISABLE 255 259 260 struct dc_stream_update { 261 struct dc_stream_state *stream; 262 263 struct rect src; 264 struct rect dst; 265 struct dc_transfer_func *out_transfer_func; 266 struct dc_info_packet *hdr_static_metadata; 267 unsigned int *abm_level; 268 269 struct periodic_interrupt_config *periodic_interrupt0; 270 struct periodic_interrupt_config *periodic_interrupt1; 271 272 struct dc_info_packet *vrr_infopacket; 273 struct dc_info_packet *vsc_infopacket; 274 struct dc_info_packet *vsp_infopacket; 275 276 bool *dpms_off; 277 bool integer_scaling_update; 278 279 struct colorspace_transform *gamut_remap; 280 enum dc_color_space *output_color_space; 281 enum dc_dither_option *dither_option; 282 283 struct dc_csc_transform *output_csc_transform; 284 285 struct dc_writeback_update *wb_update; 286 struct dc_dsc_config *dsc_config; 287 struct dc_mst_stream_bw_update *mst_bw_update; 288 struct dc_transfer_func *func_shaper; 289 struct dc_3dlut *lut3d_func; 290 291 struct test_pattern *pending_test_pattern; 292 }; 293 294 bool dc_is_stream_unchanged( 295 struct dc_stream_state *old_stream, struct dc_stream_state *stream); 296 bool dc_is_stream_scaling_unchanged( 297 struct dc_stream_state *old_stream, struct dc_stream_state *stream); 298 299 /* 300 * Set up surface attributes and associate to a stream 301 * The surfaces parameter is an absolute set of all surface active for the stream. 302 * If no surfaces are provided, the stream will be blanked; no memory read. 303 * Any flip related attribute changes must be done through this interface. 304 * 305 * After this call: 306 * Surfaces attributes are programmed and configured to be composed into stream. 307 * This does not trigger a flip. No surface address is programmed. 308 */ 309 310 void dc_commit_updates_for_stream(struct dc *dc, 311 struct dc_surface_update *srf_updates, 312 int surface_count, 313 struct dc_stream_state *stream, 314 struct dc_stream_update *stream_update, 315 struct dc_state *state); 316 /* 317 * Log the current stream state. 318 */ 319 void dc_stream_log(const struct dc *dc, const struct dc_stream_state *stream); 320 321 uint8_t dc_get_current_stream_count(struct dc *dc); 322 struct dc_stream_state *dc_get_stream_at_index(struct dc *dc, uint8_t i); 323 struct dc_stream_state *dc_stream_find_from_link(const struct dc_link *link); 324 325 /* 326 * Return the current frame counter. 327 */ 328 uint32_t dc_stream_get_vblank_counter(const struct dc_stream_state *stream); 329 330 /* 331 * Send dp sdp message. 332 */ 333 bool dc_stream_send_dp_sdp(const struct dc_stream_state *stream, 334 const uint8_t *custom_sdp_message, 335 unsigned int sdp_message_size); 336 337 /* TODO: Return parsed values rather than direct register read 338 * This has a dependency on the caller (amdgpu_display_get_crtc_scanoutpos) 339 * being refactored properly to be dce-specific 340 */ 341 bool dc_stream_get_scanoutpos(const struct dc_stream_state *stream, 342 uint32_t *v_blank_start, 343 uint32_t *v_blank_end, 344 uint32_t *h_position, 345 uint32_t *v_position); 346 347 enum dc_status dc_add_stream_to_ctx( 348 struct dc *dc, 349 struct dc_state *new_ctx, 350 struct dc_stream_state *stream); 351 352 enum dc_status dc_remove_stream_from_ctx( 353 struct dc *dc, 354 struct dc_state *new_ctx, 355 struct dc_stream_state *stream); 356 357 358 bool dc_add_plane_to_context( 359 const struct dc *dc, 360 struct dc_stream_state *stream, 361 struct dc_plane_state *plane_state, 362 struct dc_state *context); 363 364 bool dc_remove_plane_from_context( 365 const struct dc *dc, 366 struct dc_stream_state *stream, 367 struct dc_plane_state *plane_state, 368 struct dc_state *context); 369 370 bool dc_rem_all_planes_for_stream( 371 const struct dc *dc, 372 struct dc_stream_state *stream, 373 struct dc_state *context); 374 375 bool dc_add_all_planes_for_stream( 376 const struct dc *dc, 377 struct dc_stream_state *stream, 378 struct dc_plane_state * const *plane_states, 379 int plane_count, 380 struct dc_state *context); 381 382 bool dc_stream_add_writeback(struct dc *dc, 383 struct dc_stream_state *stream, 384 struct dc_writeback_info *wb_info); 385 386 bool dc_stream_remove_writeback(struct dc *dc, 387 struct dc_stream_state *stream, 388 uint32_t dwb_pipe_inst); 389 390 enum dc_status dc_stream_add_dsc_to_resource(struct dc *dc, 391 struct dc_state *state, 392 struct dc_stream_state *stream); 393 394 bool dc_stream_warmup_writeback(struct dc *dc, 395 int num_dwb, 396 struct dc_writeback_info *wb_info); 397 398 bool dc_stream_dmdata_status_done(struct dc *dc, struct dc_stream_state *stream); 399 400 bool dc_stream_set_dynamic_metadata(struct dc *dc, 401 struct dc_stream_state *stream, 402 struct dc_dmdata_attributes *dmdata_attr); 403 404 enum dc_status dc_validate_stream(struct dc *dc, struct dc_stream_state *stream); 405 406 /* 407 * Set up streams and links associated to drive sinks 408 * The streams parameter is an absolute set of all active streams. 409 * 410 * After this call: 411 * Phy, Encoder, Timing Generator are programmed and enabled. 412 * New streams are enabled with blank stream; no memory read. 413 */ 414 /* 415 * Enable stereo when commit_streams is not required, 416 * for example, frame alternate. 417 */ 418 void dc_enable_stereo( 419 struct dc *dc, 420 struct dc_state *context, 421 struct dc_stream_state *streams[], 422 uint8_t stream_count); 423 424 /* Triggers multi-stream synchronization. */ 425 void dc_trigger_sync(struct dc *dc, struct dc_state *context); 426 427 enum surface_update_type dc_check_update_surfaces_for_stream( 428 struct dc *dc, 429 struct dc_surface_update *updates, 430 int surface_count, 431 struct dc_stream_update *stream_update, 432 const struct dc_stream_status *stream_status); 433 434 /** 435 * Create a new default stream for the requested sink 436 */ 437 struct dc_stream_state *dc_create_stream_for_sink(struct dc_sink *dc_sink); 438 439 struct dc_stream_state *dc_copy_stream(const struct dc_stream_state *stream); 440 441 void update_stream_signal(struct dc_stream_state *stream, struct dc_sink *sink); 442 443 void dc_stream_retain(struct dc_stream_state *dc_stream); 444 void dc_stream_release(struct dc_stream_state *dc_stream); 445 446 struct dc_stream_status *dc_stream_get_status_from_state( 447 struct dc_state *state, 448 struct dc_stream_state *stream); 449 struct dc_stream_status *dc_stream_get_status( 450 struct dc_stream_state *dc_stream); 451 452 #ifndef TRIM_FSFT 453 bool dc_optimize_timing_for_fsft( 454 struct dc_stream_state *pStream, 455 unsigned int max_input_rate_in_khz); 456 #endif 457 458 /******************************************************************************* 459 * Cursor interfaces - To manages the cursor within a stream 460 ******************************************************************************/ 461 /* TODO: Deprecated once we switch to dc_set_cursor_position */ 462 bool dc_stream_set_cursor_attributes( 463 struct dc_stream_state *stream, 464 const struct dc_cursor_attributes *attributes); 465 466 bool dc_stream_set_cursor_position( 467 struct dc_stream_state *stream, 468 const struct dc_cursor_position *position); 469 470 471 bool dc_stream_adjust_vmin_vmax(struct dc *dc, 472 struct dc_stream_state *stream, 473 struct dc_crtc_timing_adjust *adjust); 474 475 bool dc_stream_get_last_used_drr_vtotal(struct dc *dc, 476 struct dc_stream_state *stream, 477 uint32_t *refresh_rate); 478 479 bool dc_stream_get_crtc_position(struct dc *dc, 480 struct dc_stream_state **stream, 481 int num_streams, 482 unsigned int *v_pos, 483 unsigned int *nom_v_pos); 484 485 #if defined(CONFIG_DRM_AMD_SECURE_DISPLAY) 486 bool dc_stream_forward_dmcu_crc_window(struct dc *dc, struct dc_stream_state *stream, 487 struct crc_params *crc_window); 488 bool dc_stream_stop_dmcu_crc_win_update(struct dc *dc, 489 struct dc_stream_state *stream); 490 #endif 491 492 bool dc_stream_configure_crc(struct dc *dc, 493 struct dc_stream_state *stream, 494 struct crc_params *crc_window, 495 bool enable, 496 bool continuous); 497 498 bool dc_stream_get_crc(struct dc *dc, 499 struct dc_stream_state *stream, 500 uint32_t *r_cr, 501 uint32_t *g_y, 502 uint32_t *b_cb); 503 504 void dc_stream_set_static_screen_params(struct dc *dc, 505 struct dc_stream_state **stream, 506 int num_streams, 507 const struct dc_static_screen_params *params); 508 509 void dc_stream_set_dyn_expansion(struct dc *dc, struct dc_stream_state *stream, 510 enum dc_dynamic_expansion option); 511 512 void dc_stream_set_dither_option(struct dc_stream_state *stream, 513 enum dc_dither_option option); 514 515 bool dc_stream_set_gamut_remap(struct dc *dc, 516 const struct dc_stream_state *stream); 517 518 bool dc_stream_program_csc_matrix(struct dc *dc, 519 struct dc_stream_state *stream); 520 521 bool dc_stream_get_crtc_position(struct dc *dc, 522 struct dc_stream_state **stream, 523 int num_streams, 524 unsigned int *v_pos, 525 unsigned int *nom_v_pos); 526 527 struct pipe_ctx *dc_stream_get_pipe_ctx(struct dc_stream_state *stream); 528 529 #endif /* DC_STREAM_H_ */ 530