1 /*
2  * Copyright 2012-14 Advanced Micro Devices, Inc.
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a
5  * copy of this software and associated documentation files (the "Software"),
6  * to deal in the Software without restriction, including without limitation
7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8  * and/or sell copies of the Software, and to permit persons to whom the
9  * Software is furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice shall be included in
12  * all copies or substantial portions of the Software.
13  *
14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20  * OTHER DEALINGS IN THE SOFTWARE.
21  *
22  * Authors: AMD
23  *
24  */
25 
26 #ifndef DC_STREAM_H_
27 #define DC_STREAM_H_
28 
29 #include "dc_types.h"
30 #include "grph_object_defs.h"
31 
32 /*******************************************************************************
33  * Stream Interfaces
34  ******************************************************************************/
35 struct timing_sync_info {
36 	int group_id;
37 	int group_size;
38 	bool master;
39 };
40 
41 struct dc_stream_status {
42 	int primary_otg_inst;
43 	int stream_enc_inst;
44 	int plane_count;
45 	int audio_inst;
46 	struct timing_sync_info timing_sync_info;
47 	struct dc_plane_state *plane_states[MAX_SURFACE_NUM];
48 };
49 
50 // TODO: References to this needs to be removed..
51 struct freesync_context {
52 	bool dummy;
53 };
54 
55 enum hubp_dmdata_mode {
56 	DMDATA_SW_MODE,
57 	DMDATA_HW_MODE
58 };
59 
60 struct dc_dmdata_attributes {
61 	/* Specifies whether dynamic meta data will be updated by software
62 	 * or has to be fetched by hardware (DMA mode)
63 	 */
64 	enum hubp_dmdata_mode dmdata_mode;
65 	/* Specifies if current dynamic meta data is to be used only for the current frame */
66 	bool dmdata_repeat;
67 	/* Specifies the size of Dynamic Metadata surface in byte.  Size of 0 means no Dynamic metadata is fetched */
68 	uint32_t dmdata_size;
69 	/* Specifies if a new dynamic meta data should be fetched for an upcoming frame */
70 	bool dmdata_updated;
71 	/* If hardware mode is used, the base address where DMDATA surface is located */
72 	PHYSICAL_ADDRESS_LOC address;
73 	/* Specifies whether QOS level will be provided by TTU or it will come from DMDATA_QOS_LEVEL */
74 	bool dmdata_qos_mode;
75 	/* If qos_mode = 1, this is the QOS value to be used: */
76 	uint32_t dmdata_qos_level;
77 	/* Specifies the value in unit of REFCLK cycles to be added to the
78 	 * current time to produce the Amortized deadline for Dynamic Metadata chunk request
79 	 */
80 	uint32_t dmdata_dl_delta;
81 	/* An unbounded array of uint32s, represents software dmdata to be loaded */
82 	uint32_t *dmdata_sw_data;
83 };
84 
85 struct dc_writeback_info {
86 	bool wb_enabled;
87 	int dwb_pipe_inst;
88 	struct dc_dwb_params dwb_params;
89 	struct mcif_buf_params mcif_buf_params;
90 };
91 
92 struct dc_writeback_update {
93 	unsigned int num_wb_info;
94 	struct dc_writeback_info writeback_info[MAX_DWB_PIPES];
95 };
96 
97 enum vertical_interrupt_ref_point {
98 	START_V_UPDATE = 0,
99 	START_V_SYNC,
100 	INVALID_POINT
101 
102 	//For now, only v_update interrupt is used.
103 	//START_V_BLANK,
104 	//START_V_ACTIVE
105 };
106 
107 struct periodic_interrupt_config {
108 	enum vertical_interrupt_ref_point ref_point;
109 	int lines_offset;
110 };
111 
112 union stream_update_flags {
113 	struct {
114 		uint32_t scaling:1;
115 		uint32_t out_tf:1;
116 		uint32_t out_csc:1;
117 		uint32_t abm_level:1;
118 		uint32_t dpms_off:1;
119 		uint32_t gamut_remap:1;
120 		uint32_t wb_update:1;
121 		uint32_t dsc_changed : 1;
122 	} bits;
123 
124 	uint32_t raw;
125 };
126 
127 struct dc_stream_state {
128 	// sink is deprecated, new code should not reference
129 	// this pointer
130 	struct dc_sink *sink;
131 
132 	struct dc_link *link;
133 	struct dc_panel_patch sink_patches;
134 	union display_content_support content_support;
135 	struct dc_crtc_timing timing;
136 	struct dc_crtc_timing_adjust adjust;
137 	struct dc_info_packet vrr_infopacket;
138 	struct dc_info_packet vsc_infopacket;
139 	struct dc_info_packet vsp_infopacket;
140 
141 	struct rect src; /* composition area */
142 	struct rect dst; /* stream addressable area */
143 
144 	// TODO: References to this needs to be removed..
145 	struct freesync_context freesync_ctx;
146 
147 	struct audio_info audio_info;
148 
149 	struct dc_info_packet hdr_static_metadata;
150 	PHYSICAL_ADDRESS_LOC dmdata_address;
151 	bool   use_dynamic_meta;
152 
153 	struct dc_transfer_func *out_transfer_func;
154 	struct colorspace_transform gamut_remap_matrix;
155 	struct dc_csc_transform csc_color_matrix;
156 
157 	enum dc_color_space output_color_space;
158 	enum dc_dither_option dither_option;
159 
160 	enum view_3d_format view_format;
161 
162 	bool use_vsc_sdp_for_colorimetry;
163 	bool ignore_msa_timing_param;
164 	bool converter_disable_audio;
165 	uint8_t qs_bit;
166 	uint8_t qy_bit;
167 
168 	/* TODO: custom INFO packets */
169 	/* TODO: ABM info (DMCU) */
170 	/* TODO: CEA VIC */
171 
172 	/* DMCU info */
173 	unsigned int abm_level;
174 
175 	struct periodic_interrupt_config periodic_interrupt0;
176 	struct periodic_interrupt_config periodic_interrupt1;
177 
178 	/* from core_stream struct */
179 	struct dc_context *ctx;
180 
181 	/* used by DCP and FMT */
182 	struct bit_depth_reduction_params bit_depth_params;
183 	struct clamping_and_pixel_encoding_params clamping;
184 
185 	int phy_pix_clk;
186 	enum signal_type signal;
187 	bool dpms_off;
188 
189 	void *dm_stream_context;
190 
191 	struct dc_cursor_attributes cursor_attributes;
192 	struct dc_cursor_position cursor_position;
193 	uint32_t sdr_white_level; // for boosting (SDR) cursor in HDR mode
194 
195 	/* from stream struct */
196 	struct kref refcount;
197 
198 	struct crtc_trigger_info triggered_crtc_reset;
199 
200 	/* writeback */
201 	unsigned int num_wb_info;
202 	struct dc_writeback_info writeback_info[MAX_DWB_PIPES];
203 	/* Computed state bits */
204 	bool mode_changed : 1;
205 
206 	/* Output from DC when stream state is committed or altered
207 	 * DC may only access these values during:
208 	 * dc_commit_state, dc_commit_state_no_check, dc_commit_streams
209 	 * values may not change outside of those calls
210 	 */
211 	struct {
212 		// For interrupt management, some hardware instance
213 		// offsets need to be exposed to DM
214 		uint8_t otg_offset;
215 	} out;
216 
217 	bool apply_edp_fast_boot_optimization;
218 	bool apply_seamless_boot_optimization;
219 
220 	uint32_t stream_id;
221 	bool is_dsc_enabled;
222 	union stream_update_flags update_flags;
223 };
224 
225 #define ABM_LEVEL_IMMEDIATE_DISABLE 0xFFFFFFFF
226 
227 struct dc_stream_update {
228 	struct dc_stream_state *stream;
229 
230 	struct rect src;
231 	struct rect dst;
232 	struct dc_transfer_func *out_transfer_func;
233 	struct dc_info_packet *hdr_static_metadata;
234 	unsigned int *abm_level;
235 
236 	struct periodic_interrupt_config *periodic_interrupt0;
237 	struct periodic_interrupt_config *periodic_interrupt1;
238 
239 	struct dc_info_packet *vrr_infopacket;
240 	struct dc_info_packet *vsc_infopacket;
241 	struct dc_info_packet *vsp_infopacket;
242 
243 	bool *dpms_off;
244 	bool integer_scaling_update;
245 
246 	struct colorspace_transform *gamut_remap;
247 	enum dc_color_space *output_color_space;
248 	enum dc_dither_option *dither_option;
249 
250 	struct dc_csc_transform *output_csc_transform;
251 
252 	struct dc_writeback_update *wb_update;
253 	struct dc_dsc_config *dsc_config;
254 };
255 
256 bool dc_is_stream_unchanged(
257 	struct dc_stream_state *old_stream, struct dc_stream_state *stream);
258 bool dc_is_stream_scaling_unchanged(
259 	struct dc_stream_state *old_stream, struct dc_stream_state *stream);
260 
261 /*
262  * Set up surface attributes and associate to a stream
263  * The surfaces parameter is an absolute set of all surface active for the stream.
264  * If no surfaces are provided, the stream will be blanked; no memory read.
265  * Any flip related attribute changes must be done through this interface.
266  *
267  * After this call:
268  *   Surfaces attributes are programmed and configured to be composed into stream.
269  *   This does not trigger a flip.  No surface address is programmed.
270  */
271 
272 void dc_commit_updates_for_stream(struct dc *dc,
273 		struct dc_surface_update *srf_updates,
274 		int surface_count,
275 		struct dc_stream_state *stream,
276 		struct dc_stream_update *stream_update,
277 		struct dc_state *state);
278 /*
279  * Log the current stream state.
280  */
281 void dc_stream_log(const struct dc *dc, const struct dc_stream_state *stream);
282 
283 uint8_t dc_get_current_stream_count(struct dc *dc);
284 struct dc_stream_state *dc_get_stream_at_index(struct dc *dc, uint8_t i);
285 
286 /*
287  * Return the current frame counter.
288  */
289 uint32_t dc_stream_get_vblank_counter(const struct dc_stream_state *stream);
290 
291 /*
292  * Send dp sdp message.
293  */
294 bool dc_stream_send_dp_sdp(const struct dc_stream_state *stream,
295 		const uint8_t *custom_sdp_message,
296 		unsigned int sdp_message_size);
297 
298 /* TODO: Return parsed values rather than direct register read
299  * This has a dependency on the caller (amdgpu_display_get_crtc_scanoutpos)
300  * being refactored properly to be dce-specific
301  */
302 bool dc_stream_get_scanoutpos(const struct dc_stream_state *stream,
303 				  uint32_t *v_blank_start,
304 				  uint32_t *v_blank_end,
305 				  uint32_t *h_position,
306 				  uint32_t *v_position);
307 
308 enum dc_status dc_add_stream_to_ctx(
309 			struct dc *dc,
310 		struct dc_state *new_ctx,
311 		struct dc_stream_state *stream);
312 
313 enum dc_status dc_remove_stream_from_ctx(
314 		struct dc *dc,
315 			struct dc_state *new_ctx,
316 			struct dc_stream_state *stream);
317 
318 
319 bool dc_add_plane_to_context(
320 		const struct dc *dc,
321 		struct dc_stream_state *stream,
322 		struct dc_plane_state *plane_state,
323 		struct dc_state *context);
324 
325 bool dc_remove_plane_from_context(
326 		const struct dc *dc,
327 		struct dc_stream_state *stream,
328 		struct dc_plane_state *plane_state,
329 		struct dc_state *context);
330 
331 bool dc_rem_all_planes_for_stream(
332 		const struct dc *dc,
333 		struct dc_stream_state *stream,
334 		struct dc_state *context);
335 
336 bool dc_add_all_planes_for_stream(
337 		const struct dc *dc,
338 		struct dc_stream_state *stream,
339 		struct dc_plane_state * const *plane_states,
340 		int plane_count,
341 		struct dc_state *context);
342 
343 bool dc_stream_add_writeback(struct dc *dc,
344 		struct dc_stream_state *stream,
345 		struct dc_writeback_info *wb_info);
346 
347 bool dc_stream_remove_writeback(struct dc *dc,
348 		struct dc_stream_state *stream,
349 		uint32_t dwb_pipe_inst);
350 
351 bool dc_stream_warmup_writeback(struct dc *dc,
352 		int num_dwb,
353 		struct dc_writeback_info *wb_info);
354 
355 bool dc_stream_dmdata_status_done(struct dc *dc, struct dc_stream_state *stream);
356 
357 bool dc_stream_set_dynamic_metadata(struct dc *dc,
358 		struct dc_stream_state *stream,
359 		struct dc_dmdata_attributes *dmdata_attr);
360 
361 enum dc_status dc_validate_stream(struct dc *dc, struct dc_stream_state *stream);
362 
363 /*
364  * Set up streams and links associated to drive sinks
365  * The streams parameter is an absolute set of all active streams.
366  *
367  * After this call:
368  *   Phy, Encoder, Timing Generator are programmed and enabled.
369  *   New streams are enabled with blank stream; no memory read.
370  */
371 /*
372  * Enable stereo when commit_streams is not required,
373  * for example, frame alternate.
374  */
375 bool dc_enable_stereo(
376 	struct dc *dc,
377 	struct dc_state *context,
378 	struct dc_stream_state *streams[],
379 	uint8_t stream_count);
380 
381 
382 enum surface_update_type dc_check_update_surfaces_for_stream(
383 		struct dc *dc,
384 		struct dc_surface_update *updates,
385 		int surface_count,
386 		struct dc_stream_update *stream_update,
387 		const struct dc_stream_status *stream_status);
388 
389 /**
390  * Create a new default stream for the requested sink
391  */
392 struct dc_stream_state *dc_create_stream_for_sink(struct dc_sink *dc_sink);
393 
394 struct dc_stream_state *dc_copy_stream(const struct dc_stream_state *stream);
395 
396 void update_stream_signal(struct dc_stream_state *stream, struct dc_sink *sink);
397 
398 void dc_stream_retain(struct dc_stream_state *dc_stream);
399 void dc_stream_release(struct dc_stream_state *dc_stream);
400 
401 struct dc_stream_status *dc_stream_get_status_from_state(
402 	struct dc_state *state,
403 	struct dc_stream_state *stream);
404 struct dc_stream_status *dc_stream_get_status(
405 	struct dc_stream_state *dc_stream);
406 
407 /*******************************************************************************
408  * Cursor interfaces - To manages the cursor within a stream
409  ******************************************************************************/
410 /* TODO: Deprecated once we switch to dc_set_cursor_position */
411 bool dc_stream_set_cursor_attributes(
412 	struct dc_stream_state *stream,
413 	const struct dc_cursor_attributes *attributes);
414 
415 bool dc_stream_set_cursor_position(
416 	struct dc_stream_state *stream,
417 	const struct dc_cursor_position *position);
418 
419 
420 bool dc_stream_adjust_vmin_vmax(struct dc *dc,
421 				struct dc_stream_state *stream,
422 				struct dc_crtc_timing_adjust *adjust);
423 
424 bool dc_stream_get_crtc_position(struct dc *dc,
425 				 struct dc_stream_state **stream,
426 				 int num_streams,
427 				 unsigned int *v_pos,
428 				 unsigned int *nom_v_pos);
429 
430 bool dc_stream_configure_crc(struct dc *dc,
431 			     struct dc_stream_state *stream,
432 			     bool enable,
433 			     bool continuous);
434 
435 bool dc_stream_get_crc(struct dc *dc,
436 		       struct dc_stream_state *stream,
437 		       uint32_t *r_cr,
438 		       uint32_t *g_y,
439 		       uint32_t *b_cb);
440 
441 void dc_stream_set_static_screen_params(struct dc *dc,
442 					struct dc_stream_state **stream,
443 					int num_streams,
444 					const struct dc_static_screen_params *params);
445 
446 void dc_stream_set_dyn_expansion(struct dc *dc, struct dc_stream_state *stream,
447 		enum dc_dynamic_expansion option);
448 
449 void dc_stream_set_dither_option(struct dc_stream_state *stream,
450 				 enum dc_dither_option option);
451 
452 bool dc_stream_set_gamut_remap(struct dc *dc,
453 			       const struct dc_stream_state *stream);
454 
455 bool dc_stream_program_csc_matrix(struct dc *dc,
456 				  struct dc_stream_state *stream);
457 
458 bool dc_stream_get_crtc_position(struct dc *dc,
459 				 struct dc_stream_state **stream,
460 				 int num_streams,
461 				 unsigned int *v_pos,
462 				 unsigned int *nom_v_pos);
463 
464 #endif /* DC_STREAM_H_ */
465