1 /* 2 * Copyright 2012-14 Advanced Micro Devices, Inc. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included in 12 * all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 * 22 * Authors: AMD 23 * 24 */ 25 26 #ifndef DC_STREAM_H_ 27 #define DC_STREAM_H_ 28 29 #include "dc_types.h" 30 #include "grph_object_defs.h" 31 32 /******************************************************************************* 33 * Stream Interfaces 34 ******************************************************************************/ 35 struct timing_sync_info { 36 int group_id; 37 int group_size; 38 bool master; 39 }; 40 41 struct dc_stream_status { 42 int primary_otg_inst; 43 int stream_enc_inst; 44 int plane_count; 45 int audio_inst; 46 struct timing_sync_info timing_sync_info; 47 struct dc_plane_state *plane_states[MAX_SURFACE_NUM]; 48 bool is_abm_supported; 49 }; 50 51 // TODO: References to this needs to be removed.. 52 struct freesync_context { 53 bool dummy; 54 }; 55 56 enum hubp_dmdata_mode { 57 DMDATA_SW_MODE, 58 DMDATA_HW_MODE 59 }; 60 61 struct dc_dmdata_attributes { 62 /* Specifies whether dynamic meta data will be updated by software 63 * or has to be fetched by hardware (DMA mode) 64 */ 65 enum hubp_dmdata_mode dmdata_mode; 66 /* Specifies if current dynamic meta data is to be used only for the current frame */ 67 bool dmdata_repeat; 68 /* Specifies the size of Dynamic Metadata surface in byte. Size of 0 means no Dynamic metadata is fetched */ 69 uint32_t dmdata_size; 70 /* Specifies if a new dynamic meta data should be fetched for an upcoming frame */ 71 bool dmdata_updated; 72 /* If hardware mode is used, the base address where DMDATA surface is located */ 73 PHYSICAL_ADDRESS_LOC address; 74 /* Specifies whether QOS level will be provided by TTU or it will come from DMDATA_QOS_LEVEL */ 75 bool dmdata_qos_mode; 76 /* If qos_mode = 1, this is the QOS value to be used: */ 77 uint32_t dmdata_qos_level; 78 /* Specifies the value in unit of REFCLK cycles to be added to the 79 * current time to produce the Amortized deadline for Dynamic Metadata chunk request 80 */ 81 uint32_t dmdata_dl_delta; 82 /* An unbounded array of uint32s, represents software dmdata to be loaded */ 83 uint32_t *dmdata_sw_data; 84 }; 85 86 struct dc_writeback_info { 87 bool wb_enabled; 88 int dwb_pipe_inst; 89 struct dc_dwb_params dwb_params; 90 struct mcif_buf_params mcif_buf_params; 91 struct mcif_warmup_params mcif_warmup_params; 92 /* the plane that is the input to TOP_MUX for MPCC that is the DWB source */ 93 struct dc_plane_state *writeback_source_plane; 94 /* source MPCC instance. for use by internally by dc */ 95 int mpcc_inst; 96 }; 97 98 struct dc_writeback_update { 99 unsigned int num_wb_info; 100 struct dc_writeback_info writeback_info[MAX_DWB_PIPES]; 101 }; 102 103 enum vertical_interrupt_ref_point { 104 START_V_UPDATE = 0, 105 START_V_SYNC, 106 INVALID_POINT 107 108 //For now, only v_update interrupt is used. 109 //START_V_BLANK, 110 //START_V_ACTIVE 111 }; 112 113 struct periodic_interrupt_config { 114 enum vertical_interrupt_ref_point ref_point; 115 int lines_offset; 116 }; 117 118 #if defined(CONFIG_DRM_AMD_DC_DCN) 119 struct dc_mst_stream_bw_update { 120 bool is_increase; // is bandwidth reduced or increased 121 uint32_t mst_stream_bw; // new mst bandwidth in kbps 122 }; 123 #endif 124 125 union stream_update_flags { 126 struct { 127 uint32_t scaling:1; 128 uint32_t out_tf:1; 129 uint32_t out_csc:1; 130 uint32_t abm_level:1; 131 uint32_t dpms_off:1; 132 uint32_t gamut_remap:1; 133 uint32_t wb_update:1; 134 uint32_t dsc_changed : 1; 135 #if defined(CONFIG_DRM_AMD_DC_DCN) 136 uint32_t mst_bw : 1; 137 #endif 138 } bits; 139 140 uint32_t raw; 141 }; 142 143 struct test_pattern { 144 enum dp_test_pattern type; 145 enum dp_test_pattern_color_space color_space; 146 struct link_training_settings const *p_link_settings; 147 unsigned char const *p_custom_pattern; 148 unsigned int cust_pattern_size; 149 }; 150 151 struct dc_stream_state { 152 // sink is deprecated, new code should not reference 153 // this pointer 154 struct dc_sink *sink; 155 156 struct dc_link *link; 157 /* For dynamic link encoder assignment, update the link encoder assigned to 158 * a stream via the volatile dc_state rather than the static dc_link. 159 */ 160 struct link_encoder *link_enc; 161 struct dc_panel_patch sink_patches; 162 union display_content_support content_support; 163 struct dc_crtc_timing timing; 164 struct dc_crtc_timing_adjust adjust; 165 struct dc_info_packet vrr_infopacket; 166 struct dc_info_packet vsc_infopacket; 167 struct dc_info_packet vsp_infopacket; 168 169 struct rect src; /* composition area */ 170 struct rect dst; /* stream addressable area */ 171 172 // TODO: References to this needs to be removed.. 173 struct freesync_context freesync_ctx; 174 175 struct audio_info audio_info; 176 177 struct dc_info_packet hdr_static_metadata; 178 PHYSICAL_ADDRESS_LOC dmdata_address; 179 bool use_dynamic_meta; 180 181 struct dc_transfer_func *out_transfer_func; 182 struct colorspace_transform gamut_remap_matrix; 183 struct dc_csc_transform csc_color_matrix; 184 185 enum dc_color_space output_color_space; 186 enum dc_dither_option dither_option; 187 188 enum view_3d_format view_format; 189 190 bool use_vsc_sdp_for_colorimetry; 191 bool ignore_msa_timing_param; 192 193 bool freesync_on_desktop; 194 195 bool converter_disable_audio; 196 uint8_t qs_bit; 197 uint8_t qy_bit; 198 199 /* TODO: custom INFO packets */ 200 /* TODO: ABM info (DMCU) */ 201 /* TODO: CEA VIC */ 202 203 /* DMCU info */ 204 unsigned int abm_level; 205 206 struct periodic_interrupt_config periodic_interrupt0; 207 struct periodic_interrupt_config periodic_interrupt1; 208 209 /* from core_stream struct */ 210 struct dc_context *ctx; 211 212 /* used by DCP and FMT */ 213 struct bit_depth_reduction_params bit_depth_params; 214 struct clamping_and_pixel_encoding_params clamping; 215 216 int phy_pix_clk; 217 enum signal_type signal; 218 bool dpms_off; 219 220 void *dm_stream_context; 221 222 struct dc_cursor_attributes cursor_attributes; 223 struct dc_cursor_position cursor_position; 224 uint32_t sdr_white_level; // for boosting (SDR) cursor in HDR mode 225 226 /* from stream struct */ 227 struct kref refcount; 228 229 struct crtc_trigger_info triggered_crtc_reset; 230 231 /* writeback */ 232 unsigned int num_wb_info; 233 struct dc_writeback_info writeback_info[MAX_DWB_PIPES]; 234 const struct dc_transfer_func *func_shaper; 235 const struct dc_3dlut *lut3d_func; 236 /* Computed state bits */ 237 bool mode_changed : 1; 238 239 /* Output from DC when stream state is committed or altered 240 * DC may only access these values during: 241 * dc_commit_state, dc_commit_state_no_check, dc_commit_streams 242 * values may not change outside of those calls 243 */ 244 struct { 245 // For interrupt management, some hardware instance 246 // offsets need to be exposed to DM 247 uint8_t otg_offset; 248 } out; 249 250 bool apply_edp_fast_boot_optimization; 251 bool apply_seamless_boot_optimization; 252 253 uint32_t stream_id; 254 255 struct test_pattern test_pattern; 256 union stream_update_flags update_flags; 257 258 bool has_non_synchronizable_pclk; 259 bool vblank_synchronized; 260 }; 261 262 #define ABM_LEVEL_IMMEDIATE_DISABLE 255 263 264 struct dc_stream_update { 265 struct dc_stream_state *stream; 266 267 struct rect src; 268 struct rect dst; 269 struct dc_transfer_func *out_transfer_func; 270 struct dc_info_packet *hdr_static_metadata; 271 unsigned int *abm_level; 272 273 struct periodic_interrupt_config *periodic_interrupt0; 274 struct periodic_interrupt_config *periodic_interrupt1; 275 276 struct dc_info_packet *vrr_infopacket; 277 struct dc_info_packet *vsc_infopacket; 278 struct dc_info_packet *vsp_infopacket; 279 280 bool *dpms_off; 281 bool integer_scaling_update; 282 283 struct colorspace_transform *gamut_remap; 284 enum dc_color_space *output_color_space; 285 enum dc_dither_option *dither_option; 286 287 struct dc_csc_transform *output_csc_transform; 288 289 struct dc_writeback_update *wb_update; 290 struct dc_dsc_config *dsc_config; 291 #if defined(CONFIG_DRM_AMD_DC_DCN) 292 struct dc_mst_stream_bw_update *mst_bw_update; 293 #endif 294 struct dc_transfer_func *func_shaper; 295 struct dc_3dlut *lut3d_func; 296 297 struct test_pattern *pending_test_pattern; 298 }; 299 300 bool dc_is_stream_unchanged( 301 struct dc_stream_state *old_stream, struct dc_stream_state *stream); 302 bool dc_is_stream_scaling_unchanged( 303 struct dc_stream_state *old_stream, struct dc_stream_state *stream); 304 305 /* 306 * Set up surface attributes and associate to a stream 307 * The surfaces parameter is an absolute set of all surface active for the stream. 308 * If no surfaces are provided, the stream will be blanked; no memory read. 309 * Any flip related attribute changes must be done through this interface. 310 * 311 * After this call: 312 * Surfaces attributes are programmed and configured to be composed into stream. 313 * This does not trigger a flip. No surface address is programmed. 314 */ 315 316 void dc_commit_updates_for_stream(struct dc *dc, 317 struct dc_surface_update *srf_updates, 318 int surface_count, 319 struct dc_stream_state *stream, 320 struct dc_stream_update *stream_update, 321 struct dc_state *state); 322 /* 323 * Log the current stream state. 324 */ 325 void dc_stream_log(const struct dc *dc, const struct dc_stream_state *stream); 326 327 uint8_t dc_get_current_stream_count(struct dc *dc); 328 struct dc_stream_state *dc_get_stream_at_index(struct dc *dc, uint8_t i); 329 struct dc_stream_state *dc_stream_find_from_link(const struct dc_link *link); 330 331 /* 332 * Return the current frame counter. 333 */ 334 uint32_t dc_stream_get_vblank_counter(const struct dc_stream_state *stream); 335 336 /* 337 * Send dp sdp message. 338 */ 339 bool dc_stream_send_dp_sdp(const struct dc_stream_state *stream, 340 const uint8_t *custom_sdp_message, 341 unsigned int sdp_message_size); 342 343 /* TODO: Return parsed values rather than direct register read 344 * This has a dependency on the caller (amdgpu_display_get_crtc_scanoutpos) 345 * being refactored properly to be dce-specific 346 */ 347 bool dc_stream_get_scanoutpos(const struct dc_stream_state *stream, 348 uint32_t *v_blank_start, 349 uint32_t *v_blank_end, 350 uint32_t *h_position, 351 uint32_t *v_position); 352 353 enum dc_status dc_add_stream_to_ctx( 354 struct dc *dc, 355 struct dc_state *new_ctx, 356 struct dc_stream_state *stream); 357 358 enum dc_status dc_remove_stream_from_ctx( 359 struct dc *dc, 360 struct dc_state *new_ctx, 361 struct dc_stream_state *stream); 362 363 364 bool dc_add_plane_to_context( 365 const struct dc *dc, 366 struct dc_stream_state *stream, 367 struct dc_plane_state *plane_state, 368 struct dc_state *context); 369 370 bool dc_remove_plane_from_context( 371 const struct dc *dc, 372 struct dc_stream_state *stream, 373 struct dc_plane_state *plane_state, 374 struct dc_state *context); 375 376 bool dc_rem_all_planes_for_stream( 377 const struct dc *dc, 378 struct dc_stream_state *stream, 379 struct dc_state *context); 380 381 bool dc_add_all_planes_for_stream( 382 const struct dc *dc, 383 struct dc_stream_state *stream, 384 struct dc_plane_state * const *plane_states, 385 int plane_count, 386 struct dc_state *context); 387 388 bool dc_stream_add_writeback(struct dc *dc, 389 struct dc_stream_state *stream, 390 struct dc_writeback_info *wb_info); 391 392 bool dc_stream_remove_writeback(struct dc *dc, 393 struct dc_stream_state *stream, 394 uint32_t dwb_pipe_inst); 395 396 enum dc_status dc_stream_add_dsc_to_resource(struct dc *dc, 397 struct dc_state *state, 398 struct dc_stream_state *stream); 399 400 bool dc_stream_warmup_writeback(struct dc *dc, 401 int num_dwb, 402 struct dc_writeback_info *wb_info); 403 404 bool dc_stream_dmdata_status_done(struct dc *dc, struct dc_stream_state *stream); 405 406 bool dc_stream_set_dynamic_metadata(struct dc *dc, 407 struct dc_stream_state *stream, 408 struct dc_dmdata_attributes *dmdata_attr); 409 410 enum dc_status dc_validate_stream(struct dc *dc, struct dc_stream_state *stream); 411 412 /* 413 * Set up streams and links associated to drive sinks 414 * The streams parameter is an absolute set of all active streams. 415 * 416 * After this call: 417 * Phy, Encoder, Timing Generator are programmed and enabled. 418 * New streams are enabled with blank stream; no memory read. 419 */ 420 /* 421 * Enable stereo when commit_streams is not required, 422 * for example, frame alternate. 423 */ 424 void dc_enable_stereo( 425 struct dc *dc, 426 struct dc_state *context, 427 struct dc_stream_state *streams[], 428 uint8_t stream_count); 429 430 /* Triggers multi-stream synchronization. */ 431 void dc_trigger_sync(struct dc *dc, struct dc_state *context); 432 433 enum surface_update_type dc_check_update_surfaces_for_stream( 434 struct dc *dc, 435 struct dc_surface_update *updates, 436 int surface_count, 437 struct dc_stream_update *stream_update, 438 const struct dc_stream_status *stream_status); 439 440 /** 441 * Create a new default stream for the requested sink 442 */ 443 struct dc_stream_state *dc_create_stream_for_sink(struct dc_sink *dc_sink); 444 445 struct dc_stream_state *dc_copy_stream(const struct dc_stream_state *stream); 446 447 void update_stream_signal(struct dc_stream_state *stream, struct dc_sink *sink); 448 449 void dc_stream_retain(struct dc_stream_state *dc_stream); 450 void dc_stream_release(struct dc_stream_state *dc_stream); 451 452 struct dc_stream_status *dc_stream_get_status_from_state( 453 struct dc_state *state, 454 struct dc_stream_state *stream); 455 struct dc_stream_status *dc_stream_get_status( 456 struct dc_stream_state *dc_stream); 457 458 #ifndef TRIM_FSFT 459 bool dc_optimize_timing_for_fsft( 460 struct dc_stream_state *pStream, 461 unsigned int max_input_rate_in_khz); 462 #endif 463 464 /******************************************************************************* 465 * Cursor interfaces - To manages the cursor within a stream 466 ******************************************************************************/ 467 /* TODO: Deprecated once we switch to dc_set_cursor_position */ 468 bool dc_stream_set_cursor_attributes( 469 struct dc_stream_state *stream, 470 const struct dc_cursor_attributes *attributes); 471 472 bool dc_stream_set_cursor_position( 473 struct dc_stream_state *stream, 474 const struct dc_cursor_position *position); 475 476 477 bool dc_stream_adjust_vmin_vmax(struct dc *dc, 478 struct dc_stream_state *stream, 479 struct dc_crtc_timing_adjust *adjust); 480 481 bool dc_stream_get_last_used_drr_vtotal(struct dc *dc, 482 struct dc_stream_state *stream, 483 uint32_t *refresh_rate); 484 485 bool dc_stream_get_crtc_position(struct dc *dc, 486 struct dc_stream_state **stream, 487 int num_streams, 488 unsigned int *v_pos, 489 unsigned int *nom_v_pos); 490 491 #if defined(CONFIG_DRM_AMD_SECURE_DISPLAY) 492 bool dc_stream_forward_dmcu_crc_window(struct dc *dc, struct dc_stream_state *stream, 493 struct crc_params *crc_window); 494 bool dc_stream_stop_dmcu_crc_win_update(struct dc *dc, 495 struct dc_stream_state *stream); 496 #endif 497 498 bool dc_stream_configure_crc(struct dc *dc, 499 struct dc_stream_state *stream, 500 struct crc_params *crc_window, 501 bool enable, 502 bool continuous); 503 504 bool dc_stream_get_crc(struct dc *dc, 505 struct dc_stream_state *stream, 506 uint32_t *r_cr, 507 uint32_t *g_y, 508 uint32_t *b_cb); 509 510 void dc_stream_set_static_screen_params(struct dc *dc, 511 struct dc_stream_state **stream, 512 int num_streams, 513 const struct dc_static_screen_params *params); 514 515 void dc_stream_set_dyn_expansion(struct dc *dc, struct dc_stream_state *stream, 516 enum dc_dynamic_expansion option); 517 518 void dc_stream_set_dither_option(struct dc_stream_state *stream, 519 enum dc_dither_option option); 520 521 bool dc_stream_set_gamut_remap(struct dc *dc, 522 const struct dc_stream_state *stream); 523 524 bool dc_stream_program_csc_matrix(struct dc *dc, 525 struct dc_stream_state *stream); 526 527 bool dc_stream_get_crtc_position(struct dc *dc, 528 struct dc_stream_state **stream, 529 int num_streams, 530 unsigned int *v_pos, 531 unsigned int *nom_v_pos); 532 533 #endif /* DC_STREAM_H_ */ 534