1 /* 2 * Copyright 2012-14 Advanced Micro Devices, Inc. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included in 12 * all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 * 22 * Authors: AMD 23 * 24 */ 25 26 #ifndef DC_STREAM_H_ 27 #define DC_STREAM_H_ 28 29 #include "dc_types.h" 30 #include "grph_object_defs.h" 31 32 /******************************************************************************* 33 * Stream Interfaces 34 ******************************************************************************/ 35 struct timing_sync_info { 36 int group_id; 37 int group_size; 38 bool master; 39 }; 40 41 struct dc_stream_status { 42 int primary_otg_inst; 43 int stream_enc_inst; 44 int plane_count; 45 int audio_inst; 46 struct timing_sync_info timing_sync_info; 47 struct dc_plane_state *plane_states[MAX_SURFACE_NUM]; 48 bool is_abm_supported; 49 }; 50 51 // TODO: References to this needs to be removed.. 52 struct freesync_context { 53 bool dummy; 54 }; 55 56 enum hubp_dmdata_mode { 57 DMDATA_SW_MODE, 58 DMDATA_HW_MODE 59 }; 60 61 struct dc_dmdata_attributes { 62 /* Specifies whether dynamic meta data will be updated by software 63 * or has to be fetched by hardware (DMA mode) 64 */ 65 enum hubp_dmdata_mode dmdata_mode; 66 /* Specifies if current dynamic meta data is to be used only for the current frame */ 67 bool dmdata_repeat; 68 /* Specifies the size of Dynamic Metadata surface in byte. Size of 0 means no Dynamic metadata is fetched */ 69 uint32_t dmdata_size; 70 /* Specifies if a new dynamic meta data should be fetched for an upcoming frame */ 71 bool dmdata_updated; 72 /* If hardware mode is used, the base address where DMDATA surface is located */ 73 PHYSICAL_ADDRESS_LOC address; 74 /* Specifies whether QOS level will be provided by TTU or it will come from DMDATA_QOS_LEVEL */ 75 bool dmdata_qos_mode; 76 /* If qos_mode = 1, this is the QOS value to be used: */ 77 uint32_t dmdata_qos_level; 78 /* Specifies the value in unit of REFCLK cycles to be added to the 79 * current time to produce the Amortized deadline for Dynamic Metadata chunk request 80 */ 81 uint32_t dmdata_dl_delta; 82 /* An unbounded array of uint32s, represents software dmdata to be loaded */ 83 uint32_t *dmdata_sw_data; 84 }; 85 86 struct dc_writeback_info { 87 bool wb_enabled; 88 int dwb_pipe_inst; 89 struct dc_dwb_params dwb_params; 90 struct mcif_buf_params mcif_buf_params; 91 struct mcif_warmup_params mcif_warmup_params; 92 /* the plane that is the input to TOP_MUX for MPCC that is the DWB source */ 93 struct dc_plane_state *writeback_source_plane; 94 /* source MPCC instance. for use by internally by dc */ 95 int mpcc_inst; 96 }; 97 98 struct dc_writeback_update { 99 unsigned int num_wb_info; 100 struct dc_writeback_info writeback_info[MAX_DWB_PIPES]; 101 }; 102 103 enum vertical_interrupt_ref_point { 104 START_V_UPDATE = 0, 105 START_V_SYNC, 106 INVALID_POINT 107 108 //For now, only v_update interrupt is used. 109 //START_V_BLANK, 110 //START_V_ACTIVE 111 }; 112 113 struct periodic_interrupt_config { 114 enum vertical_interrupt_ref_point ref_point; 115 int lines_offset; 116 }; 117 118 struct dc_mst_stream_bw_update { 119 bool is_increase; // is bandwidth reduced or increased 120 uint32_t mst_stream_bw; // new mst bandwidth in kbps 121 }; 122 123 union stream_update_flags { 124 struct { 125 uint32_t scaling:1; 126 uint32_t out_tf:1; 127 uint32_t out_csc:1; 128 uint32_t abm_level:1; 129 uint32_t dpms_off:1; 130 uint32_t gamut_remap:1; 131 uint32_t wb_update:1; 132 uint32_t dsc_changed : 1; 133 uint32_t mst_bw : 1; 134 uint32_t crtc_timing_adjust : 1; 135 } bits; 136 137 uint32_t raw; 138 }; 139 140 struct test_pattern { 141 enum dp_test_pattern type; 142 enum dp_test_pattern_color_space color_space; 143 struct link_training_settings const *p_link_settings; 144 unsigned char const *p_custom_pattern; 145 unsigned int cust_pattern_size; 146 }; 147 148 #ifdef CONFIG_DRM_AMD_DC_DCN 149 #define SUBVP_DRR_MARGIN_US 500 // 500us for DRR margin (SubVP + DRR) 150 151 enum mall_stream_type { 152 SUBVP_NONE, // subvp not in use 153 SUBVP_MAIN, // subvp in use, this stream is main stream 154 SUBVP_PHANTOM, // subvp in use, this stream is a phantom stream 155 }; 156 157 struct mall_stream_config { 158 /* MALL stream config to indicate if the stream is phantom or not. 159 * We will use a phantom stream to indicate that the pipe is phantom. 160 */ 161 enum mall_stream_type type; 162 struct dc_stream_state *paired_stream; // master / slave stream 163 }; 164 #endif 165 166 struct dc_stream_state { 167 // sink is deprecated, new code should not reference 168 // this pointer 169 struct dc_sink *sink; 170 171 struct dc_link *link; 172 /* For dynamic link encoder assignment, update the link encoder assigned to 173 * a stream via the volatile dc_state rather than the static dc_link. 174 */ 175 struct link_encoder *link_enc; 176 struct dc_panel_patch sink_patches; 177 union display_content_support content_support; 178 struct dc_crtc_timing timing; 179 struct dc_crtc_timing_adjust adjust; 180 struct dc_info_packet vrr_infopacket; 181 struct dc_info_packet vsc_infopacket; 182 struct dc_info_packet vsp_infopacket; 183 struct dc_info_packet hfvsif_infopacket; 184 struct dc_info_packet vtem_infopacket; 185 uint8_t dsc_packed_pps[128]; 186 struct rect src; /* composition area */ 187 struct rect dst; /* stream addressable area */ 188 189 // TODO: References to this needs to be removed.. 190 struct freesync_context freesync_ctx; 191 192 struct audio_info audio_info; 193 194 struct dc_info_packet hdr_static_metadata; 195 PHYSICAL_ADDRESS_LOC dmdata_address; 196 bool use_dynamic_meta; 197 198 struct dc_transfer_func *out_transfer_func; 199 struct colorspace_transform gamut_remap_matrix; 200 struct dc_csc_transform csc_color_matrix; 201 202 enum dc_color_space output_color_space; 203 enum dc_dither_option dither_option; 204 205 enum view_3d_format view_format; 206 207 bool use_vsc_sdp_for_colorimetry; 208 bool ignore_msa_timing_param; 209 210 bool allow_freesync; 211 bool vrr_active_variable; 212 bool freesync_on_desktop; 213 214 bool converter_disable_audio; 215 uint8_t qs_bit; 216 uint8_t qy_bit; 217 218 /* TODO: custom INFO packets */ 219 /* TODO: ABM info (DMCU) */ 220 /* TODO: CEA VIC */ 221 222 /* DMCU info */ 223 unsigned int abm_level; 224 225 struct periodic_interrupt_config periodic_interrupt0; 226 struct periodic_interrupt_config periodic_interrupt1; 227 228 /* from core_stream struct */ 229 struct dc_context *ctx; 230 231 /* used by DCP and FMT */ 232 struct bit_depth_reduction_params bit_depth_params; 233 struct clamping_and_pixel_encoding_params clamping; 234 235 int phy_pix_clk; 236 enum signal_type signal; 237 bool dpms_off; 238 239 void *dm_stream_context; 240 241 struct dc_cursor_attributes cursor_attributes; 242 struct dc_cursor_position cursor_position; 243 uint32_t sdr_white_level; // for boosting (SDR) cursor in HDR mode 244 245 /* from stream struct */ 246 struct kref refcount; 247 248 struct crtc_trigger_info triggered_crtc_reset; 249 250 /* writeback */ 251 unsigned int num_wb_info; 252 struct dc_writeback_info writeback_info[MAX_DWB_PIPES]; 253 const struct dc_transfer_func *func_shaper; 254 const struct dc_3dlut *lut3d_func; 255 /* Computed state bits */ 256 bool mode_changed : 1; 257 258 /* Output from DC when stream state is committed or altered 259 * DC may only access these values during: 260 * dc_commit_state, dc_commit_state_no_check, dc_commit_streams 261 * values may not change outside of those calls 262 */ 263 struct { 264 // For interrupt management, some hardware instance 265 // offsets need to be exposed to DM 266 uint8_t otg_offset; 267 } out; 268 269 bool apply_edp_fast_boot_optimization; 270 bool apply_seamless_boot_optimization; 271 uint32_t apply_boot_odm_mode; 272 273 uint32_t stream_id; 274 275 struct test_pattern test_pattern; 276 union stream_update_flags update_flags; 277 278 bool has_non_synchronizable_pclk; 279 bool vblank_synchronized; 280 #ifdef CONFIG_DRM_AMD_DC_DCN 281 struct mall_stream_config mall_stream_config; 282 #endif 283 }; 284 285 #define ABM_LEVEL_IMMEDIATE_DISABLE 255 286 287 struct dc_stream_update { 288 struct dc_stream_state *stream; 289 290 struct rect src; 291 struct rect dst; 292 struct dc_transfer_func *out_transfer_func; 293 struct dc_info_packet *hdr_static_metadata; 294 unsigned int *abm_level; 295 296 struct periodic_interrupt_config *periodic_interrupt0; 297 struct periodic_interrupt_config *periodic_interrupt1; 298 299 struct dc_info_packet *vrr_infopacket; 300 struct dc_info_packet *vsc_infopacket; 301 struct dc_info_packet *vsp_infopacket; 302 struct dc_info_packet *hfvsif_infopacket; 303 struct dc_info_packet *vtem_infopacket; 304 bool *dpms_off; 305 bool integer_scaling_update; 306 bool *allow_freesync; 307 bool *vrr_active_variable; 308 309 struct colorspace_transform *gamut_remap; 310 enum dc_color_space *output_color_space; 311 enum dc_dither_option *dither_option; 312 313 struct dc_csc_transform *output_csc_transform; 314 315 struct dc_writeback_update *wb_update; 316 struct dc_dsc_config *dsc_config; 317 struct dc_mst_stream_bw_update *mst_bw_update; 318 struct dc_transfer_func *func_shaper; 319 struct dc_3dlut *lut3d_func; 320 321 struct test_pattern *pending_test_pattern; 322 struct dc_crtc_timing_adjust *crtc_timing_adjust; 323 }; 324 325 bool dc_is_stream_unchanged( 326 struct dc_stream_state *old_stream, struct dc_stream_state *stream); 327 bool dc_is_stream_scaling_unchanged( 328 struct dc_stream_state *old_stream, struct dc_stream_state *stream); 329 330 /* 331 * Set up surface attributes and associate to a stream 332 * The surfaces parameter is an absolute set of all surface active for the stream. 333 * If no surfaces are provided, the stream will be blanked; no memory read. 334 * Any flip related attribute changes must be done through this interface. 335 * 336 * After this call: 337 * Surfaces attributes are programmed and configured to be composed into stream. 338 * This does not trigger a flip. No surface address is programmed. 339 */ 340 341 void dc_commit_updates_for_stream(struct dc *dc, 342 struct dc_surface_update *srf_updates, 343 int surface_count, 344 struct dc_stream_state *stream, 345 struct dc_stream_update *stream_update, 346 struct dc_state *state); 347 /* 348 * Log the current stream state. 349 */ 350 void dc_stream_log(const struct dc *dc, const struct dc_stream_state *stream); 351 352 uint8_t dc_get_current_stream_count(struct dc *dc); 353 struct dc_stream_state *dc_get_stream_at_index(struct dc *dc, uint8_t i); 354 355 /* 356 * Return the current frame counter. 357 */ 358 uint32_t dc_stream_get_vblank_counter(const struct dc_stream_state *stream); 359 360 /* 361 * Send dp sdp message. 362 */ 363 bool dc_stream_send_dp_sdp(const struct dc_stream_state *stream, 364 const uint8_t *custom_sdp_message, 365 unsigned int sdp_message_size); 366 367 /* TODO: Return parsed values rather than direct register read 368 * This has a dependency on the caller (amdgpu_display_get_crtc_scanoutpos) 369 * being refactored properly to be dce-specific 370 */ 371 bool dc_stream_get_scanoutpos(const struct dc_stream_state *stream, 372 uint32_t *v_blank_start, 373 uint32_t *v_blank_end, 374 uint32_t *h_position, 375 uint32_t *v_position); 376 377 enum dc_status dc_add_stream_to_ctx( 378 struct dc *dc, 379 struct dc_state *new_ctx, 380 struct dc_stream_state *stream); 381 382 enum dc_status dc_remove_stream_from_ctx( 383 struct dc *dc, 384 struct dc_state *new_ctx, 385 struct dc_stream_state *stream); 386 387 388 bool dc_add_plane_to_context( 389 const struct dc *dc, 390 struct dc_stream_state *stream, 391 struct dc_plane_state *plane_state, 392 struct dc_state *context); 393 394 bool dc_remove_plane_from_context( 395 const struct dc *dc, 396 struct dc_stream_state *stream, 397 struct dc_plane_state *plane_state, 398 struct dc_state *context); 399 400 bool dc_rem_all_planes_for_stream( 401 const struct dc *dc, 402 struct dc_stream_state *stream, 403 struct dc_state *context); 404 405 bool dc_add_all_planes_for_stream( 406 const struct dc *dc, 407 struct dc_stream_state *stream, 408 struct dc_plane_state * const *plane_states, 409 int plane_count, 410 struct dc_state *context); 411 412 bool dc_stream_add_writeback(struct dc *dc, 413 struct dc_stream_state *stream, 414 struct dc_writeback_info *wb_info); 415 416 bool dc_stream_remove_writeback(struct dc *dc, 417 struct dc_stream_state *stream, 418 uint32_t dwb_pipe_inst); 419 420 enum dc_status dc_stream_add_dsc_to_resource(struct dc *dc, 421 struct dc_state *state, 422 struct dc_stream_state *stream); 423 424 bool dc_stream_warmup_writeback(struct dc *dc, 425 int num_dwb, 426 struct dc_writeback_info *wb_info); 427 428 bool dc_stream_dmdata_status_done(struct dc *dc, struct dc_stream_state *stream); 429 430 bool dc_stream_set_dynamic_metadata(struct dc *dc, 431 struct dc_stream_state *stream, 432 struct dc_dmdata_attributes *dmdata_attr); 433 434 enum dc_status dc_validate_stream(struct dc *dc, struct dc_stream_state *stream); 435 436 /* 437 * Set up streams and links associated to drive sinks 438 * The streams parameter is an absolute set of all active streams. 439 * 440 * After this call: 441 * Phy, Encoder, Timing Generator are programmed and enabled. 442 * New streams are enabled with blank stream; no memory read. 443 */ 444 /* 445 * Enable stereo when commit_streams is not required, 446 * for example, frame alternate. 447 */ 448 void dc_enable_stereo( 449 struct dc *dc, 450 struct dc_state *context, 451 struct dc_stream_state *streams[], 452 uint8_t stream_count); 453 454 /* Triggers multi-stream synchronization. */ 455 void dc_trigger_sync(struct dc *dc, struct dc_state *context); 456 457 enum surface_update_type dc_check_update_surfaces_for_stream( 458 struct dc *dc, 459 struct dc_surface_update *updates, 460 int surface_count, 461 struct dc_stream_update *stream_update, 462 const struct dc_stream_status *stream_status); 463 464 /** 465 * Create a new default stream for the requested sink 466 */ 467 struct dc_stream_state *dc_create_stream_for_sink(struct dc_sink *dc_sink); 468 469 struct dc_stream_state *dc_copy_stream(const struct dc_stream_state *stream); 470 471 void update_stream_signal(struct dc_stream_state *stream, struct dc_sink *sink); 472 473 void dc_stream_retain(struct dc_stream_state *dc_stream); 474 void dc_stream_release(struct dc_stream_state *dc_stream); 475 476 struct dc_stream_status *dc_stream_get_status_from_state( 477 struct dc_state *state, 478 struct dc_stream_state *stream); 479 struct dc_stream_status *dc_stream_get_status( 480 struct dc_stream_state *dc_stream); 481 482 #ifndef TRIM_FSFT 483 bool dc_optimize_timing_for_fsft( 484 struct dc_stream_state *pStream, 485 unsigned int max_input_rate_in_khz); 486 #endif 487 488 /******************************************************************************* 489 * Cursor interfaces - To manages the cursor within a stream 490 ******************************************************************************/ 491 /* TODO: Deprecated once we switch to dc_set_cursor_position */ 492 bool dc_stream_set_cursor_attributes( 493 struct dc_stream_state *stream, 494 const struct dc_cursor_attributes *attributes); 495 496 bool dc_stream_set_cursor_position( 497 struct dc_stream_state *stream, 498 const struct dc_cursor_position *position); 499 500 501 bool dc_stream_adjust_vmin_vmax(struct dc *dc, 502 struct dc_stream_state *stream, 503 struct dc_crtc_timing_adjust *adjust); 504 505 bool dc_stream_get_last_used_drr_vtotal(struct dc *dc, 506 struct dc_stream_state *stream, 507 uint32_t *refresh_rate); 508 509 bool dc_stream_get_crtc_position(struct dc *dc, 510 struct dc_stream_state **stream, 511 int num_streams, 512 unsigned int *v_pos, 513 unsigned int *nom_v_pos); 514 515 #if defined(CONFIG_DRM_AMD_SECURE_DISPLAY) 516 bool dc_stream_forward_dmcu_crc_window(struct dc *dc, struct dc_stream_state *stream, 517 struct crc_params *crc_window); 518 bool dc_stream_stop_dmcu_crc_win_update(struct dc *dc, 519 struct dc_stream_state *stream); 520 #endif 521 522 bool dc_stream_configure_crc(struct dc *dc, 523 struct dc_stream_state *stream, 524 struct crc_params *crc_window, 525 bool enable, 526 bool continuous); 527 528 bool dc_stream_get_crc(struct dc *dc, 529 struct dc_stream_state *stream, 530 uint32_t *r_cr, 531 uint32_t *g_y, 532 uint32_t *b_cb); 533 534 void dc_stream_set_static_screen_params(struct dc *dc, 535 struct dc_stream_state **stream, 536 int num_streams, 537 const struct dc_static_screen_params *params); 538 539 void dc_stream_set_dyn_expansion(struct dc *dc, struct dc_stream_state *stream, 540 enum dc_dynamic_expansion option); 541 542 void dc_stream_set_dither_option(struct dc_stream_state *stream, 543 enum dc_dither_option option); 544 545 bool dc_stream_set_gamut_remap(struct dc *dc, 546 const struct dc_stream_state *stream); 547 548 bool dc_stream_program_csc_matrix(struct dc *dc, 549 struct dc_stream_state *stream); 550 551 bool dc_stream_get_crtc_position(struct dc *dc, 552 struct dc_stream_state **stream, 553 int num_streams, 554 unsigned int *v_pos, 555 unsigned int *nom_v_pos); 556 557 struct pipe_ctx *dc_stream_get_pipe_ctx(struct dc_stream_state *stream); 558 559 void dc_dmub_update_dirty_rect(struct dc *dc, 560 int surface_count, 561 struct dc_stream_state *stream, 562 struct dc_surface_update *srf_updates, 563 struct dc_state *context); 564 #endif /* DC_STREAM_H_ */ 565