1 /* 2 * Copyright 2012-14 Advanced Micro Devices, Inc. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included in 12 * all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 * 22 * Authors: AMD 23 * 24 */ 25 26 #ifndef DC_STREAM_H_ 27 #define DC_STREAM_H_ 28 29 #include "dc_types.h" 30 #include "grph_object_defs.h" 31 32 /******************************************************************************* 33 * Stream Interfaces 34 ******************************************************************************/ 35 struct timing_sync_info { 36 int group_id; 37 int group_size; 38 bool master; 39 }; 40 41 struct dc_stream_status { 42 int primary_otg_inst; 43 int stream_enc_inst; 44 int plane_count; 45 int audio_inst; 46 struct timing_sync_info timing_sync_info; 47 struct dc_plane_state *plane_states[MAX_SURFACE_NUM]; 48 bool is_abm_supported; 49 }; 50 51 // TODO: References to this needs to be removed.. 52 struct freesync_context { 53 bool dummy; 54 }; 55 56 enum hubp_dmdata_mode { 57 DMDATA_SW_MODE, 58 DMDATA_HW_MODE 59 }; 60 61 struct dc_dmdata_attributes { 62 /* Specifies whether dynamic meta data will be updated by software 63 * or has to be fetched by hardware (DMA mode) 64 */ 65 enum hubp_dmdata_mode dmdata_mode; 66 /* Specifies if current dynamic meta data is to be used only for the current frame */ 67 bool dmdata_repeat; 68 /* Specifies the size of Dynamic Metadata surface in byte. Size of 0 means no Dynamic metadata is fetched */ 69 uint32_t dmdata_size; 70 /* Specifies if a new dynamic meta data should be fetched for an upcoming frame */ 71 bool dmdata_updated; 72 /* If hardware mode is used, the base address where DMDATA surface is located */ 73 PHYSICAL_ADDRESS_LOC address; 74 /* Specifies whether QOS level will be provided by TTU or it will come from DMDATA_QOS_LEVEL */ 75 bool dmdata_qos_mode; 76 /* If qos_mode = 1, this is the QOS value to be used: */ 77 uint32_t dmdata_qos_level; 78 /* Specifies the value in unit of REFCLK cycles to be added to the 79 * current time to produce the Amortized deadline for Dynamic Metadata chunk request 80 */ 81 uint32_t dmdata_dl_delta; 82 /* An unbounded array of uint32s, represents software dmdata to be loaded */ 83 uint32_t *dmdata_sw_data; 84 }; 85 86 struct dc_writeback_info { 87 bool wb_enabled; 88 int dwb_pipe_inst; 89 struct dc_dwb_params dwb_params; 90 struct mcif_buf_params mcif_buf_params; 91 struct mcif_warmup_params mcif_warmup_params; 92 /* the plane that is the input to TOP_MUX for MPCC that is the DWB source */ 93 struct dc_plane_state *writeback_source_plane; 94 /* source MPCC instance. for use by internally by dc */ 95 int mpcc_inst; 96 }; 97 98 struct dc_writeback_update { 99 unsigned int num_wb_info; 100 struct dc_writeback_info writeback_info[MAX_DWB_PIPES]; 101 }; 102 103 enum vertical_interrupt_ref_point { 104 START_V_UPDATE = 0, 105 START_V_SYNC, 106 INVALID_POINT 107 108 //For now, only v_update interrupt is used. 109 //START_V_BLANK, 110 //START_V_ACTIVE 111 }; 112 113 struct periodic_interrupt_config { 114 enum vertical_interrupt_ref_point ref_point; 115 int lines_offset; 116 }; 117 118 union stream_update_flags { 119 struct { 120 uint32_t scaling:1; 121 uint32_t out_tf:1; 122 uint32_t out_csc:1; 123 uint32_t abm_level:1; 124 uint32_t dpms_off:1; 125 uint32_t gamut_remap:1; 126 uint32_t wb_update:1; 127 uint32_t dsc_changed : 1; 128 } bits; 129 130 uint32_t raw; 131 }; 132 133 struct test_pattern { 134 enum dp_test_pattern type; 135 enum dp_test_pattern_color_space color_space; 136 struct link_training_settings const *p_link_settings; 137 unsigned char const *p_custom_pattern; 138 unsigned int cust_pattern_size; 139 }; 140 141 struct dc_stream_state { 142 // sink is deprecated, new code should not reference 143 // this pointer 144 struct dc_sink *sink; 145 146 struct dc_link *link; 147 struct dc_panel_patch sink_patches; 148 union display_content_support content_support; 149 struct dc_crtc_timing timing; 150 struct dc_crtc_timing_adjust adjust; 151 struct dc_info_packet vrr_infopacket; 152 struct dc_info_packet vsc_infopacket; 153 struct dc_info_packet vsp_infopacket; 154 155 struct rect src; /* composition area */ 156 struct rect dst; /* stream addressable area */ 157 158 // TODO: References to this needs to be removed.. 159 struct freesync_context freesync_ctx; 160 161 struct audio_info audio_info; 162 163 struct dc_info_packet hdr_static_metadata; 164 PHYSICAL_ADDRESS_LOC dmdata_address; 165 bool use_dynamic_meta; 166 167 struct dc_transfer_func *out_transfer_func; 168 struct colorspace_transform gamut_remap_matrix; 169 struct dc_csc_transform csc_color_matrix; 170 171 enum dc_color_space output_color_space; 172 enum dc_dither_option dither_option; 173 174 enum view_3d_format view_format; 175 176 bool use_vsc_sdp_for_colorimetry; 177 bool ignore_msa_timing_param; 178 bool converter_disable_audio; 179 uint8_t qs_bit; 180 uint8_t qy_bit; 181 182 /* TODO: custom INFO packets */ 183 /* TODO: ABM info (DMCU) */ 184 /* TODO: CEA VIC */ 185 186 /* DMCU info */ 187 unsigned int abm_level; 188 189 struct periodic_interrupt_config periodic_interrupt0; 190 struct periodic_interrupt_config periodic_interrupt1; 191 192 /* from core_stream struct */ 193 struct dc_context *ctx; 194 195 /* used by DCP and FMT */ 196 struct bit_depth_reduction_params bit_depth_params; 197 struct clamping_and_pixel_encoding_params clamping; 198 199 int phy_pix_clk; 200 enum signal_type signal; 201 bool dpms_off; 202 203 void *dm_stream_context; 204 205 struct dc_cursor_attributes cursor_attributes; 206 struct dc_cursor_position cursor_position; 207 uint32_t sdr_white_level; // for boosting (SDR) cursor in HDR mode 208 209 /* from stream struct */ 210 struct kref refcount; 211 212 struct crtc_trigger_info triggered_crtc_reset; 213 214 /* writeback */ 215 unsigned int num_wb_info; 216 struct dc_writeback_info writeback_info[MAX_DWB_PIPES]; 217 const struct dc_transfer_func *func_shaper; 218 const struct dc_3dlut *lut3d_func; 219 /* Computed state bits */ 220 bool mode_changed : 1; 221 222 /* Output from DC when stream state is committed or altered 223 * DC may only access these values during: 224 * dc_commit_state, dc_commit_state_no_check, dc_commit_streams 225 * values may not change outside of those calls 226 */ 227 struct { 228 // For interrupt management, some hardware instance 229 // offsets need to be exposed to DM 230 uint8_t otg_offset; 231 } out; 232 233 bool apply_edp_fast_boot_optimization; 234 bool apply_seamless_boot_optimization; 235 236 uint32_t stream_id; 237 bool is_dsc_enabled; 238 239 struct test_pattern test_pattern; 240 union stream_update_flags update_flags; 241 }; 242 243 #define ABM_LEVEL_IMMEDIATE_DISABLE 255 244 245 struct dc_stream_update { 246 struct dc_stream_state *stream; 247 248 struct rect src; 249 struct rect dst; 250 struct dc_transfer_func *out_transfer_func; 251 struct dc_info_packet *hdr_static_metadata; 252 unsigned int *abm_level; 253 254 struct periodic_interrupt_config *periodic_interrupt0; 255 struct periodic_interrupt_config *periodic_interrupt1; 256 257 struct dc_info_packet *vrr_infopacket; 258 struct dc_info_packet *vsc_infopacket; 259 struct dc_info_packet *vsp_infopacket; 260 261 bool *dpms_off; 262 bool integer_scaling_update; 263 264 struct colorspace_transform *gamut_remap; 265 enum dc_color_space *output_color_space; 266 enum dc_dither_option *dither_option; 267 268 struct dc_csc_transform *output_csc_transform; 269 270 struct dc_writeback_update *wb_update; 271 struct dc_dsc_config *dsc_config; 272 struct dc_transfer_func *func_shaper; 273 struct dc_3dlut *lut3d_func; 274 struct test_pattern *pending_test_pattern; 275 }; 276 277 bool dc_is_stream_unchanged( 278 struct dc_stream_state *old_stream, struct dc_stream_state *stream); 279 bool dc_is_stream_scaling_unchanged( 280 struct dc_stream_state *old_stream, struct dc_stream_state *stream); 281 282 /* 283 * Set up surface attributes and associate to a stream 284 * The surfaces parameter is an absolute set of all surface active for the stream. 285 * If no surfaces are provided, the stream will be blanked; no memory read. 286 * Any flip related attribute changes must be done through this interface. 287 * 288 * After this call: 289 * Surfaces attributes are programmed and configured to be composed into stream. 290 * This does not trigger a flip. No surface address is programmed. 291 */ 292 293 void dc_commit_updates_for_stream(struct dc *dc, 294 struct dc_surface_update *srf_updates, 295 int surface_count, 296 struct dc_stream_state *stream, 297 struct dc_stream_update *stream_update, 298 struct dc_state *state); 299 /* 300 * Log the current stream state. 301 */ 302 void dc_stream_log(const struct dc *dc, const struct dc_stream_state *stream); 303 304 uint8_t dc_get_current_stream_count(struct dc *dc); 305 struct dc_stream_state *dc_get_stream_at_index(struct dc *dc, uint8_t i); 306 struct dc_stream_state *dc_stream_find_from_link(const struct dc_link *link); 307 308 /* 309 * Return the current frame counter. 310 */ 311 uint32_t dc_stream_get_vblank_counter(const struct dc_stream_state *stream); 312 313 /* 314 * Send dp sdp message. 315 */ 316 bool dc_stream_send_dp_sdp(const struct dc_stream_state *stream, 317 const uint8_t *custom_sdp_message, 318 unsigned int sdp_message_size); 319 320 /* TODO: Return parsed values rather than direct register read 321 * This has a dependency on the caller (amdgpu_display_get_crtc_scanoutpos) 322 * being refactored properly to be dce-specific 323 */ 324 bool dc_stream_get_scanoutpos(const struct dc_stream_state *stream, 325 uint32_t *v_blank_start, 326 uint32_t *v_blank_end, 327 uint32_t *h_position, 328 uint32_t *v_position); 329 330 enum dc_status dc_add_stream_to_ctx( 331 struct dc *dc, 332 struct dc_state *new_ctx, 333 struct dc_stream_state *stream); 334 335 enum dc_status dc_remove_stream_from_ctx( 336 struct dc *dc, 337 struct dc_state *new_ctx, 338 struct dc_stream_state *stream); 339 340 341 bool dc_add_plane_to_context( 342 const struct dc *dc, 343 struct dc_stream_state *stream, 344 struct dc_plane_state *plane_state, 345 struct dc_state *context); 346 347 bool dc_remove_plane_from_context( 348 const struct dc *dc, 349 struct dc_stream_state *stream, 350 struct dc_plane_state *plane_state, 351 struct dc_state *context); 352 353 bool dc_rem_all_planes_for_stream( 354 const struct dc *dc, 355 struct dc_stream_state *stream, 356 struct dc_state *context); 357 358 bool dc_add_all_planes_for_stream( 359 const struct dc *dc, 360 struct dc_stream_state *stream, 361 struct dc_plane_state * const *plane_states, 362 int plane_count, 363 struct dc_state *context); 364 365 bool dc_stream_add_writeback(struct dc *dc, 366 struct dc_stream_state *stream, 367 struct dc_writeback_info *wb_info); 368 369 bool dc_stream_remove_writeback(struct dc *dc, 370 struct dc_stream_state *stream, 371 uint32_t dwb_pipe_inst); 372 373 enum dc_status dc_stream_add_dsc_to_resource(struct dc *dc, 374 struct dc_state *state, 375 struct dc_stream_state *stream); 376 377 bool dc_stream_warmup_writeback(struct dc *dc, 378 int num_dwb, 379 struct dc_writeback_info *wb_info); 380 381 bool dc_stream_dmdata_status_done(struct dc *dc, struct dc_stream_state *stream); 382 383 bool dc_stream_set_dynamic_metadata(struct dc *dc, 384 struct dc_stream_state *stream, 385 struct dc_dmdata_attributes *dmdata_attr); 386 387 enum dc_status dc_validate_stream(struct dc *dc, struct dc_stream_state *stream); 388 389 /* 390 * Set up streams and links associated to drive sinks 391 * The streams parameter is an absolute set of all active streams. 392 * 393 * After this call: 394 * Phy, Encoder, Timing Generator are programmed and enabled. 395 * New streams are enabled with blank stream; no memory read. 396 */ 397 /* 398 * Enable stereo when commit_streams is not required, 399 * for example, frame alternate. 400 */ 401 void dc_enable_stereo( 402 struct dc *dc, 403 struct dc_state *context, 404 struct dc_stream_state *streams[], 405 uint8_t stream_count); 406 407 /* Triggers multi-stream synchronization. */ 408 void dc_trigger_sync(struct dc *dc, struct dc_state *context); 409 410 enum surface_update_type dc_check_update_surfaces_for_stream( 411 struct dc *dc, 412 struct dc_surface_update *updates, 413 int surface_count, 414 struct dc_stream_update *stream_update, 415 const struct dc_stream_status *stream_status); 416 417 /** 418 * Create a new default stream for the requested sink 419 */ 420 struct dc_stream_state *dc_create_stream_for_sink(struct dc_sink *dc_sink); 421 422 struct dc_stream_state *dc_copy_stream(const struct dc_stream_state *stream); 423 424 void update_stream_signal(struct dc_stream_state *stream, struct dc_sink *sink); 425 426 void dc_stream_retain(struct dc_stream_state *dc_stream); 427 void dc_stream_release(struct dc_stream_state *dc_stream); 428 429 struct dc_stream_status *dc_stream_get_status_from_state( 430 struct dc_state *state, 431 struct dc_stream_state *stream); 432 struct dc_stream_status *dc_stream_get_status( 433 struct dc_stream_state *dc_stream); 434 435 #ifndef TRIM_FSFT 436 bool dc_optimize_timing_for_fsft( 437 struct dc_stream_state *pStream, 438 unsigned int max_input_rate_in_khz); 439 #endif 440 441 /******************************************************************************* 442 * Cursor interfaces - To manages the cursor within a stream 443 ******************************************************************************/ 444 /* TODO: Deprecated once we switch to dc_set_cursor_position */ 445 bool dc_stream_set_cursor_attributes( 446 struct dc_stream_state *stream, 447 const struct dc_cursor_attributes *attributes); 448 449 bool dc_stream_set_cursor_position( 450 struct dc_stream_state *stream, 451 const struct dc_cursor_position *position); 452 453 454 bool dc_stream_adjust_vmin_vmax(struct dc *dc, 455 struct dc_stream_state *stream, 456 struct dc_crtc_timing_adjust *adjust); 457 458 bool dc_stream_get_crtc_position(struct dc *dc, 459 struct dc_stream_state **stream, 460 int num_streams, 461 unsigned int *v_pos, 462 unsigned int *nom_v_pos); 463 464 bool dc_stream_configure_crc(struct dc *dc, 465 struct dc_stream_state *stream, 466 struct crc_params *crc_window, 467 bool enable, 468 bool continuous); 469 470 bool dc_stream_get_crc(struct dc *dc, 471 struct dc_stream_state *stream, 472 uint32_t *r_cr, 473 uint32_t *g_y, 474 uint32_t *b_cb); 475 476 void dc_stream_set_static_screen_params(struct dc *dc, 477 struct dc_stream_state **stream, 478 int num_streams, 479 const struct dc_static_screen_params *params); 480 481 void dc_stream_set_dyn_expansion(struct dc *dc, struct dc_stream_state *stream, 482 enum dc_dynamic_expansion option); 483 484 void dc_stream_set_dither_option(struct dc_stream_state *stream, 485 enum dc_dither_option option); 486 487 bool dc_stream_set_gamut_remap(struct dc *dc, 488 const struct dc_stream_state *stream); 489 490 bool dc_stream_program_csc_matrix(struct dc *dc, 491 struct dc_stream_state *stream); 492 493 bool dc_stream_get_crtc_position(struct dc *dc, 494 struct dc_stream_state **stream, 495 int num_streams, 496 unsigned int *v_pos, 497 unsigned int *nom_v_pos); 498 499 #endif /* DC_STREAM_H_ */ 500