1 /*
2  * Copyright 2012-14 Advanced Micro Devices, Inc.
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a
5  * copy of this software and associated documentation files (the "Software"),
6  * to deal in the Software without restriction, including without limitation
7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8  * and/or sell copies of the Software, and to permit persons to whom the
9  * Software is furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice shall be included in
12  * all copies or substantial portions of the Software.
13  *
14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20  * OTHER DEALINGS IN THE SOFTWARE.
21  *
22  * Authors: AMD
23  *
24  */
25 
26 #ifndef DC_STREAM_H_
27 #define DC_STREAM_H_
28 
29 #include "dc_types.h"
30 #include "grph_object_defs.h"
31 
32 /*******************************************************************************
33  * Stream Interfaces
34  ******************************************************************************/
35 struct timing_sync_info {
36 	int group_id;
37 	int group_size;
38 	bool master;
39 };
40 
41 struct dc_stream_status {
42 	int primary_otg_inst;
43 	int stream_enc_inst;
44 	int plane_count;
45 	int audio_inst;
46 	struct timing_sync_info timing_sync_info;
47 	struct dc_plane_state *plane_states[MAX_SURFACE_NUM];
48 };
49 
50 // TODO: References to this needs to be removed..
51 struct freesync_context {
52 	bool dummy;
53 };
54 
55 enum hubp_dmdata_mode {
56 	DMDATA_SW_MODE,
57 	DMDATA_HW_MODE
58 };
59 
60 struct dc_dmdata_attributes {
61 	/* Specifies whether dynamic meta data will be updated by software
62 	 * or has to be fetched by hardware (DMA mode)
63 	 */
64 	enum hubp_dmdata_mode dmdata_mode;
65 	/* Specifies if current dynamic meta data is to be used only for the current frame */
66 	bool dmdata_repeat;
67 	/* Specifies the size of Dynamic Metadata surface in byte.  Size of 0 means no Dynamic metadata is fetched */
68 	uint32_t dmdata_size;
69 	/* Specifies if a new dynamic meta data should be fetched for an upcoming frame */
70 	bool dmdata_updated;
71 	/* If hardware mode is used, the base address where DMDATA surface is located */
72 	PHYSICAL_ADDRESS_LOC address;
73 	/* Specifies whether QOS level will be provided by TTU or it will come from DMDATA_QOS_LEVEL */
74 	bool dmdata_qos_mode;
75 	/* If qos_mode = 1, this is the QOS value to be used: */
76 	uint32_t dmdata_qos_level;
77 	/* Specifies the value in unit of REFCLK cycles to be added to the
78 	 * current time to produce the Amortized deadline for Dynamic Metadata chunk request
79 	 */
80 	uint32_t dmdata_dl_delta;
81 	/* An unbounded array of uint32s, represents software dmdata to be loaded */
82 	uint32_t *dmdata_sw_data;
83 };
84 
85 struct dc_writeback_info {
86 	bool wb_enabled;
87 	int dwb_pipe_inst;
88 	struct dc_dwb_params dwb_params;
89 	struct mcif_buf_params mcif_buf_params;
90 };
91 
92 struct dc_writeback_update {
93 	unsigned int num_wb_info;
94 	struct dc_writeback_info writeback_info[MAX_DWB_PIPES];
95 };
96 
97 enum vertical_interrupt_ref_point {
98 	START_V_UPDATE = 0,
99 	START_V_SYNC,
100 	INVALID_POINT
101 
102 	//For now, only v_update interrupt is used.
103 	//START_V_BLANK,
104 	//START_V_ACTIVE
105 };
106 
107 struct periodic_interrupt_config {
108 	enum vertical_interrupt_ref_point ref_point;
109 	int lines_offset;
110 };
111 
112 union stream_update_flags {
113 	struct {
114 		uint32_t scaling:1;
115 		uint32_t out_tf:1;
116 		uint32_t out_csc:1;
117 		uint32_t abm_level:1;
118 		uint32_t dpms_off:1;
119 		uint32_t gamut_remap:1;
120 		uint32_t wb_update:1;
121 		uint32_t dsc_changed : 1;
122 	} bits;
123 
124 	uint32_t raw;
125 };
126 
127 struct dc_stream_state {
128 	// sink is deprecated, new code should not reference
129 	// this pointer
130 	struct dc_sink *sink;
131 
132 	struct dc_link *link;
133 	struct dc_panel_patch sink_patches;
134 	union display_content_support content_support;
135 	struct dc_crtc_timing timing;
136 	struct dc_crtc_timing_adjust adjust;
137 	struct dc_info_packet vrr_infopacket;
138 	struct dc_info_packet vsc_infopacket;
139 	struct dc_info_packet vsp_infopacket;
140 
141 	struct rect src; /* composition area */
142 	struct rect dst; /* stream addressable area */
143 
144 	// TODO: References to this needs to be removed..
145 	struct freesync_context freesync_ctx;
146 
147 	struct audio_info audio_info;
148 
149 	struct dc_info_packet hdr_static_metadata;
150 	PHYSICAL_ADDRESS_LOC dmdata_address;
151 	bool   use_dynamic_meta;
152 
153 	struct dc_transfer_func *out_transfer_func;
154 	struct colorspace_transform gamut_remap_matrix;
155 	struct dc_csc_transform csc_color_matrix;
156 
157 	enum dc_color_space output_color_space;
158 	enum dc_dither_option dither_option;
159 
160 	enum view_3d_format view_format;
161 
162 	bool use_vsc_sdp_for_colorimetry;
163 	bool ignore_msa_timing_param;
164 	bool converter_disable_audio;
165 	uint8_t qs_bit;
166 	uint8_t qy_bit;
167 
168 	/* TODO: custom INFO packets */
169 	/* TODO: ABM info (DMCU) */
170 	/* PSR info */
171 	unsigned char psr_version;
172 	/* TODO: CEA VIC */
173 
174 	/* DMCU info */
175 	unsigned int abm_level;
176 
177 	struct periodic_interrupt_config periodic_interrupt0;
178 	struct periodic_interrupt_config periodic_interrupt1;
179 
180 	/* from core_stream struct */
181 	struct dc_context *ctx;
182 
183 	/* used by DCP and FMT */
184 	struct bit_depth_reduction_params bit_depth_params;
185 	struct clamping_and_pixel_encoding_params clamping;
186 
187 	int phy_pix_clk;
188 	enum signal_type signal;
189 	bool dpms_off;
190 
191 	void *dm_stream_context;
192 
193 	struct dc_cursor_attributes cursor_attributes;
194 	struct dc_cursor_position cursor_position;
195 	uint32_t sdr_white_level; // for boosting (SDR) cursor in HDR mode
196 
197 	/* from stream struct */
198 	struct kref refcount;
199 
200 	struct crtc_trigger_info triggered_crtc_reset;
201 
202 	/* writeback */
203 	unsigned int num_wb_info;
204 	struct dc_writeback_info writeback_info[MAX_DWB_PIPES];
205 	/* Computed state bits */
206 	bool mode_changed : 1;
207 
208 	/* Output from DC when stream state is committed or altered
209 	 * DC may only access these values during:
210 	 * dc_commit_state, dc_commit_state_no_check, dc_commit_streams
211 	 * values may not change outside of those calls
212 	 */
213 	struct {
214 		// For interrupt management, some hardware instance
215 		// offsets need to be exposed to DM
216 		uint8_t otg_offset;
217 	} out;
218 
219 	bool apply_edp_fast_boot_optimization;
220 	bool apply_seamless_boot_optimization;
221 
222 	uint32_t stream_id;
223 	bool is_dsc_enabled;
224 	union stream_update_flags update_flags;
225 };
226 
227 #define ABM_LEVEL_IMMEDIATE_DISABLE 0xFFFFFFFF
228 
229 struct dc_stream_update {
230 	struct dc_stream_state *stream;
231 
232 	struct rect src;
233 	struct rect dst;
234 	struct dc_transfer_func *out_transfer_func;
235 	struct dc_info_packet *hdr_static_metadata;
236 	unsigned int *abm_level;
237 
238 	struct periodic_interrupt_config *periodic_interrupt0;
239 	struct periodic_interrupt_config *periodic_interrupt1;
240 
241 	struct dc_info_packet *vrr_infopacket;
242 	struct dc_info_packet *vsc_infopacket;
243 	struct dc_info_packet *vsp_infopacket;
244 
245 	bool *dpms_off;
246 	bool integer_scaling_update;
247 
248 	struct colorspace_transform *gamut_remap;
249 	enum dc_color_space *output_color_space;
250 	enum dc_dither_option *dither_option;
251 
252 	struct dc_csc_transform *output_csc_transform;
253 
254 	struct dc_writeback_update *wb_update;
255 	struct dc_dsc_config *dsc_config;
256 };
257 
258 bool dc_is_stream_unchanged(
259 	struct dc_stream_state *old_stream, struct dc_stream_state *stream);
260 bool dc_is_stream_scaling_unchanged(
261 	struct dc_stream_state *old_stream, struct dc_stream_state *stream);
262 
263 /*
264  * Set up surface attributes and associate to a stream
265  * The surfaces parameter is an absolute set of all surface active for the stream.
266  * If no surfaces are provided, the stream will be blanked; no memory read.
267  * Any flip related attribute changes must be done through this interface.
268  *
269  * After this call:
270  *   Surfaces attributes are programmed and configured to be composed into stream.
271  *   This does not trigger a flip.  No surface address is programmed.
272  */
273 
274 void dc_commit_updates_for_stream(struct dc *dc,
275 		struct dc_surface_update *srf_updates,
276 		int surface_count,
277 		struct dc_stream_state *stream,
278 		struct dc_stream_update *stream_update,
279 		struct dc_state *state);
280 /*
281  * Log the current stream state.
282  */
283 void dc_stream_log(const struct dc *dc, const struct dc_stream_state *stream);
284 
285 uint8_t dc_get_current_stream_count(struct dc *dc);
286 struct dc_stream_state *dc_get_stream_at_index(struct dc *dc, uint8_t i);
287 
288 /*
289  * Return the current frame counter.
290  */
291 uint32_t dc_stream_get_vblank_counter(const struct dc_stream_state *stream);
292 
293 /*
294  * Send dp sdp message.
295  */
296 bool dc_stream_send_dp_sdp(const struct dc_stream_state *stream,
297 		const uint8_t *custom_sdp_message,
298 		unsigned int sdp_message_size);
299 
300 /* TODO: Return parsed values rather than direct register read
301  * This has a dependency on the caller (amdgpu_display_get_crtc_scanoutpos)
302  * being refactored properly to be dce-specific
303  */
304 bool dc_stream_get_scanoutpos(const struct dc_stream_state *stream,
305 				  uint32_t *v_blank_start,
306 				  uint32_t *v_blank_end,
307 				  uint32_t *h_position,
308 				  uint32_t *v_position);
309 
310 enum dc_status dc_add_stream_to_ctx(
311 			struct dc *dc,
312 		struct dc_state *new_ctx,
313 		struct dc_stream_state *stream);
314 
315 enum dc_status dc_remove_stream_from_ctx(
316 		struct dc *dc,
317 			struct dc_state *new_ctx,
318 			struct dc_stream_state *stream);
319 
320 
321 bool dc_add_plane_to_context(
322 		const struct dc *dc,
323 		struct dc_stream_state *stream,
324 		struct dc_plane_state *plane_state,
325 		struct dc_state *context);
326 
327 bool dc_remove_plane_from_context(
328 		const struct dc *dc,
329 		struct dc_stream_state *stream,
330 		struct dc_plane_state *plane_state,
331 		struct dc_state *context);
332 
333 bool dc_rem_all_planes_for_stream(
334 		const struct dc *dc,
335 		struct dc_stream_state *stream,
336 		struct dc_state *context);
337 
338 bool dc_add_all_planes_for_stream(
339 		const struct dc *dc,
340 		struct dc_stream_state *stream,
341 		struct dc_plane_state * const *plane_states,
342 		int plane_count,
343 		struct dc_state *context);
344 
345 bool dc_stream_add_writeback(struct dc *dc,
346 		struct dc_stream_state *stream,
347 		struct dc_writeback_info *wb_info);
348 
349 bool dc_stream_remove_writeback(struct dc *dc,
350 		struct dc_stream_state *stream,
351 		uint32_t dwb_pipe_inst);
352 
353 bool dc_stream_warmup_writeback(struct dc *dc,
354 		int num_dwb,
355 		struct dc_writeback_info *wb_info);
356 
357 bool dc_stream_dmdata_status_done(struct dc *dc, struct dc_stream_state *stream);
358 
359 bool dc_stream_set_dynamic_metadata(struct dc *dc,
360 		struct dc_stream_state *stream,
361 		struct dc_dmdata_attributes *dmdata_attr);
362 
363 enum dc_status dc_validate_stream(struct dc *dc, struct dc_stream_state *stream);
364 
365 /*
366  * Set up streams and links associated to drive sinks
367  * The streams parameter is an absolute set of all active streams.
368  *
369  * After this call:
370  *   Phy, Encoder, Timing Generator are programmed and enabled.
371  *   New streams are enabled with blank stream; no memory read.
372  */
373 /*
374  * Enable stereo when commit_streams is not required,
375  * for example, frame alternate.
376  */
377 bool dc_enable_stereo(
378 	struct dc *dc,
379 	struct dc_state *context,
380 	struct dc_stream_state *streams[],
381 	uint8_t stream_count);
382 
383 
384 enum surface_update_type dc_check_update_surfaces_for_stream(
385 		struct dc *dc,
386 		struct dc_surface_update *updates,
387 		int surface_count,
388 		struct dc_stream_update *stream_update,
389 		const struct dc_stream_status *stream_status);
390 
391 /**
392  * Create a new default stream for the requested sink
393  */
394 struct dc_stream_state *dc_create_stream_for_sink(struct dc_sink *dc_sink);
395 
396 struct dc_stream_state *dc_copy_stream(const struct dc_stream_state *stream);
397 
398 void update_stream_signal(struct dc_stream_state *stream, struct dc_sink *sink);
399 
400 void dc_stream_retain(struct dc_stream_state *dc_stream);
401 void dc_stream_release(struct dc_stream_state *dc_stream);
402 
403 struct dc_stream_status *dc_stream_get_status_from_state(
404 	struct dc_state *state,
405 	struct dc_stream_state *stream);
406 struct dc_stream_status *dc_stream_get_status(
407 	struct dc_stream_state *dc_stream);
408 
409 /*******************************************************************************
410  * Cursor interfaces - To manages the cursor within a stream
411  ******************************************************************************/
412 /* TODO: Deprecated once we switch to dc_set_cursor_position */
413 bool dc_stream_set_cursor_attributes(
414 	struct dc_stream_state *stream,
415 	const struct dc_cursor_attributes *attributes);
416 
417 bool dc_stream_set_cursor_position(
418 	struct dc_stream_state *stream,
419 	const struct dc_cursor_position *position);
420 
421 
422 bool dc_stream_adjust_vmin_vmax(struct dc *dc,
423 				struct dc_stream_state *stream,
424 				struct dc_crtc_timing_adjust *adjust);
425 
426 bool dc_stream_get_crtc_position(struct dc *dc,
427 				 struct dc_stream_state **stream,
428 				 int num_streams,
429 				 unsigned int *v_pos,
430 				 unsigned int *nom_v_pos);
431 
432 bool dc_stream_configure_crc(struct dc *dc,
433 			     struct dc_stream_state *stream,
434 			     bool enable,
435 			     bool continuous);
436 
437 bool dc_stream_get_crc(struct dc *dc,
438 		       struct dc_stream_state *stream,
439 		       uint32_t *r_cr,
440 		       uint32_t *g_y,
441 		       uint32_t *b_cb);
442 
443 void dc_stream_set_static_screen_params(struct dc *dc,
444 					struct dc_stream_state **stream,
445 					int num_streams,
446 					const struct dc_static_screen_params *params);
447 
448 void dc_stream_set_dyn_expansion(struct dc *dc, struct dc_stream_state *stream,
449 		enum dc_dynamic_expansion option);
450 
451 void dc_stream_set_dither_option(struct dc_stream_state *stream,
452 				 enum dc_dither_option option);
453 
454 bool dc_stream_set_gamut_remap(struct dc *dc,
455 			       const struct dc_stream_state *stream);
456 
457 bool dc_stream_program_csc_matrix(struct dc *dc,
458 				  struct dc_stream_state *stream);
459 
460 bool dc_stream_get_crtc_position(struct dc *dc,
461 				 struct dc_stream_state **stream,
462 				 int num_streams,
463 				 unsigned int *v_pos,
464 				 unsigned int *nom_v_pos);
465 
466 #endif /* DC_STREAM_H_ */
467